* [Qemu-devel] [PATCH 2/8] Mips improvements
@ 2006-05-15 1:19 Thiemo Seufer
0 siblings, 0 replies; only message in thread
From: Thiemo Seufer @ 2006-05-15 1:19 UTC (permalink / raw)
To: qemu-devel
Hello All,
this patch enables disassembly of all instructions the mips
disassembler knows about.
Thiemo
Index: qemu-work/mips-dis.c
===================================================================
--- qemu-work.orig/mips-dis.c 2006-05-15 01:13:13.000000000 +0100
+++ qemu-work/mips-dis.c 2006-05-15 01:20:23.000000000 +0100
@@ -528,6 +528,7 @@
ISA/ASE bitmask to test against; and CPU is the CPU specific ISA to
test, or zero if no CPU specific ISA test is desired. */
+#if 0
#define OPCODE_IS_MEMBER(insn, isa, cpu) \
(((insn)->membership & isa) != 0 \
|| (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \
@@ -543,6 +544,10 @@
|| (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0) \
|| (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0) \
|| 0) /* Please keep this term for easier source merging. */
+#else
+#define OPCODE_IS_MEMBER(insn, isa, cpu) \
+ (1 != 0)
+#endif
/* This is a list of macro expanded instructions.
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2006-05-15 1:19 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2006-05-15 1:19 [Qemu-devel] [PATCH 2/8] Mips improvements Thiemo Seufer
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.