From: Marek Kierdelewicz <marek@piasta.pl>
To: lartc@vger.kernel.org
Subject: [LARTC] using cpu cycle counter on smp
Date: Tue, 28 Nov 2006 23:16:07 +0000 [thread overview]
Message-ID: <20061129001607.42f5bece@localhost> (raw)
Hi there,
I was wondering if it's possible to use PSCHED_CPU (cpu cycle counter
as clock source for QoS). Normally kernel menuconfig forbids it due
to lack of synchronization of counters on different cpu, but:
http://uwsg.iu.edu/hypermail/linux/kernel/9902.0/0053.html
and quoting interesting part...
-------------
checking TSC synchronization across CPUs:
BIOS BUG: CPU#0 improperly initialized, has -25 usecs TSC skew! FIXED.
BIOS BUG: CPU#1 improperly initialized, has 25 usecs TSC skew! FIXED.
-------------
... we can see TSC is synchronized during boot process. So, is it or is
it not possible/prudent to use PSCHED_CPU on x86/x86_64, where TSCs
are used?
pozdrawiam,
Marek Kierdelewicz
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reply other threads:[~2006-11-28 23:16 UTC|newest]
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