[Qemu-devel] softmmu macro meaning

[Qemu-devel] softmmu macro meaning

[Clemens Kolbitsch]

hi guys!
just a short question:

in softmmu_header.h, for example in function 

glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)

which boils down to be included in (e.g.)

op_ldl_kernel_T0_A0
or
op_ldub_user_T0_A0
or
...

does the MEMSUFFIX macro ("kernel" / "user") mean that the memory is access by 
code running in ring0/ring3 or does this tell about the memory region being 
access (mem < or > TASK_SIZE / 0xc0000000)?


and while I'm asking two other related questions I just don't quite 
understand:

1.) why does the TLB (e.g. tlb_table[CPU_MEM_INDEX][...]) have 2 different 
arrays? is this because some CPU offer different page sizes depending on a 
TASK_SIZE border or something??

2.) the MMUSUFFIX macro ("mmu" / "cmmu") what does this stand for??

Thanks!!!
Clemens

Re: [Qemu-devel] softmmu macro meaning

[Daniel Jacobowitz]

On Thu, Sep 27, 2007 at 10:39:46AM +0200, Clemens Kolbitsch wrote:
> does the MEMSUFFIX macro ("kernel" / "user") mean that the memory is access by 
> code running in ring0/ring3 or does this tell about the memory region being 
> access (mem < or > TASK_SIZE / 0xc0000000)?

The former.

> and while I'm asking two other related questions I just don't quite 
> understand:
> 
> 1.) why does the TLB (e.g. tlb_table[CPU_MEM_INDEX][...]) have 2 different 
> arrays? is this because some CPU offer different page sizes depending on a 
> TASK_SIZE border or something??

It makes more sense if you realize it's kernel/user mode not address
space.

> 2.) the MMUSUFFIX macro ("mmu" / "cmmu") what does this stand for??

cmmu is used to read code to execute, IIRC (different permissions).

-- 
Daniel Jacobowitz
CodeSourcery

Re: [Qemu-devel] softmmu macro meaning

[Clemens Kolbitsch]

On Thursday 27 September 2007 17:27:32 Daniel Jacobowitz wrote:
> On Thu, Sep 27, 2007 at 05:02:46PM +0200, Clemens Kolbitsch wrote:
> > but will kernel mode always use the TLB[0] for address translation (even
> > for addresses at e.g. 0x0800ffff) and user mode TLB[1] (even for e.g.
> > 0xc000abcd)? (or the other way round...)
>
> Which set of TLBs are used depends completely on the current processor
> mode.  It has nothing to do with the address.

ok perfect :-)

thanks!!