* Re: Re: [Qemu-devel] softmmu macro meaning
[not found] <20070927140247.10904gmx1@mx066.gmx.net>
@ 2007-09-27 15:02 ` Clemens Kolbitsch
2007-09-27 15:27 ` Daniel Jacobowitz
0 siblings, 1 reply; 3+ messages in thread
From: Clemens Kolbitsch @ 2007-09-27 15:02 UTC (permalink / raw)
To: qemu-devel
On Thursday 27 September 2007 16:01:08 qemu-devel-request@nongnu.org wrote:
> > does the MEMSUFFIX macro ("kernel" / "user") mean that the memory is
> > access by code running in ring0/ring3 or does this tell about the memory
> > region being access (mem < or > TASK_SIZE / 0xc0000000)?
>
> The former.
ok :-)
>
> > and while I'm asking two other related questions I just don't quite
> > understand:
> >
> > 1.) why does the TLB (e.g. tlb_table[CPU_MEM_INDEX][...]) have 2
> > different arrays? is this because some CPU offer different page sizes
> > depending on a TASK_SIZE border or something??
>
> It makes more sense if you realize it's kernel/user mode not address
> space.
ok... so it's really 1 for user-mode and 1 for kernel-mode...
but will kernel mode always use the TLB[0] for address translation (even for
addresses at e.g. 0x0800ffff) and user mode TLB[1] (even for e.g.
0xc000abcd)? (or the other way round...)
>
> > 2.) the MMUSUFFIX macro ("mmu" / "cmmu") what does this stand for??
>
> cmmu is used to read code to execute, IIRC (different permissions).
ok, thanks!!
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: Re: [Qemu-devel] softmmu macro meaning
2007-09-27 15:02 ` Re: [Qemu-devel] softmmu macro meaning Clemens Kolbitsch
@ 2007-09-27 15:27 ` Daniel Jacobowitz
2007-09-27 16:47 ` Clemens Kolbitsch
0 siblings, 1 reply; 3+ messages in thread
From: Daniel Jacobowitz @ 2007-09-27 15:27 UTC (permalink / raw)
To: Clemens Kolbitsch; +Cc: qemu-devel
On Thu, Sep 27, 2007 at 05:02:46PM +0200, Clemens Kolbitsch wrote:
> but will kernel mode always use the TLB[0] for address translation (even for
> addresses at e.g. 0x0800ffff) and user mode TLB[1] (even for e.g.
> 0xc000abcd)? (or the other way round...)
Which set of TLBs are used depends completely on the current processor
mode. It has nothing to do with the address.
--
Daniel Jacobowitz
CodeSourcery
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] softmmu macro meaning
2007-09-27 15:27 ` Daniel Jacobowitz
@ 2007-09-27 16:47 ` Clemens Kolbitsch
0 siblings, 0 replies; 3+ messages in thread
From: Clemens Kolbitsch @ 2007-09-27 16:47 UTC (permalink / raw)
To: Daniel Jacobowitz; +Cc: qemu-devel
On Thursday 27 September 2007 17:27:32 Daniel Jacobowitz wrote:
> On Thu, Sep 27, 2007 at 05:02:46PM +0200, Clemens Kolbitsch wrote:
> > but will kernel mode always use the TLB[0] for address translation (even
> > for addresses at e.g. 0x0800ffff) and user mode TLB[1] (even for e.g.
> > 0xc000abcd)? (or the other way round...)
>
> Which set of TLBs are used depends completely on the current processor
> mode. It has nothing to do with the address.
ok perfect :-)
thanks!!
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2007-09-27 16:47 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <20070927140247.10904gmx1@mx066.gmx.net>
2007-09-27 15:02 ` Re: [Qemu-devel] softmmu macro meaning Clemens Kolbitsch
2007-09-27 15:27 ` Daniel Jacobowitz
2007-09-27 16:47 ` Clemens Kolbitsch
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.