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From: Tony Lindgren <tony@atomide.com>
To: Rick Bronson <rick@efn.org>
Cc: linux-omap@vger.kernel.org
Subject: Re: ARM: OMAP3: Fix get_irqnr_and_base to clear spurious interrupt bits
Date: Thu, 23 Oct 2008 08:43:46 -0700	[thread overview]
Message-ID: <20081023154346.GB2994@atomide.com> (raw)
In-Reply-To: <E1KsqtQ-0005Xb-EV@amazonia.comcast.net>

* Rick Bronson <rick@efn.org> [081022 20:30]:
> Tony,
> 
>   Here is the patch against the latest git.  I'm a little concerned
> about masking the interrupt number so that the spurious bit are
> ignored.  Do you really want to turn a spurious interrupt into a
> normal (good) interrupt?

No, but having the spurious data mess up the irqnr really confuses
things :)

> > Also, AFAIK we don't have infinitely repeating irqs any longer, it's
> > just an occasional single spurious interrupt.
> 
>   That's correct.  And those disappeared when I applied the S-O patch.
> Without the S-O patch I was seeing one spurious interrupt in about 15
> reboots, after the patch I got zero in 350 reboots.

Yeah so let's update the comment below.

>   Rick
> 
> --- linux-omap-2.6/arch/arm/plat-omap/include/mach/entry-macro.S.git	2008-10-22 20:01:33.000000000 -0700
> +++ linux-omap-2.6/arch/arm/plat-omap/include/mach/entry-macro.S	2008-10-22 20:11:26.000000000 -0700
> @@ -67,6 +67,10 @@
>  
>  #define INTCPS_SIR_IRQ_OFFSET	0x0040		/* Active interrupt offset */
>  #define	ACTIVEIRQ_MASK		0x7f		/* Active interrupt bits */
> +#define INTCPS_CONTROL		0x0048		/* new interrupt agreement bits */
> +#define INTCPS_PENDING_IRQ_1	0x0098		/* IRQ pending reg 1 */
> +#define INTCPS_PENDING_IRQ_2	0x00b8		/* IRQ pending reg 2 */
> +#define INTCPS_PENDING_IRQ_3	0x00d8		/* IRQ pending reg 3 */
>  
>  		.macro	disable_fiq
>  		.endm
> @@ -79,18 +83,20 @@

Are these defines above still needed?


>  
>  		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
>  		ldr	\base, =OMAP2_VA_IC_BASE
> -		ldr	\irqnr, [\base, #0x98] /* IRQ pending reg 1 */
> -		cmp	\irqnr, #0x0
> -		bne	2222f
> -		ldr	\irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
> -		cmp	\irqnr, #0x0
> -		bne	2222f
> -		ldr	\irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
> -		cmp	\irqnr, #0x0
> -2222:
> -		ldrne	\irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
> +		ldr	\irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
> +		cmp	\irqnr, #0  /* check for negative */
> +		movmi	\tmp, #0x1 /* Ack the spurious irq, this lets it
> +					* generate a bad irq error message,
> +					* but prevents infinitely repeating
> +					* irq.
> +					*/
> +		strmi	\tmp, [\base, #INTCPS_CONTROL]
>  		and	\irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */

How about remove the comment for movmi above, and have just a comment
like /* ack spurious irq */ for the strmi instead?

Tony

  reply	other threads:[~2008-10-23 15:43 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-10-23  3:29 ARM: OMAP3: Fix get_irqnr_and_base to clear spurious interrupt bits Rick Bronson
2008-10-23 15:43 ` Tony Lindgren [this message]
  -- strict thread matches above, loose matches on Subject: below --
2008-10-28 16:10 Rick Bronson
2008-10-28 16:31 ` Tony Lindgren
2008-10-31 19:27 ` Tony Lindgren
2008-10-24  4:14 Rick Bronson
2008-10-23 18:13 Rick Bronson
2008-10-23 18:21 ` Tony Lindgren
2008-10-23 17:54 Rick Bronson
2008-10-22 17:48 Rick Bronson
2008-10-22 18:30 ` Tony Lindgren
2008-10-21  4:58 Tony Lindgren
2008-10-21 20:09 ` Felipe Contreras
2008-10-21 20:37   ` Tony Lindgren
2008-10-21 21:34     ` Felipe Contreras
2008-10-21 22:02       ` Tony Lindgren
2008-10-21 23:25         ` Tony Lindgren
2008-10-22 14:46         ` Felipe Contreras
2008-10-22 21:30           ` Nathan Monson
2008-10-22 21:40             ` Felipe Contreras

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