Re: [Qemu-devel] [PATCH 0/4] target-ppc: create TCG slots for registers based on CPU

[Aurelien Jarno <aurelien@aurel32.net>]

On Sat, Mar 28, 2009 at 02:30:13PM -0700, Nathan Froyd wrote:
> For PPC guests, I noticed that we create TCG slots for all the potential
> kinds of registers (float, Altivec, SPE), even if the chip doesn't have
> instructions to access those registers.
> 
> This patch series tweaks the initialization routine to create the TCG
> values for registers necessary for particular classes of instructions
> only if the emulated chip supports those instructions.  The first couple
> of patches are simply busywork of moving things around; the last patch
> is where all the action is at.
> 
> I am not a TCG expert, but there are several loops in TCG over all
> globals and it seems like those loops would go faster if they didn't
> have to consider registers that would never be touched.  If this patch
> series makes no difference in TCG's performance, then I'd be glad to
> have an explanation of why that's the case.

Do you actually have run a benchmark with those changes? TCG is
sometimes a bit strange, and some optimizations does not change the
execution speed, while others improve it a lot. It is very difficult to
predict what will give a gain or not.

Suggestions of benchmarks: gzip/bzip2 on a big file using user emulation
or a compilation in system emulation.

-- 
Aurelien Jarno	                        GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net