Re: [PATCH] ads7846: allocate separate cache lines for tx and rx data

[Alessandro Rubini <rubini-list@gnudd.com>]

>> Since the SPI master might use DMA, tx and rx buffers must live on
>> different cache lines.
> 
> Not true.  Full duplex tranfsers using a single buffer are
> explicitly allowed.

Ok, thanks.

> If that spi_master driver mis-handles this, it's a bug in that
> driver.

Well, the driver receives one spi message made of 4 or 6 transfers.
It does one at a time, shouldn't it?  If the transfer description is
intermixed with the data buffer, we fetch a line from ram with
not-yet-filled input buffers. So I get invalid data from the analog
inputs -- usually zero, as the structure is kzalloced.

>> The issue was discussed with Russell King on linux-arm-kernel.
> 
> Gee, but not with the author of that driver or the maintainer of
> the SPI framework.   Who could have pointed out instantly where
> the true bug resides.

So, where is it? I don't get it I'm sorry.

ps: yes, it's a revB silicon.

/alessandro