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From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: mingo@elte.hu, linux-kernel@vger.kernel.org
Cc: paulus@samba.org, eranian@google.com, robert.richter@amd.com,
	fweisbec@gmail.com, Arnaldo Carvalho de Melo <acme@infradead.org>,
	Peter Zijlstra <a.p.zijlstra@chello.nl>
Subject: [PATCH 4/5] perf, x86: Clear the LBRs on init
Date: Fri, 05 Mar 2010 16:39:30 +0100	[thread overview]
Message-ID: <20100305154128.966563424@chello.nl> (raw)
In-Reply-To: 20100305153926.639506880@chello.nl

[-- Attachment #1: lbr-errata-aak136.patch --]
[-- Type: text/plain, Size: 1916 bytes --]

Some CPUs have errata where the LBR is not cleared on Power-On. So
always clear the LBRs before use.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
---
 arch/x86/kernel/cpu/perf_event_intel.c     |   18 ++++++++++++++++--
 arch/x86/kernel/cpu/perf_event_intel_lbr.c |    3 +++
 2 files changed, 19 insertions(+), 2 deletions(-)

Index: linux-2.6/arch/x86/kernel/cpu/perf_event_intel.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/perf_event_intel.c
+++ linux-2.6/arch/x86/kernel/cpu/perf_event_intel.c
@@ -775,6 +775,20 @@ static __initconst struct x86_pmu core_p
 	.event_constraints	= intel_core_event_constraints,
 };
 
+static void intel_pmu_cpu_starting(int cpu)
+{
+	init_debug_store_on_cpu(cpu);
+	/*
+	 * Deal with CPUs that don't clear their LBRs on power-up.
+	 */
+	intel_pmu_lbr_reset();
+}
+
+static void intel_pmu_cpu_dying(int cpu)
+{
+	fini_debug_store_on_cpu(cpu);
+}
+
 static __initconst struct x86_pmu intel_pmu = {
 	.name			= "Intel",
 	.handle_irq		= intel_pmu_handle_irq,
@@ -796,8 +810,8 @@ static __initconst struct x86_pmu intel_
 	.max_period		= (1ULL << 31) - 1,
 	.get_event_constraints	= intel_get_event_constraints,
 
-	.cpu_starting		= init_debug_store_on_cpu,
-	.cpu_dying		= fini_debug_store_on_cpu,
+	.cpu_starting		= intel_pmu_cpu_starting,
+	.cpu_dying		= intel_pmu_cpu_dying,
 };
 
 static void intel_clowertown_quirks(void)
Index: linux-2.6/arch/x86/kernel/cpu/perf_event_intel_lbr.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ linux-2.6/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -53,6 +53,9 @@ static void intel_pmu_lbr_reset_64(void)
 
 static void intel_pmu_lbr_reset(void)
 {
+	if (!x86_pmu.lbr_nr)
+		return;
+
 	if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_32)
 		intel_pmu_lbr_reset_32();
 	else

-- 


  parent reply	other threads:[~2010-03-05 15:43 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-05 15:39 [PATCH 0/5] PEBS and LBR fixes Peter Zijlstra
2010-03-05 15:39 ` [PATCH 1/5] perf: Rework the arch CPU-hotplug hooks Peter Zijlstra
2010-03-10 13:10   ` [tip:perf/urgent] perf: Rework and fix " tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 2/5] perf, x86: Fix silly bug in data store buffer allocation Peter Zijlstra
2010-03-10 13:20   ` [tip:perf/pebs] " tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 3/5] perf, x86: Disable PEBS on clowertown chips Peter Zijlstra
2010-03-05 18:58   ` Stephane Eranian
2010-03-05 19:15     ` Peter Zijlstra
2010-03-05 19:28       ` Stephane Eranian
2010-03-05 19:37         ` Peter Zijlstra
2010-03-05 21:05       ` Peter Zijlstra
2010-03-05 21:22         ` Stephane Eranian
2010-03-05 21:35           ` Peter Zijlstra
2010-03-05 21:38             ` Stephane Eranian
2010-03-05 21:43               ` Peter Zijlstra
2010-03-05 21:57                 ` Stephane Eranian
2010-03-05 22:25                   ` Peter Zijlstra
2010-03-05 22:33                     ` Stephane Eranian
2010-03-10 13:21   ` [tip:perf/pebs] perf, x86: Disable PEBS on clovertown chips tip-bot for Peter Zijlstra
2010-03-05 15:39 ` Peter Zijlstra [this message]
2010-03-10 13:21   ` [tip:perf/pebs] perf, x86: Clear the LBRs on init tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 5/5] perf, x86: Robustify PEBS fixup Peter Zijlstra
2010-03-10 13:21   ` [tip:perf/pebs] " tip-bot for Peter Zijlstra

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