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From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: mingo@elte.hu, linux-kernel@vger.kernel.org
Cc: paulus@samba.org, eranian@google.com, robert.richter@amd.com,
	fweisbec@gmail.com, Arnaldo Carvalho de Melo <acme@infradead.org>,
	Peter Zijlstra <a.p.zijlstra@chello.nl>
Subject: [PATCH 5/5] perf, x86: Robustify PEBS fixup
Date: Fri, 05 Mar 2010 16:39:31 +0100	[thread overview]
Message-ID: <20100305154129.042271287@chello.nl> (raw)
In-Reply-To: 20100305153926.639506880@chello.nl

[-- Attachment #1: pebs-robustify-fixup.patch --]
[-- Type: text/plain, Size: 1650 bytes --]

It turns out the LBR is massively unreliable on certain CPUs, so code
the fixup a little more defensive to avoid crashing the kernel.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
---
 arch/x86/kernel/cpu/perf_event_intel_ds.c |   21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

Index: linux-2.6/arch/x86/kernel/cpu/perf_event_intel_ds.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ linux-2.6/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -399,10 +399,23 @@ static int intel_pmu_pebs_fixup_ip(struc
 	if (!x86_pmu.intel_cap.pebs_trap)
 		return 1;
 
+	/*
+	 * No LBR entry, no basic block, no rewinding
+	 */
 	if (!cpuc->lbr_stack.nr || !from || !to)
 		return 0;
 
-	if (ip < to)
+	/*
+	 * Basic blocks should never cross user/kernel boundaries
+	 */
+	if (kernel_ip(ip) != kernel_ip(to))
+		return 0;
+
+	/*
+	 * unsigned math, either ip is before the start (impossible) or
+	 * the basic block is larger than 1 page (sanity)
+	 */
+	if ((ip - to) > PAGE_SIZE)
 		return 0;
 
 	/*
@@ -420,7 +433,7 @@ static int intel_pmu_pebs_fixup_ip(struc
 
 		old_to = to;
 		if (!kernel_ip(ip)) {
-			int bytes, size = min_t(int, MAX_INSN_SIZE, ip - to);
+			int bytes, size = MAX_INSN_SIZE;
 
 			bytes = copy_from_user_nmi(buf, (void __user *)to, size);
 			if (bytes != size)
@@ -440,6 +453,10 @@ static int intel_pmu_pebs_fixup_ip(struc
 		return 1;
 	}
 
+	/*
+	 * Even though we decoded the basic block, the instruction stream
+	 * never matched the given IP, either the TO or the IP got corrupted.
+	 */
 	return 0;
 }
 

-- 


  parent reply	other threads:[~2010-03-05 15:43 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-05 15:39 [PATCH 0/5] PEBS and LBR fixes Peter Zijlstra
2010-03-05 15:39 ` [PATCH 1/5] perf: Rework the arch CPU-hotplug hooks Peter Zijlstra
2010-03-10 13:10   ` [tip:perf/urgent] perf: Rework and fix " tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 2/5] perf, x86: Fix silly bug in data store buffer allocation Peter Zijlstra
2010-03-10 13:20   ` [tip:perf/pebs] " tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 3/5] perf, x86: Disable PEBS on clowertown chips Peter Zijlstra
2010-03-05 18:58   ` Stephane Eranian
2010-03-05 19:15     ` Peter Zijlstra
2010-03-05 19:28       ` Stephane Eranian
2010-03-05 19:37         ` Peter Zijlstra
2010-03-05 21:05       ` Peter Zijlstra
2010-03-05 21:22         ` Stephane Eranian
2010-03-05 21:35           ` Peter Zijlstra
2010-03-05 21:38             ` Stephane Eranian
2010-03-05 21:43               ` Peter Zijlstra
2010-03-05 21:57                 ` Stephane Eranian
2010-03-05 22:25                   ` Peter Zijlstra
2010-03-05 22:33                     ` Stephane Eranian
2010-03-10 13:21   ` [tip:perf/pebs] perf, x86: Disable PEBS on clovertown chips tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 4/5] perf, x86: Clear the LBRs on init Peter Zijlstra
2010-03-10 13:21   ` [tip:perf/pebs] " tip-bot for Peter Zijlstra
2010-03-05 15:39 ` Peter Zijlstra [this message]
2010-03-10 13:21   ` [tip:perf/pebs] perf, x86: Robustify PEBS fixup tip-bot for Peter Zijlstra

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