From: Robert Richter <robert.richter@amd.com>
To: Corey Ashford <cjashfor@linux.vnet.ibm.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>,
Ingo Molnar <mingo@elte.hu>,
Stephane Eranian <eranian@google.com>,
LKML <linux-kernel@vger.kernel.org>,
Lin Ming <ming.m.lin@intel.com>
Subject: Re: [PATCH 1/7] perf: introduce raw_type attribute to specify the type of a raw sample
Date: Fri, 21 May 2010 00:46:25 +0200 [thread overview]
Message-ID: <20100520224625.GW21799@erda.amd.com> (raw)
In-Reply-To: <4BF46000.20203@linux.vnet.ibm.com>
On 19.05.10 18:02:40, Corey Ashford wrote:
> > perf record -e r186A:IBS_FETCH ...
> > perf record -e r0:IBS_FETCH -c 100000 ...
>
> Should this raw value have been 186A0 instead of 186A?
This is the 20 bit value of the cycle count, but only bits 19:4 are
encoded in bits 15:0 of the raw ibs register. Lower 4 bits of the
cycle count must be null and thus not pushed to the register. The raw
register setup is correct.
> Where is the named type translation coming from? Is this something
> that needs to be hard-coded into perf?
I was thinking of an enum or macro definition for the values in the
kernel. A name mapping table could be implemented at least in the
userspace, if needed maybe also in the kernel.
> Have you looked at Lin Ming's patch series? I think it offers
> another way to support IBS and other arch-specific and off-chip PMUs
> in a more general way, though it's not quite fully-baked yet.
Yes, this could be an option too. The proposal was some days ago and a
little hidden in its subject, so I missed it first. But the concept of
registering a pmu feature looks good and could be an alternative to
the raw_value approach.
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com
next prev parent reply other threads:[~2010-05-20 22:46 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-19 21:20 [PATCH 0/7] perf: implement AMD IBS (v2) Robert Richter
2010-05-19 21:20 ` [PATCH 1/7] perf: introduce raw_type attribute to specify the type of a raw sample Robert Richter
2010-05-19 22:02 ` Corey Ashford
2010-05-20 6:51 ` Ingo Molnar
2010-05-20 23:06 ` Robert Richter
2010-05-20 22:46 ` Robert Richter [this message]
2010-05-20 8:10 ` Stephane Eranian
2010-05-20 9:23 ` Peter Zijlstra
2010-05-20 9:42 ` Stephane Eranian
2010-05-20 10:37 ` Peter Zijlstra
2010-05-20 12:13 ` Stephane Eranian
2010-05-20 15:22 ` Robert Richter
2012-11-23 12:00 ` Robert Richter
2010-05-20 14:08 ` Robert Richter
2010-05-20 16:55 ` Ingo Molnar
2010-05-20 17:07 ` Robert Richter
2010-05-20 17:16 ` Peter Zijlstra
2010-05-20 13:58 ` Robert Richter
2010-05-20 14:14 ` Stephane Eranian
2010-05-20 14:30 ` Stephane Eranian
2010-05-20 15:48 ` Robert Richter
2010-05-19 21:20 ` [PATCH 2/7] perf, x86: introduce bit range for special pmu events Robert Richter
2010-05-19 21:20 ` [PATCH 3/7] perf, x86: modify some code to allow the introduction of ibs events Robert Richter
2010-05-19 21:20 ` [PATCH 4/7] perf, x86: implement IBS feature detection Robert Richter
2010-05-19 21:20 ` [PATCH 5/7] perf, x86: setup NMI handler for IBS Robert Richter
2010-05-19 21:20 ` [PATCH 6/7] perf, x86: implement AMD IBS event configuration Robert Richter
2010-05-19 21:20 ` [PATCH 7/7] perf, x86: implement the ibs interrupt handler Robert Richter
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