From: Robert Richter <robert.richter@amd.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Stephane Eranian <eranian@google.com>,
LKML <linux-kernel@vger.kernel.org>,
Lin Ming <ming.m.lin@intel.com>
Subject: Re: [PATCH 1/7] perf: introduce raw_type attribute to specify the type of a raw sample
Date: Fri, 21 May 2010 01:06:30 +0200 [thread overview]
Message-ID: <20100520230629.GX21799@erda.amd.com> (raw)
In-Reply-To: <20100520065143.GA14480@elte.hu>
On 20.05.10 02:51:43, Ingo Molnar wrote:
> Whether IBS fits that category is an open question -
> ideally it should have similar high level usage as the
> PEBS/LBR bits on Intel CPUs. (at least as far as tooling
> goes)
Ingo,
high level usage is from the perspective of perf tools. IBS delivers
high detailed diagnostic data that is also processed by userland tools
other than perf. If we would introduce another interface layer it
becomes much harder for such tools to use the pmu via this layer. The
raw data is of much more interest here for users. If we think of
perf_event as a subsystem controlling the pmu in a single instance, it
should provide access to set and get raw pmu registers. I see this as
a necessary feature.
Nevertheless I agree that key features should be exposed also with a
high level interface and if possible in an abstracted non-model
specific way.
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com
next prev parent reply other threads:[~2010-05-20 23:06 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-19 21:20 [PATCH 0/7] perf: implement AMD IBS (v2) Robert Richter
2010-05-19 21:20 ` [PATCH 1/7] perf: introduce raw_type attribute to specify the type of a raw sample Robert Richter
2010-05-19 22:02 ` Corey Ashford
2010-05-20 6:51 ` Ingo Molnar
2010-05-20 23:06 ` Robert Richter [this message]
2010-05-20 22:46 ` Robert Richter
2010-05-20 8:10 ` Stephane Eranian
2010-05-20 9:23 ` Peter Zijlstra
2010-05-20 9:42 ` Stephane Eranian
2010-05-20 10:37 ` Peter Zijlstra
2010-05-20 12:13 ` Stephane Eranian
2010-05-20 15:22 ` Robert Richter
2012-11-23 12:00 ` Robert Richter
2010-05-20 14:08 ` Robert Richter
2010-05-20 16:55 ` Ingo Molnar
2010-05-20 17:07 ` Robert Richter
2010-05-20 17:16 ` Peter Zijlstra
2010-05-20 13:58 ` Robert Richter
2010-05-20 14:14 ` Stephane Eranian
2010-05-20 14:30 ` Stephane Eranian
2010-05-20 15:48 ` Robert Richter
2010-05-19 21:20 ` [PATCH 2/7] perf, x86: introduce bit range for special pmu events Robert Richter
2010-05-19 21:20 ` [PATCH 3/7] perf, x86: modify some code to allow the introduction of ibs events Robert Richter
2010-05-19 21:20 ` [PATCH 4/7] perf, x86: implement IBS feature detection Robert Richter
2010-05-19 21:20 ` [PATCH 5/7] perf, x86: setup NMI handler for IBS Robert Richter
2010-05-19 21:20 ` [PATCH 6/7] perf, x86: implement AMD IBS event configuration Robert Richter
2010-05-19 21:20 ` [PATCH 7/7] perf, x86: implement the ibs interrupt handler Robert Richter
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