From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Keith Packard <keithp@keithp.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: apply phase pointer override on SNB+ too
Date: Fri, 29 Jul 2011 12:43:42 -0700 [thread overview]
Message-ID: <20110729124342.68aaffca@jbarnes-desktop> (raw)
In-Reply-To: <yuntya4hqjo.fsf@aiko.keithp.com>
On Fri, 29 Jul 2011 11:47:55 -0700
Keith Packard <keithp@keithp.com> wrote:
> On Fri, 29 Jul 2011 10:50:11 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>
> > + flags |= FDI_PHASE_SYNC_OVR(pipe);
> > + I915_WRITE(SOUTH_CHICKEN1, flags); /* once to unlock... */
> > + flags |= FDI_PHASE_SYNC_EN(pipe);
> > + I915_WRITE(SOUTH_CHICKEN1, flags); /* then again to enable */
> > + POSTING_READ(SOUTH_CHICKEN1);
> > +}
>
> ooh, this even makes the sequence of two writes sound sensible.
>
> Reviewed-by: Keith Packard <keithp@keithp.com>
>
> You didn't happen to check the register values after doing this, did
> you? Just to verify that all of the crazy math works, given that we
> can't actually test whether this fixes anything.
>
Tricky. I need to call this in the gen6 and ivb training routines
rather than the ilk one... Bits seem to be getting set correctly with
the last patch.
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2011-07-29 19:43 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-29 17:50 [PATCH] drm/i915: apply phase pointer override on SNB+ too Jesse Barnes
2011-07-29 18:47 ` Keith Packard
2011-07-29 19:43 ` Jesse Barnes [this message]
-- strict thread matches above, loose matches on Subject: below --
2011-07-29 19:42 Jesse Barnes
2011-07-29 21:22 ` Keith Packard
2011-07-29 21:55 ` Jesse Barnes
2011-07-29 0:07 Jesse Barnes
2011-07-29 17:28 ` Keith Packard
2011-07-29 0:06 Jesse Barnes
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