Re: [Qemu-devel] [0/10] Preliminary work for IOMMU emulation support; the easy bits

[Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>]

On Thu, Sep 01, 2011 at 03:00:53PM +1000, David Gibson wrote:
> A while back, Eduard - Gabriel Munteanu send a series of patches
> implementing support for emulating the AMD IOMMU in conjunction with
> qemu emulated PCI devices.  A revised patch series added support for
> the Intel IOMMU, and I also send a revised version of this series
> which added support for the hypervisor mediated IOMMU on the pseries
> machine.
> 
> Richard Henderson also weighed in on the discussion, and there's still
> a fair bit to be thrashed out in terms of exactly how to set up an
> IOMMU / DMA translation subsystem.
> 
> However, really only 2 or 3 patches in any of these series have
> contained anything interesting.  The rest of the series has been
> converting existing PCI emulated devices to use the new DMA interface
> which worked through the IOMMU translation, whatever it was.  While we
> keep working out what we want for the guts of the IOMMU support, these
> device conversion patches keep bitrotting against updates to the
> various device implementations themselves.

Hi,

This sounds like a good idea. We should be able to agree on these bits,
at least, and get them merged.

> Really, regardless of whether we're actually implementing IOMMU
> translation, it makes sense that qemu code should distinguish between
> when it is really operating in CPU physical addresses and when it is
> operating in bus or DMA addresses which might have some kind of
> translation into physical addresses.
> 
> This series, therefore, begins the conversion of existing PCI device
> emulation code to use new (stub) pci dma access functions.  These are
> for now, just defined to be untranslated cpu physical memory accesses,
> as before, but has two advantages:
> 
>    * It becomes obvious where the code is working with dma addresses,
>      so it's easier to grep for what might be affected by an IOMMU or
>      other bus address translation.
> 
>    * The new stubs take the PCIDevice *, from which any of the various
>      suggested IOMMU interfaces should be able to locate the correct
>      IOMMU translation context.
> 
> This series only converts the easy cases so far.  That is simple
> direct DMA access from device code:
> cpu_physical_memory_{read,write}(), ld*_phys() and st*_phys().  It
> doesn't handle devices which use the scatter/gather code (just ide and
> UHCI, so far).  I plan to address that later, but I have some details
> still to work out.

I think AHCI belongs on that list too, my patches didn't handle it
either.

Somewhere down the road we could try to poison the old cpu_*
interfaces, as suggested by others before.

> Anthony, please apply.

It's nice to see this topic got revived. I'll try to post my latest
SeaBIOS patches these days. The reason I didn't last time was I didn't
get much review/acks/naks on the IOMMU patches from core devs. Hopefully
things will go smoother this time.


	Cheers,
	Eduard