From: Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
To: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linaro-mm-sig-bounces-cunTk1MwBs8s++Sfvej+rw@public.gmane.org
Subject: Re: [PATCH 1/2] ARM: IOMMU: Tegra20: Add iommu_ops for GART driver
Date: Mon, 23 Jan 2012 16:00:48 +0100 [thread overview]
Message-ID: <20120123150048.GB6269@8bytes.org> (raw)
In-Reply-To: <1325747509-29665-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Hi,
first, some questions about the GART on your platform.
1) How many GARTs are usually implemented? One GART per device or is
there a single GART covering all devices, or a mix of both?
2) Are devices allowed to DMA outside of the remappable range or will
this fail?
Besides that I think IOMMU-API is not yet fully ready for GART-like
drivers like this one. But I will merge it anyway to get things moving.
But please answer or fix my objections first.
On Thu, Jan 05, 2012 at 09:11:48AM +0200, Hiroshi DOYU wrote:
> +static void gart_iommu_domain_destroy(struct iommu_domain *domain)
> +{
> + struct gart_device *gart = domain->priv;
> +
> + spin_lock(&gart->client_lock);
> + if (!list_empty(&gart->client)) {
> + struct gart_client *c;
> +
> + list_for_each_entry(c, &gart->client, list)
> + dev_err(gart->dev,
> + "%s is still attached\n", dev_name(c->dev));
> + }
> + spin_unlock(&gart->client_lock);
gart needs a NULL check. When you create a domain and immediatly destroy
it without ever attaching a device this code will dereference a NULL
pointer.
As a general improvement I suggest that you introduce a gart_domain
structure and store it in domain->priv (assigned in domain_init) instead
of using the hardware descriptor.
> +static int gart_iommu_attach_dev(struct iommu_domain *domain,
> + struct device *dev)
> +{
> + struct gart_device *gart;
> + struct gart_client *client, *c;
> + int err = 0;
> +
> + gart = dev_get_drvdata(dev->parent);
> + if (!gart)
> + return -EINVAL;
> + domain->priv = gart;
What happens when devices behind different GARTs are assigned to the
same domain? domain->priv can only hold a pointer to one hardware GART.
This can be solved by a 'struct gart_domain' holding a linked list to
all gart_devices in this domain.
Joerg
WARNING: multiple messages have this Message-ID (diff)
From: joro@8bytes.org (Joerg Roedel)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] ARM: IOMMU: Tegra20: Add iommu_ops for GART driver
Date: Mon, 23 Jan 2012 16:00:48 +0100 [thread overview]
Message-ID: <20120123150048.GB6269@8bytes.org> (raw)
In-Reply-To: <1325747509-29665-2-git-send-email-hdoyu@nvidia.com>
Hi,
first, some questions about the GART on your platform.
1) How many GARTs are usually implemented? One GART per device or is
there a single GART covering all devices, or a mix of both?
2) Are devices allowed to DMA outside of the remappable range or will
this fail?
Besides that I think IOMMU-API is not yet fully ready for GART-like
drivers like this one. But I will merge it anyway to get things moving.
But please answer or fix my objections first.
On Thu, Jan 05, 2012 at 09:11:48AM +0200, Hiroshi DOYU wrote:
> +static void gart_iommu_domain_destroy(struct iommu_domain *domain)
> +{
> + struct gart_device *gart = domain->priv;
> +
> + spin_lock(&gart->client_lock);
> + if (!list_empty(&gart->client)) {
> + struct gart_client *c;
> +
> + list_for_each_entry(c, &gart->client, list)
> + dev_err(gart->dev,
> + "%s is still attached\n", dev_name(c->dev));
> + }
> + spin_unlock(&gart->client_lock);
gart needs a NULL check. When you create a domain and immediatly destroy
it without ever attaching a device this code will dereference a NULL
pointer.
As a general improvement I suggest that you introduce a gart_domain
structure and store it in domain->priv (assigned in domain_init) instead
of using the hardware descriptor.
> +static int gart_iommu_attach_dev(struct iommu_domain *domain,
> + struct device *dev)
> +{
> + struct gart_device *gart;
> + struct gart_client *client, *c;
> + int err = 0;
> +
> + gart = dev_get_drvdata(dev->parent);
> + if (!gart)
> + return -EINVAL;
> + domain->priv = gart;
What happens when devices behind different GARTs are assigned to the
same domain? domain->priv can only hold a pointer to one hardware GART.
This can be solved by a 'struct gart_domain' holding a linked list to
all gart_devices in this domain.
Joerg
WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org>
To: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: iommu@lists.linux-foundation.org,
linux-arm-kernel@lists.infradead.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linaro-mm-sig-bounces@lists.linaro.org
Subject: Re: [PATCH 1/2] ARM: IOMMU: Tegra20: Add iommu_ops for GART driver
Date: Mon, 23 Jan 2012 16:00:48 +0100 [thread overview]
Message-ID: <20120123150048.GB6269@8bytes.org> (raw)
In-Reply-To: <1325747509-29665-2-git-send-email-hdoyu@nvidia.com>
Hi,
first, some questions about the GART on your platform.
1) How many GARTs are usually implemented? One GART per device or is
there a single GART covering all devices, or a mix of both?
2) Are devices allowed to DMA outside of the remappable range or will
this fail?
Besides that I think IOMMU-API is not yet fully ready for GART-like
drivers like this one. But I will merge it anyway to get things moving.
But please answer or fix my objections first.
On Thu, Jan 05, 2012 at 09:11:48AM +0200, Hiroshi DOYU wrote:
> +static void gart_iommu_domain_destroy(struct iommu_domain *domain)
> +{
> + struct gart_device *gart = domain->priv;
> +
> + spin_lock(&gart->client_lock);
> + if (!list_empty(&gart->client)) {
> + struct gart_client *c;
> +
> + list_for_each_entry(c, &gart->client, list)
> + dev_err(gart->dev,
> + "%s is still attached\n", dev_name(c->dev));
> + }
> + spin_unlock(&gart->client_lock);
gart needs a NULL check. When you create a domain and immediatly destroy
it without ever attaching a device this code will dereference a NULL
pointer.
As a general improvement I suggest that you introduce a gart_domain
structure and store it in domain->priv (assigned in domain_init) instead
of using the hardware descriptor.
> +static int gart_iommu_attach_dev(struct iommu_domain *domain,
> + struct device *dev)
> +{
> + struct gart_device *gart;
> + struct gart_client *client, *c;
> + int err = 0;
> +
> + gart = dev_get_drvdata(dev->parent);
> + if (!gart)
> + return -EINVAL;
> + domain->priv = gart;
What happens when devices behind different GARTs are assigned to the
same domain? domain->priv can only hold a pointer to one hardware GART.
This can be solved by a 'struct gart_domain' holding a linked list to
all gart_devices in this domain.
Joerg
next prev parent reply other threads:[~2012-01-23 15:00 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-05 7:11 [PATCH v3 0/2] ARM: IOMMU: tegra: Add iommu_ops for GART/SMMU driver Hiroshi DOYU
2012-01-05 7:11 ` Hiroshi DOYU
2012-01-05 7:11 ` Hiroshi DOYU
2012-01-05 7:11 ` [PATCH 1/2] ARM: IOMMU: Tegra20: Add iommu_ops for GART driver Hiroshi DOYU
2012-01-05 7:11 ` Hiroshi DOYU
[not found] ` <1325747509-29665-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-23 15:00 ` Joerg Roedel [this message]
2012-01-23 15:00 ` Joerg Roedel
2012-01-23 15:00 ` Joerg Roedel
[not found] ` <20120123150048.GB6269-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2012-01-25 7:40 ` Hiroshi Doyu
2012-01-25 7:40 ` Hiroshi Doyu
2012-01-25 7:40 ` Hiroshi Doyu
[not found] ` <20120125.094020.983282777619146490.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-26 11:58 ` joro-zLv9SwRftAIdnm+yROfE0A
2012-01-26 11:58 ` joro
2012-01-26 11:58 ` joro at 8bytes.org
[not found] ` <20120126115813.GF6269-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2012-01-26 14:45 ` Hiroshi Doyu
2012-01-26 14:45 ` Hiroshi Doyu
2012-01-26 14:45 ` Hiroshi Doyu
2012-01-05 7:11 ` [PATCH 2/2] ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver Hiroshi DOYU
2012-01-05 7:11 ` Hiroshi DOYU
[not found] ` <1325747509-29665-3-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-23 15:43 ` Joerg Roedel
2012-01-23 15:43 ` Joerg Roedel
2012-01-23 15:43 ` Joerg Roedel
[not found] ` <20120123154310.GC6269-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2012-01-24 9:57 ` Hiroshi Doyu
2012-01-24 9:57 ` Hiroshi Doyu
2012-01-24 9:57 ` Hiroshi Doyu
[not found] ` <20120124.115701.2179509760878976509.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-24 11:04 ` Joerg Roedel
2012-01-24 11:04 ` Joerg Roedel
2012-01-24 11:04 ` Joerg Roedel
[not found] ` <20120124110444.GB19255-5C7GfCeVMHo@public.gmane.org>
2012-01-24 11:36 ` Hiroshi Doyu
2012-01-24 11:36 ` Hiroshi Doyu
2012-01-24 11:36 ` Hiroshi Doyu
[not found] ` <20120124.133614.1646093482547685131.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-24 11:57 ` joerg.roedel-5C7GfCeVMHo
2012-01-24 11:57 ` joerg.roedel
2012-01-24 11:57 ` joerg.roedel at amd.com
[not found] ` <20120124115723.GC19255-5C7GfCeVMHo@public.gmane.org>
2012-01-24 12:07 ` Hiroshi Doyu
2012-01-24 12:07 ` Hiroshi Doyu
2012-01-24 12:07 ` Hiroshi Doyu
2012-01-24 13:41 ` Hiroshi Doyu
2012-01-24 13:41 ` Hiroshi Doyu
2012-01-24 13:41 ` Hiroshi Doyu
[not found] ` <20120124.154121.1062920821192552748.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-24 13:46 ` Felipe Balbi
2012-01-24 13:46 ` Felipe Balbi
2012-01-24 13:46 ` Felipe Balbi
[not found] ` <20120124134601.GT27414-UiBtZHVXSwEVvW8u9ZQWYwjfymiNCTlR@public.gmane.org>
2012-01-24 14:25 ` joro-zLv9SwRftAIdnm+yROfE0A
2012-01-24 14:25 ` joro
2012-01-24 14:25 ` joro at 8bytes.org
[not found] ` <20120124142521.GE6269-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2012-01-25 7:39 ` Hiroshi Doyu
2012-01-25 7:39 ` Hiroshi Doyu
2012-01-25 7:39 ` Hiroshi Doyu
[not found] ` <20120125.093932.783007031082378997.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-26 14:59 ` joro-zLv9SwRftAIdnm+yROfE0A
2012-01-26 14:59 ` joro
2012-01-26 14:59 ` joro at 8bytes.org
[not found] ` <1325747509-29665-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-05 7:17 ` [PATCH v3 0/2] ARM: IOMMU: tegra: Add iommu_ops for GART/SMMU driver Hiroshi Doyu
2012-01-05 7:17 ` Hiroshi Doyu
2012-01-05 7:17 ` Hiroshi Doyu
[not found] ` <20120105091718.3fb378b2a1d390f9dd63c396-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-05 12:53 ` Russell King - ARM Linux
2012-01-05 12:53 ` Russell King - ARM Linux
2012-01-05 12:53 ` Russell King - ARM Linux
[not found] ` <20120105125326.GT11810-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2012-01-05 14:29 ` Hiroshi Doyu
2012-01-05 14:29 ` Hiroshi Doyu
2012-01-05 14:29 ` Hiroshi Doyu
[not found] ` <20120105.162930.604365154868332443.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-01-05 14:46 ` Russell King - ARM Linux
2012-01-05 14:46 ` Russell King - ARM Linux
2012-01-05 14:46 ` Russell King - ARM Linux
[not found] ` <20120105144631.GV11810-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2012-01-11 14:24 ` Hiroshi Doyu
2012-01-11 14:24 ` Hiroshi Doyu
2012-01-11 14:24 ` Hiroshi Doyu
2012-01-09 0:39 ` KyongHo Cho
2012-01-09 0:39 ` KyongHo Cho
2012-01-09 11:45 ` Russell King - ARM Linux
2012-01-09 11:45 ` Russell King - ARM Linux
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