Re: [PATCH RESEND 2/2] i2c: pnx: Fix read transactions of >= 2 bytes

[Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>]

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On Wed, Aug 08, 2012 at 09:42:32AM +0200, Roland Stigge wrote:
> On transactions with n>=2 bytes, the controller actually wrongly clocks in n+1
> bytes. This is caused by the (wrong) assumption that RFE in the Status Register
> is 1 iff there is no byte already ordered (via a dummy TX byte). This lead to
> the implementation of synchronized byte ordering, e.g.:
> 
> Dummy-TX - RX - Dummy-TX - RX - ...
> 
> But since RFE actually stays high after some Dummy-TX, it rather looks like:
> 
> Dummy-TX - Dummy-TX - RX - Dummy-TX - RX - (RX)
> 
> The last RX byte is clocked in by the bus controller, but ignored by the kernel
> when filling the userspace buffer.
> 
> This patch fixes the issue by asking for RX via Dummy-TX asynchronously.
> Introducing a separate counter for TX bytes.
> 
> Signed-off-by: Roland Stigge <stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>
> 
> ---
> Applies to v3.6-rc1
> 
> This patch for i2c-pnx affects PNX4008 and LPC32xx (and LPC31xx, not yet in
> mainline). Can you please test?
> 
> Thanks in advance!

I assume you checked this on LPC32xx? I'll wait a bit more but tend to
take the patch anyhow, even if there is no explicit ACK from PNX.

-- 
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

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