* [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register @ 2012-09-24 13:32 Paulo Zanoni 2012-09-24 13:32 ` [PATCH 2/2] drm/i915: make sure we write at least 32 DIP bytes Paulo Zanoni 2012-09-24 22:12 ` [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register Rodrigo Vivi 0 siblings, 2 replies; 8+ messages in thread From: Paulo Zanoni @ 2012-09-24 13:32 UTC (permalink / raw) To: intel-gfx; +Cc: Paulo Zanoni From: Paulo Zanoni <paulo.r.zanoni@intel.com> This should never happen, but the silent "return" makes me wonder every time I try to debug InfoFrame bugs, so promote this to BUG() to make sure people will complain if we ever break this. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> --- drivers/gpu/drm/i915/intel_hdmi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 229897f..f9fb47c 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -377,6 +377,7 @@ static void g4x_set_infoframes(struct drm_encoder *encoder, port = VIDEO_DIP_PORT_C; break; default: + BUG(); return; } @@ -435,6 +436,7 @@ static void ibx_set_infoframes(struct drm_encoder *encoder, port = VIDEO_DIP_PORT_D; break; default: + BUG(); return; } -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/i915: make sure we write at least 32 DIP bytes 2012-09-24 13:32 [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register Paulo Zanoni @ 2012-09-24 13:32 ` Paulo Zanoni 2012-09-24 22:08 ` Rodrigo Vivi 2012-09-25 16:23 ` [PATCH] drm/i915: make sure we write all the DIP data bytes Paulo Zanoni 2012-09-24 22:12 ` [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register Rodrigo Vivi 1 sibling, 2 replies; 8+ messages in thread From: Paulo Zanoni @ 2012-09-24 13:32 UTC (permalink / raw) To: intel-gfx; +Cc: Paulo Zanoni, stable From: Paulo Zanoni <paulo.r.zanoni@intel.com> If we don't write at least 32 DIP bytes the InfoFrame ECC may not be correctly calculated in some cases (e.g., when changing the port), and this will lead to black screens on HDMI monitors. The ECC value is generated by the hardware. I don't see how this should break anything since we're writing 0 and that should be the correct value, so this patch should be safe. This patch fixes bug #46761, which is marked as a regression introduced by commit 4e89ee174bb2da341bf90a84321c7008a3c9210d: drm/i915: set the DIP port on ibx_write_infoframe Before commit 4e89 we were just failing to send AVI infoframes when we needed to change the port, which can lead to black screens in some cases. After commit 4e89 we started sending infoframes, but with a possibly wrong ECC value. After this patch I hope we start sending correct infoframes. Cc: stable@vger.kernel.org Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=46761 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> --- drivers/gpu/drm/i915/intel_hdmi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index f9fb47c..4ca355e 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -151,6 +151,8 @@ static void g4x_write_infoframe(struct drm_encoder *encoder, I915_WRITE(VIDEO_DIP_DATA, *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(VIDEO_DIP_DATA, 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -186,6 +188,8 @@ static void ibx_write_infoframe(struct drm_encoder *encoder, I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -224,6 +228,8 @@ static void cpt_write_infoframe(struct drm_encoder *encoder, I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -259,6 +265,8 @@ static void vlv_write_infoframe(struct drm_encoder *encoder, I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -292,6 +300,8 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, I915_WRITE(data_reg + i, *data); data++; } + for (; i < 32; i += 4) + I915_WRITE(data_reg + i, 0); mmiowb(); val |= hsw_infoframe_enable(frame); -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/i915: make sure we write at least 32 DIP bytes 2012-09-24 13:32 ` [PATCH 2/2] drm/i915: make sure we write at least 32 DIP bytes Paulo Zanoni @ 2012-09-24 22:08 ` Rodrigo Vivi 2012-09-25 16:23 ` [PATCH] drm/i915: make sure we write all the DIP data bytes Paulo Zanoni 1 sibling, 0 replies; 8+ messages in thread From: Rodrigo Vivi @ 2012-09-24 22:08 UTC (permalink / raw) To: Paulo Zanoni; +Cc: intel-gfx, Paulo Zanoni, stable I know almost nothing about hdmi infoframes, but isn't hdmi infoframes limited to 30 bytes + 1 checksum byte? (From HDMI Spec 8.2 section) On Mon, Sep 24, 2012 at 10:32 AM, Paulo Zanoni <przanoni@gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > If we don't write at least 32 DIP bytes the InfoFrame ECC may not be > correctly calculated in some cases (e.g., when changing the port), and > this will lead to black screens on HDMI monitors. The ECC value is > generated by the hardware. > > I don't see how this should break anything since we're writing 0 and > that should be the correct value, so this patch should be safe. > > This patch fixes bug #46761, which is marked as a regression > introduced by commit 4e89ee174bb2da341bf90a84321c7008a3c9210d: > drm/i915: set the DIP port on ibx_write_infoframe > > Before commit 4e89 we were just failing to send AVI infoframes when we > needed to change the port, which can lead to black screens in some > cases. After commit 4e89 we started sending infoframes, but with a > possibly wrong ECC value. After this patch I hope we start sending > correct infoframes. > > Cc: stable@vger.kernel.org > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=46761 > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/intel_hdmi.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index f9fb47c..4ca355e 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -151,6 +151,8 @@ static void g4x_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(VIDEO_DIP_DATA, *data); > data++; > } > + for (; i < 32; i += 4) > + I915_WRITE(VIDEO_DIP_DATA, 0); > mmiowb(); > > val |= g4x_infoframe_enable(frame); > @@ -186,6 +188,8 @@ static void ibx_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > data++; > } > + for (; i < 32; i += 4) > + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > mmiowb(); > > val |= g4x_infoframe_enable(frame); > @@ -224,6 +228,8 @@ static void cpt_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > data++; > } > + for (; i < 32; i += 4) > + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > mmiowb(); > > val |= g4x_infoframe_enable(frame); > @@ -259,6 +265,8 @@ static void vlv_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > data++; > } > + for (; i < 32; i += 4) > + I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > mmiowb(); > > val |= g4x_infoframe_enable(frame); > @@ -292,6 +300,8 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(data_reg + i, *data); > data++; > } > + for (; i < 32; i += 4) > + I915_WRITE(data_reg + i, 0); > mmiowb(); > > val |= hsw_infoframe_enable(frame); > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH] drm/i915: make sure we write all the DIP data bytes 2012-09-24 13:32 ` [PATCH 2/2] drm/i915: make sure we write at least 32 DIP bytes Paulo Zanoni 2012-09-24 22:08 ` Rodrigo Vivi @ 2012-09-25 16:23 ` Paulo Zanoni 2012-09-25 17:06 ` Rodrigo Vivi 1 sibling, 1 reply; 8+ messages in thread From: Paulo Zanoni @ 2012-09-25 16:23 UTC (permalink / raw) To: intel-gfx; +Cc: Paulo Zanoni, stable From: Paulo Zanoni <paulo.r.zanoni@intel.com> ... even if the actual infoframe is smaller than the maximum possible size. If we don't write all the 32 DIP data bytes the InfoFrame ECC may not be correctly calculated in some cases (e.g., when changing the port), and this will lead to black screens on HDMI monitors. The ECC value is generated by the hardware. I don't see how this should break anything since we're writing 0 and that should be the correct value, so this patch should be safe. Notice that on IVB and older we actually have 64 bytes available for VIDEO_DIP_DATA, but only bytes 0-31 actually store infoframe data: the others are either read-only ECC values or marked as "reserved". On HSW we only have 32 bytes, and the ECC value is stored on its own separate read-only register. See BSpec. This patch fixes bug #46761, which is marked as a regression introduced by commit 4e89ee174bb2da341bf90a84321c7008a3c9210d: drm/i915: set the DIP port on ibx_write_infoframe Before commit 4e89 we were just failing to send AVI infoframes when we needed to change the port, which can lead to black screens in some cases. After commit 4e89 we started sending infoframes, but with a possibly wrong ECC value. After this patch I hope we start sending correct infoframes. Version 2: - Improve commit message - Try to make the code more clear Cc: stable@vger.kernel.org Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=46761 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 4 ++++ drivers/gpu/drm/i915/intel_hdmi.c | 15 +++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a828e90..7637824 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1794,6 +1794,10 @@ /* Video Data Island Packet control */ #define VIDEO_DIP_DATA 0x61178 +/* Read the description of VIDEO_DIP_DATA (before Haswel) or VIDEO_DIP_ECC + * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each byte + * of the infoframe structure specified by CEA-861. */ +#define VIDEO_DIP_DATA_SIZE 32 #define VIDEO_DIP_CTL 0x61170 /* Pre HSW: */ #define VIDEO_DIP_ENABLE (1 << 31) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index f9fb47c..08f2b63 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -151,6 +151,9 @@ static void g4x_write_infoframe(struct drm_encoder *encoder, I915_WRITE(VIDEO_DIP_DATA, *data); data++; } + /* Write every possible data byte to force correct ECC calculation. */ + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) + I915_WRITE(VIDEO_DIP_DATA, 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -186,6 +189,9 @@ static void ibx_write_infoframe(struct drm_encoder *encoder, I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + /* Write every possible data byte to force correct ECC calculation. */ + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -224,6 +230,9 @@ static void cpt_write_infoframe(struct drm_encoder *encoder, I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + /* Write every possible data byte to force correct ECC calculation. */ + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -259,6 +268,9 @@ static void vlv_write_infoframe(struct drm_encoder *encoder, I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data); data++; } + /* Write every possible data byte to force correct ECC calculation. */ + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) + I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0); mmiowb(); val |= g4x_infoframe_enable(frame); @@ -292,6 +304,9 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, I915_WRITE(data_reg + i, *data); data++; } + /* Write every possible data byte to force correct ECC calculation. */ + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) + I915_WRITE(data_reg + i, 0); mmiowb(); val |= hsw_infoframe_enable(frame); -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915: make sure we write all the DIP data bytes 2012-09-25 16:23 ` [PATCH] drm/i915: make sure we write all the DIP data bytes Paulo Zanoni @ 2012-09-25 17:06 ` Rodrigo Vivi 2012-09-26 5:50 ` Daniel Vetter 0 siblings, 1 reply; 8+ messages in thread From: Rodrigo Vivi @ 2012-09-25 17:06 UTC (permalink / raw) To: Paulo Zanoni; +Cc: intel-gfx, Paulo Zanoni, stable Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> On Tue, Sep 25, 2012 at 1:23 PM, Paulo Zanoni <przanoni@gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > ... even if the actual infoframe is smaller than the maximum possible > size. > > If we don't write all the 32 DIP data bytes the InfoFrame ECC may not > be correctly calculated in some cases (e.g., when changing the port), > and this will lead to black screens on HDMI monitors. The ECC value is > generated by the hardware. > > I don't see how this should break anything since we're writing 0 and > that should be the correct value, so this patch should be safe. > > Notice that on IVB and older we actually have 64 bytes available for > VIDEO_DIP_DATA, but only bytes 0-31 actually store infoframe data: the > others are either read-only ECC values or marked as "reserved". On HSW > we only have 32 bytes, and the ECC value is stored on its own separate > read-only register. See BSpec. > > This patch fixes bug #46761, which is marked as a regression > introduced by commit 4e89ee174bb2da341bf90a84321c7008a3c9210d: > drm/i915: set the DIP port on ibx_write_infoframe > > Before commit 4e89 we were just failing to send AVI infoframes when we > needed to change the port, which can lead to black screens in some > cases. After commit 4e89 we started sending infoframes, but with a > possibly wrong ECC value. After this patch I hope we start sending > correct infoframes. > > Version 2: > - Improve commit message > - Try to make the code more clear > > Cc: stable@vger.kernel.org > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=46761 > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 4 ++++ > drivers/gpu/drm/i915/intel_hdmi.c | 15 +++++++++++++++ > 2 files changed, 19 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index a828e90..7637824 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1794,6 +1794,10 @@ > > /* Video Data Island Packet control */ > #define VIDEO_DIP_DATA 0x61178 > +/* Read the description of VIDEO_DIP_DATA (before Haswel) or VIDEO_DIP_ECC > + * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each byte > + * of the infoframe structure specified by CEA-861. */ > +#define VIDEO_DIP_DATA_SIZE 32 > #define VIDEO_DIP_CTL 0x61170 > /* Pre HSW: */ > #define VIDEO_DIP_ENABLE (1 << 31) > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index f9fb47c..08f2b63 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -151,6 +151,9 @@ static void g4x_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(VIDEO_DIP_DATA, *data); > data++; > } > + /* Write every possible data byte to force correct ECC calculation. */ > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > + I915_WRITE(VIDEO_DIP_DATA, 0); > mmiowb(); > > val |= g4x_infoframe_enable(frame); > @@ -186,6 +189,9 @@ static void ibx_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > data++; > } > + /* Write every possible data byte to force correct ECC calculation. */ > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > mmiowb(); > > val |= g4x_infoframe_enable(frame); > @@ -224,6 +230,9 @@ static void cpt_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > data++; > } > + /* Write every possible data byte to force correct ECC calculation. */ > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > mmiowb(); > > val |= g4x_infoframe_enable(frame); > @@ -259,6 +268,9 @@ static void vlv_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > data++; > } > + /* Write every possible data byte to force correct ECC calculation. */ > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > + I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > mmiowb(); > > val |= g4x_infoframe_enable(frame); > @@ -292,6 +304,9 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, > I915_WRITE(data_reg + i, *data); > data++; > } > + /* Write every possible data byte to force correct ECC calculation. */ > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > + I915_WRITE(data_reg + i, 0); > mmiowb(); > > val |= hsw_infoframe_enable(frame); > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915: make sure we write all the DIP data bytes 2012-09-25 17:06 ` Rodrigo Vivi @ 2012-09-26 5:50 ` Daniel Vetter 0 siblings, 0 replies; 8+ messages in thread From: Daniel Vetter @ 2012-09-26 5:50 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx, stable, Paulo Zanoni On Tue, Sep 25, 2012 at 02:06:30PM -0300, Rodrigo Vivi wrote: > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> > > On Tue, Sep 25, 2012 at 1:23 PM, Paulo Zanoni <przanoni@gmail.com> wrote: > > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > > > ... even if the actual infoframe is smaller than the maximum possible > > size. > > > > If we don't write all the 32 DIP data bytes the InfoFrame ECC may not > > be correctly calculated in some cases (e.g., when changing the port), > > and this will lead to black screens on HDMI monitors. The ECC value is > > generated by the hardware. > > > > I don't see how this should break anything since we're writing 0 and > > that should be the correct value, so this patch should be safe. > > > > Notice that on IVB and older we actually have 64 bytes available for > > VIDEO_DIP_DATA, but only bytes 0-31 actually store infoframe data: the > > others are either read-only ECC values or marked as "reserved". On HSW > > we only have 32 bytes, and the ECC value is stored on its own separate > > read-only register. See BSpec. > > > > This patch fixes bug #46761, which is marked as a regression > > introduced by commit 4e89ee174bb2da341bf90a84321c7008a3c9210d: > > drm/i915: set the DIP port on ibx_write_infoframe > > > > Before commit 4e89 we were just failing to send AVI infoframes when we > > needed to change the port, which can lead to black screens in some > > cases. After commit 4e89 we started sending infoframes, but with a > > possibly wrong ECC value. After this patch I hope we start sending > > correct infoframes. > > > > Version 2: > > - Improve commit message > > - Try to make the code more clear > > > > Cc: stable@vger.kernel.org > > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=46761 > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Applied to -fixes, although I guess I'll push this through 3.7 - infoframes blow up too often. -Daniel > > --- > > drivers/gpu/drm/i915/i915_reg.h | 4 ++++ > > drivers/gpu/drm/i915/intel_hdmi.c | 15 +++++++++++++++ > > 2 files changed, 19 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index a828e90..7637824 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -1794,6 +1794,10 @@ > > > > /* Video Data Island Packet control */ > > #define VIDEO_DIP_DATA 0x61178 > > +/* Read the description of VIDEO_DIP_DATA (before Haswel) or VIDEO_DIP_ECC > > + * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each byte > > + * of the infoframe structure specified by CEA-861. */ > > +#define VIDEO_DIP_DATA_SIZE 32 > > #define VIDEO_DIP_CTL 0x61170 > > /* Pre HSW: */ > > #define VIDEO_DIP_ENABLE (1 << 31) > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > > index f9fb47c..08f2b63 100644 > > --- a/drivers/gpu/drm/i915/intel_hdmi.c > > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > > @@ -151,6 +151,9 @@ static void g4x_write_infoframe(struct drm_encoder *encoder, > > I915_WRITE(VIDEO_DIP_DATA, *data); > > data++; > > } > > + /* Write every possible data byte to force correct ECC calculation. */ > > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > > + I915_WRITE(VIDEO_DIP_DATA, 0); > > mmiowb(); > > > > val |= g4x_infoframe_enable(frame); > > @@ -186,6 +189,9 @@ static void ibx_write_infoframe(struct drm_encoder *encoder, > > I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > > data++; > > } > > + /* Write every possible data byte to force correct ECC calculation. */ > > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > > + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > > mmiowb(); > > > > val |= g4x_infoframe_enable(frame); > > @@ -224,6 +230,9 @@ static void cpt_write_infoframe(struct drm_encoder *encoder, > > I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > > data++; > > } > > + /* Write every possible data byte to force correct ECC calculation. */ > > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > > + I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > > mmiowb(); > > > > val |= g4x_infoframe_enable(frame); > > @@ -259,6 +268,9 @@ static void vlv_write_infoframe(struct drm_encoder *encoder, > > I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data); > > data++; > > } > > + /* Write every possible data byte to force correct ECC calculation. */ > > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > > + I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0); > > mmiowb(); > > > > val |= g4x_infoframe_enable(frame); > > @@ -292,6 +304,9 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, > > I915_WRITE(data_reg + i, *data); > > data++; > > } > > + /* Write every possible data byte to force correct ECC calculation. */ > > + for (; i < VIDEO_DIP_DATA_SIZE; i += 4) > > + I915_WRITE(data_reg + i, 0); > > mmiowb(); > > > > val |= hsw_infoframe_enable(frame); > > -- > > 1.7.10.4 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Rodrigo Vivi > Blog: http://blog.vivi.eng.br > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register 2012-09-24 13:32 [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register Paulo Zanoni 2012-09-24 13:32 ` [PATCH 2/2] drm/i915: make sure we write at least 32 DIP bytes Paulo Zanoni @ 2012-09-24 22:12 ` Rodrigo Vivi 2012-09-25 8:35 ` Daniel Vetter 1 sibling, 1 reply; 8+ messages in thread From: Rodrigo Vivi @ 2012-09-24 22:12 UTC (permalink / raw) To: Paulo Zanoni; +Cc: intel-gfx, Paulo Zanoni This was easy for me, feel free to use: Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> On Mon, Sep 24, 2012 at 10:32 AM, Paulo Zanoni <przanoni@gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > This should never happen, but the silent "return" makes me wonder > every time I try to debug InfoFrame bugs, so promote this to BUG() to > make sure people will complain if we ever break this. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/intel_hdmi.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index 229897f..f9fb47c 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -377,6 +377,7 @@ static void g4x_set_infoframes(struct drm_encoder *encoder, > port = VIDEO_DIP_PORT_C; > break; > default: > + BUG(); > return; > } > > @@ -435,6 +436,7 @@ static void ibx_set_infoframes(struct drm_encoder *encoder, > port = VIDEO_DIP_PORT_D; > break; > default: > + BUG(); > return; > } > > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register 2012-09-24 22:12 ` [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register Rodrigo Vivi @ 2012-09-25 8:35 ` Daniel Vetter 0 siblings, 0 replies; 8+ messages in thread From: Daniel Vetter @ 2012-09-25 8:35 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx, Paulo Zanoni On Mon, Sep 24, 2012 at 07:12:16PM -0300, Rodrigo Vivi wrote: > This was easy for me, feel free to use: > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Already merged to dinq before I've seen your r-b, thanks anyway for the review (and the patch obviously too). I've bikeshedded the actual fix a bit on irc (needs a clearer commit msg since 32 bytes is the limit and a comment explaining what's going on). -Daniel > > On Mon, Sep 24, 2012 at 10:32 AM, Paulo Zanoni <przanoni@gmail.com> wrote: > > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > > > This should never happen, but the silent "return" makes me wonder > > every time I try to debug InfoFrame bugs, so promote this to BUG() to > > make sure people will complain if we ever break this. > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > > --- > > drivers/gpu/drm/i915/intel_hdmi.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > > index 229897f..f9fb47c 100644 > > --- a/drivers/gpu/drm/i915/intel_hdmi.c > > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > > @@ -377,6 +377,7 @@ static void g4x_set_infoframes(struct drm_encoder *encoder, > > port = VIDEO_DIP_PORT_C; > > break; > > default: > > + BUG(); > > return; > > } > > > > @@ -435,6 +436,7 @@ static void ibx_set_infoframes(struct drm_encoder *encoder, > > port = VIDEO_DIP_PORT_D; > > break; > > default: > > + BUG(); > > return; > > } > > > > -- > > 1.7.10.4 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Rodrigo Vivi > Blog: http://blog.vivi.eng.br > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2012-09-26 5:51 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-09-24 13:32 [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register Paulo Zanoni 2012-09-24 13:32 ` [PATCH 2/2] drm/i915: make sure we write at least 32 DIP bytes Paulo Zanoni 2012-09-24 22:08 ` Rodrigo Vivi 2012-09-25 16:23 ` [PATCH] drm/i915: make sure we write all the DIP data bytes Paulo Zanoni 2012-09-25 17:06 ` Rodrigo Vivi 2012-09-26 5:50 ` Daniel Vetter 2012-09-24 22:12 ` [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register Rodrigo Vivi 2012-09-25 8:35 ` Daniel Vetter
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