From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: Ben Widawsky <ben@bwidawsk.net>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 10/12] drm/i915: TLB invalidation with MI_FLUSH_SW requires a post-sync op
Date: Thu, 4 Oct 2012 09:39:31 -0500 [thread overview]
Message-ID: <20121004093931.73bdac1a@jbarnes-t420> (raw)
In-Reply-To: <20121004083213.GB5661@phenom.ffwll.local>
On Thu, 4 Oct 2012 10:32:13 +0200
Daniel Vetter <daniel@ffwll.ch> wrote:
> On Wed, Oct 03, 2012 at 09:20:20AM +0200, Daniel Vetter wrote:
> > On Tue, Oct 02, 2012 at 05:14:53PM -0700, Ben Widawsky wrote:
> > > s/MI_FLUSH_SW/MI_FLUSH_DW/
> >
> > Applied, with spelling fixed. Thanks for patch&review.
>
> This hard-hangs my snb here when X starts (so probably on the very first
> batch). Impressive!
>
> I've dropped this one from -fixes. And since no one piped up that the
> other w/a patches fix anything, I've moved those two I've merged already
> to dinq.
Yeah not -fixes material. But it fixes i-g-t on VLV and *should* fix
issues we may not have seen yet on IVB, so we need to figure this one
out.
> Totally unrelated, I think I'll instate harsher rules for w/a patches:
> 1. w/a patches only go in through -fixes if they indeed fix an issue we
> (or a bug reporter) can reproduce.
Yeah, that's fine.
> 2. w/a patches need testcases, too. Either a register check added to i-g-t
> or if it's a runtime thing, a runtime assert at a nice place (where
> feasible, ofc).
A register check isn't that useful imo. A real test case would be
ideal, but given how hard some of these issues are to hit, it's
unrealistic to spend weeks writing a test case for a workaround that's
already been documented to fix a specific issue.
> 3. I'll randomly stall patches to bring 2. up to par for existing
> workarounds.
Btw if you want to take this to its logical conclusion, we also
shouldn't be "fixing" issues that are obvious from code review but
people haven't hit in practice (this goes for a good chunk of the code
churn in our driver involving cleanups and fixes for potential
non-issues). And that's not even including test case development for
any patch claiming it fixes anything.
That said, I definitely agree we want to add more test cases. Just
don't block applying known workaround fixes or other stuff on those
test cases.
Jesse
next prev parent reply other threads:[~2012-10-04 14:39 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-02 22:43 Updated workaround & VLV fixes Jesse Barnes
2012-10-02 22:43 ` [PATCH 01/12] drm/i915: add more clock gating regs for gen7, make sure writes happen Jesse Barnes
2012-10-02 23:14 ` Ben Widawsky
2012-10-02 22:43 ` [PATCH 02/12] drm/i915: implement WaDisableL3CacheAging on VLV Jesse Barnes
2012-10-02 23:01 ` Daniel Vetter
2012-10-02 23:09 ` Ben Widawsky
2012-10-02 23:14 ` Ben Widawsky
2012-10-02 22:43 ` [PATCH 03/12] drm/i915: implement WaDisableDopClockGatingisable on VLV and IVB Jesse Barnes
2012-10-02 23:28 ` Ben Widawsky
2012-10-02 22:43 ` [PATCH 04/12] drm/i915: implement WaForceL3Serialization " Jesse Barnes
2012-10-02 23:32 ` Ben Widawsky
2012-10-03 7:24 ` Daniel Vetter
2012-10-02 22:43 ` [PATCH 05/12] drm/i915: implement WaGTEnableMiFlush on VLV Jesse Barnes
2012-10-02 23:35 ` Ben Widawsky
2012-10-02 22:43 ` [PATCH 06/12] drm/i915: implement WaDisableVLVClockGating_VBIIssue " Jesse Barnes
2012-10-02 23:38 ` Ben Widawsky
2012-10-02 22:43 ` [PATCH 07/12] drm/i915: implement WaDisableEarlyCull for VLV and IVB Jesse Barnes
2012-10-02 23:44 ` Ben Widawsky
2012-10-03 7:23 ` Daniel Vetter
2012-10-10 20:04 ` Paulo Zanoni
2012-10-10 21:13 ` Lespiau, Damien
2012-10-02 22:43 ` [PATCH 08/12] drm/i915: implement WaDisablePSDDualDispatchEnable on IVB Jesse Barnes
2012-10-02 23:51 ` Ben Widawsky
2012-10-02 23:58 ` Ben Widawsky
2012-10-02 22:43 ` [PATCH 09/12] drm/i915: limit VLV IRQ enables to those we use Jesse Barnes
2012-10-02 23:53 ` Ben Widawsky
2012-10-02 22:43 ` [PATCH 10/12] drm/i915: TLB invalidation with MI_FLUSH_SW requires a post-sync op Jesse Barnes
2012-10-03 0:14 ` Ben Widawsky
2012-10-03 7:20 ` Daniel Vetter
2012-10-04 8:32 ` Daniel Vetter
2012-10-04 14:39 ` Jesse Barnes [this message]
2012-10-04 14:49 ` Daniel Vetter
2012-10-04 14:54 ` Jesse Barnes
2012-10-02 22:43 ` [PATCH 11/12] drm/i915: PIPE_CONTROL TLB invalidate requires CS stall Jesse Barnes
2012-10-02 22:43 ` [PATCH 12/12] drm/i915: set swizzling to none on VLV Jesse Barnes
2012-10-03 7:15 ` Daniel Vetter
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