[PATCH 00/13] The final nail in AGP on GEN6+

[PATCH 00/13] The final nail in AGP on GEN6+

[Ben Widawsky]

1-3: Pave the way to use a new struct i915_gtt
4: Create the new structure
5-13: Move all AGP bridge data to new structure. Killing off things where
possible.

I am happy that yet again this series results in a net decrease of code (even
though we have to duplicate a couple of struct fields).

It's now even more trivial than before to even cut out the intel-gtt.ko
requirement.

I have some future things relying on the i915_gtt structure, so patches
1-4 are important to me.

Ben Widawsky (13):
  drm/i915: Kill gtt_end
  drm/i915: Mappable_end can't ever be > end
  drm/i915: Remove gtt_mappable_total
  drm/i915: Create a gtt structure
  drm/i915: Remove use on gma_bus_addr on gen6+
  drm/i915: Remove use of gtt_mappable_entries
  drm/i915: Stop using gtt_total_entries
  drm/i915: Move stolen_size to the new struct
  agp/intel: decouple more of the agp-i915 sharing
  drm/i915: Needs dmar, not
  drm/i915: Cut out the infamous ILK w/a from AGP layer
  drm/i915: Remove scratch page from shared
  drm/i915: Finally kill off struct intel-gtt

 drivers/char/agp/intel-gtt.c               |  88 ++++++---------
 drivers/gpu/drm/i915/i915_debugfs.c        |   3 +-
 drivers/gpu/drm/i915/i915_dma.c            |  29 +++--
 drivers/gpu/drm/i915/i915_drv.h            |  39 +++++--
 drivers/gpu/drm/i915/i915_gem.c            |  18 ++--
 drivers/gpu/drm/i915/i915_gem_evict.c      |   2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c        | 167 ++++++++++++++---------------
 drivers/gpu/drm/i915/i915_gem_stolen.c     |   8 +-
 drivers/gpu/drm/i915/i915_gem_tiling.c     |   2 +-
 drivers/gpu/drm/i915/i915_irq.c            |   4 +-
 drivers/gpu/drm/i915/intel_display.c       |   2 +-
 drivers/gpu/drm/i915/intel_fb.c            |   5 +-
 drivers/gpu/drm/i915/intel_overlay.c       |   4 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   2 +-
 include/drm/intel-gtt.h                    |  19 ----
 16 files changed, 184 insertions(+), 210 deletions(-)

-- 
1.8.1

[PATCH 01/13] drm/i915: Kill gtt_end

[Ben Widawsky]

It's duplicated in the more useful gtt_total.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_drv.h     | 1 -
 drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +--
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d2b93a4..f49b7be 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -797,7 +797,6 @@ typedef struct drm_i915_private {
 		/** Usable portion of the GTT for GEM */
 		unsigned long gtt_start;
 		unsigned long gtt_mappable_end;
-		unsigned long gtt_end;
 		unsigned long stolen_base; /* limited to low memory (32-bit) */
 
 		/** "Graphics Stolen Memory" holds the global PTEs */
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index eac2cec..63da446 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -394,7 +394,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
 
 	/* First fill our portion of the GTT with scratch pages */
 	i915_ggtt_clear_range(dev, dev_priv->mm.gtt_start / PAGE_SIZE,
-			      (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE);
+			      dev_priv->mm.gtt_total / PAGE_SIZE);
 
 	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
 		i915_gem_clflush_object(obj);
@@ -556,7 +556,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 
 	dev_priv->mm.gtt_start = start;
 	dev_priv->mm.gtt_mappable_end = mappable_end;
-	dev_priv->mm.gtt_end = end;
 	dev_priv->mm.gtt_total = end - start;
 	dev_priv->mm.mappable_gtt_total = min(end, mappable_end) - start;
 
-- 
1.8.1

[PATCH 02/13] drm/i915: Mappable_end can't ever be > end

[Ben Widawsky]

Both DRI1 and DRI2 can never specify a mappable size which goes past the
GTT size.  Don't pretend otherwise.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 63da446..6c068b0 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -536,6 +536,8 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 	struct drm_i915_gem_object *obj;
 	unsigned long hole_start, hole_end;
 
+	BUG_ON(mappable_end > end);
+
 	/* Subtract the guard page ... */
 	drm_mm_init(&dev_priv->mm.gtt_space, start, end - start - PAGE_SIZE);
 	if (!HAS_LLC(dev))
@@ -557,7 +559,7 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 	dev_priv->mm.gtt_start = start;
 	dev_priv->mm.gtt_mappable_end = mappable_end;
 	dev_priv->mm.gtt_total = end - start;
-	dev_priv->mm.mappable_gtt_total = min(end, mappable_end) - start;
+	dev_priv->mm.mappable_gtt_total = mappable_end - start;
 
 	/* Clear any non-preallocated blocks */
 	drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
-- 
1.8.1

[PATCH 03/13] drm/i915: Remove gtt_mappable_total

[Ben Widawsky]

With the assertion from the previous patch in place, it should be safe
to get rid gtt_mappable_total. Keeps things saner to not have to track
the same info in two places.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
 drivers/gpu/drm/i915/i915_drv.h     | 1 -
 drivers/gpu/drm/i915/i915_gem_gtt.c | 1 -
 3 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 882a735..2f14b6d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -259,7 +259,8 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
 		   count, size);
 
 	seq_printf(m, "%zu [%zu] gtt total\n",
-		   dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
+		   dev_priv->mm.gtt_total,
+		   dev_priv->mm.gtt_mappable_end - dev_priv->mm.gtt_start);
 
 	mutex_unlock(&dev->struct_mutex);
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f49b7be..5985ed0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -881,7 +881,6 @@ typedef struct drm_i915_private {
 
 		/* accounting, useful for userland debugging */
 		size_t gtt_total;
-		size_t mappable_gtt_total;
 		size_t object_memory;
 		u32 object_count;
 	} mm;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 6c068b0..f79081e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -559,7 +559,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 	dev_priv->mm.gtt_start = start;
 	dev_priv->mm.gtt_mappable_end = mappable_end;
 	dev_priv->mm.gtt_total = end - start;
-	dev_priv->mm.mappable_gtt_total = mappable_end - start;
 
 	/* Clear any non-preallocated blocks */
 	drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
-- 
1.8.1

[PATCH 04/13] drm/i915: Create a gtt structure

[Ben Widawsky]

The purpose of the gtt structure is to help isolate our gtt specific
properties from the rest of the code (in doing so it help us finish the
isolation from the AGP connection).

The following members are pulled out (and renamed):
gtt_start
gtt_total
gtt_mappable_end
gtt_mappable
gtt_base_addr
gsm

The gtt structure will serve as a nice place to put gen specific gtt
routines in upcoming patches.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_debugfs.c        |  4 ++--
 drivers/gpu/drm/i915/i915_dma.c            | 20 ++++++++++----------
 drivers/gpu/drm/i915/i915_drv.h            | 29 +++++++++++++++++++++--------
 drivers/gpu/drm/i915/i915_gem.c            | 17 +++++++++--------
 drivers/gpu/drm/i915/i915_gem_evict.c      |  2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c        | 24 ++++++++++++------------
 drivers/gpu/drm/i915/i915_gem_tiling.c     |  2 +-
 drivers/gpu/drm/i915/i915_irq.c            |  4 ++--
 drivers/gpu/drm/i915/intel_display.c       |  2 +-
 drivers/gpu/drm/i915/intel_fb.c            |  2 +-
 drivers/gpu/drm/i915/intel_overlay.c       |  4 ++--
 12 files changed, 63 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 2f14b6d..7123af4 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -259,8 +259,8 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
 		   count, size);
 
 	seq_printf(m, "%zu [%zu] gtt total\n",
-		   dev_priv->mm.gtt_total,
-		   dev_priv->mm.gtt_mappable_end - dev_priv->mm.gtt_start);
+		   dev_priv->gtt.total,
+		   dev_priv->gtt.mappable_end - dev_priv->gtt.start);
 
 	mutex_unlock(&dev->struct_mutex);
 
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 272e500..bb4382f 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1067,7 +1067,7 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
 	ring->status_page.gfx_addr = hws->addr & (0x1ffff<<12);
 
 	dev_priv->dri1.gfx_hws_cpu_addr =
-		ioremap_wc(dev_priv->mm.gtt_base_addr + hws->addr, 4096);
+		ioremap_wc(dev_priv->gtt.mappable_base + hws->addr, 4096);
 	if (dev_priv->dri1.gfx_hws_cpu_addr == NULL) {
 		i915_dma_cleanup(dev);
 		ring->status_page.gfx_addr = 0;
@@ -1534,17 +1534,17 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 	}
 
 	aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
-	dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr;
+	dev_priv->gtt.mappable_base = dev_priv->mm.gtt->gma_bus_addr;
 
-	dev_priv->mm.gtt_mapping =
-		io_mapping_create_wc(dev_priv->mm.gtt_base_addr,
+	dev_priv->gtt.mappable =
+		io_mapping_create_wc(dev_priv->gtt.mappable_base,
 				     aperture_size);
-	if (dev_priv->mm.gtt_mapping == NULL) {
+	if (dev_priv->gtt.mappable == NULL) {
 		ret = -EIO;
 		goto out_rmmap;
 	}
 
-	i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr,
+	i915_mtrr_setup(dev_priv, dev_priv->gtt.mappable_base,
 			aperture_size);
 
 	/* The i915 workqueue is primarily used for batched retirement of
@@ -1649,11 +1649,11 @@ out_gem_unload:
 out_mtrrfree:
 	if (dev_priv->mm.gtt_mtrr >= 0) {
 		mtrr_del(dev_priv->mm.gtt_mtrr,
-			 dev_priv->mm.gtt_base_addr,
+			 dev_priv->gtt.mappable_base,
 			 aperture_size);
 		dev_priv->mm.gtt_mtrr = -1;
 	}
-	io_mapping_free(dev_priv->mm.gtt_mapping);
+	io_mapping_free(dev_priv->gtt.mappable);
 out_rmmap:
 	pci_iounmap(dev->pdev, dev_priv->regs);
 put_gmch:
@@ -1687,10 +1687,10 @@ int i915_driver_unload(struct drm_device *dev)
 	/* Cancel the retire work handler, which should be idle now. */
 	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
 
-	io_mapping_free(dev_priv->mm.gtt_mapping);
+	io_mapping_free(dev_priv->gtt.mappable);
 	if (dev_priv->mm.gtt_mtrr >= 0) {
 		mtrr_del(dev_priv->mm.gtt_mtrr,
-			 dev_priv->mm.gtt_base_addr,
+			 dev_priv->gtt.mappable_base,
 			 dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE);
 		dev_priv->mm.gtt_mtrr = -1;
 	}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5985ed0..51766d2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -364,6 +364,25 @@ struct intel_device_info {
 	u8 has_llc:1;
 };
 
+/* The Graphics Translation Table is the way in which GEN hardware translates a
+ * Graphics Virtual Address into a Physical Address. In addition to the normal
+ * collateral associated with any va->pa translations GEN hardware also has a
+ * portion of the GTT which can be mapped by the CPU and remain both coherent
+ * and correct (in cases like swizzling). That region is referred to as GMADR in
+ * the spec.
+ */
+struct i915_gtt {
+	unsigned long start;		/* Start offset of used GTT */
+	size_t total;			/* Total size GTT can map */
+
+	unsigned long mappable_end;	/* End offset that we can CPU map */
+	struct io_mapping *mappable;	/* Mapping to our CPU mappable region */
+	phys_addr_t mappable_base;	/* PA of our GMADR */
+
+	/** "Graphics Stolen Memory" holds the global PTEs */
+	void __iomem *gsm;
+};
+
 #define I915_PPGTT_PD_ENTRIES 512
 #define I915_PPGTT_PT_ENTRIES 1024
 struct i915_hw_ppgtt {
@@ -777,6 +796,8 @@ typedef struct drm_i915_private {
 	/* Register state */
 	bool modeset_on_lid;
 
+	struct i915_gtt gtt;
+
 	struct {
 		/** Bridge to intel-gtt-ko */
 		struct intel_gtt *gtt;
@@ -795,15 +816,8 @@ typedef struct drm_i915_private {
 		struct list_head unbound_list;
 
 		/** Usable portion of the GTT for GEM */
-		unsigned long gtt_start;
-		unsigned long gtt_mappable_end;
 		unsigned long stolen_base; /* limited to low memory (32-bit) */
 
-		/** "Graphics Stolen Memory" holds the global PTEs */
-		void __iomem *gsm;
-
-		struct io_mapping *gtt_mapping;
-		phys_addr_t gtt_base_addr;
 		int gtt_mtrr;
 
 		/** PPGTT used for aliasing the PPGTT with the GTT */
@@ -880,7 +894,6 @@ typedef struct drm_i915_private {
 		struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
 
 		/* accounting, useful for userland debugging */
-		size_t gtt_total;
 		size_t object_memory;
 		u32 object_count;
 	} mm;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ad98db5..4ec66a9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -149,6 +149,7 @@ int
 i915_gem_init_ioctl(struct drm_device *dev, void *data,
 		    struct drm_file *file)
 {
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_i915_gem_init *args = data;
 
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
@@ -186,7 +187,7 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
 			pinned += obj->gtt_space->size;
 	mutex_unlock(&dev->struct_mutex);
 
-	args->aper_size = dev_priv->mm.gtt_total;
+	args->aper_size = dev_priv->gtt.total;
 	args->aper_available_size = args->aper_size - pinned;
 
 	return 0;
@@ -637,7 +638,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev,
 		 * source page isn't available.  Return the error and we'll
 		 * retry in the slow path.
 		 */
-		if (fast_user_write(dev_priv->mm.gtt_mapping, page_base,
+		if (fast_user_write(dev_priv->gtt.mappable, page_base,
 				    page_offset, user_data, page_length)) {
 			ret = -EFAULT;
 			goto out_unpin;
@@ -1362,7 +1363,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 
 	obj->fault_mappable = true;
 
-	pfn = ((dev_priv->mm.gtt_base_addr + obj->gtt_offset) >> PAGE_SHIFT) +
+	pfn = ((dev_priv->gtt.mappable_base + obj->gtt_offset) >> PAGE_SHIFT) +
 		page_offset;
 
 	/* Finally, remap it using the new GTT offset */
@@ -1568,7 +1569,7 @@ i915_gem_mmap_gtt(struct drm_file *file,
 		goto unlock;
 	}
 
-	if (obj->base.size > dev_priv->mm.gtt_mappable_end) {
+	if (obj->base.size > dev_priv->gtt.mappable_end) {
 		ret = -E2BIG;
 		goto out;
 	}
@@ -2944,7 +2945,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
 	 * before evicting everything in a vain attempt to find space.
 	 */
 	if (obj->base.size >
-	    (map_and_fenceable ? dev_priv->mm.gtt_mappable_end : dev_priv->mm.gtt_total)) {
+	    (map_and_fenceable ? dev_priv->gtt.mappable_end : dev_priv->gtt.total)) {
 		DRM_ERROR("Attempting to bind an object larger than the aperture\n");
 		return -E2BIG;
 	}
@@ -2959,7 +2960,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
 	if (map_and_fenceable)
 		free_space = drm_mm_search_free_in_range_color(&dev_priv->mm.gtt_space,
 							       size, alignment, obj->cache_level,
-							       0, dev_priv->mm.gtt_mappable_end,
+							       0, dev_priv->gtt.mappable_end,
 							       false);
 	else
 		free_space = drm_mm_search_free_color(&dev_priv->mm.gtt_space,
@@ -2971,7 +2972,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
 			free_space =
 				drm_mm_get_block_range_generic(free_space,
 							       size, alignment, obj->cache_level,
-							       0, dev_priv->mm.gtt_mappable_end,
+							       0, dev_priv->gtt.mappable_end,
 							       false);
 		else
 			free_space =
@@ -3017,7 +3018,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
 		(free_space->start & (fence_alignment - 1)) == 0;
 
 	mappable =
-		obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end;
+		obj->gtt_offset + obj->base.size <= dev_priv->gtt.mappable_end;
 
 	obj->map_and_fenceable = mappable && fenceable;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
index 776a322..c86d5d9 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -80,7 +80,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
 	if (mappable)
 		drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
 					    min_size, alignment, cache_level,
-					    0, dev_priv->mm.gtt_mappable_end);
+					    0, dev_priv->gtt.mappable_end);
 	else
 		drm_mm_init_scan(&dev_priv->mm.gtt_space,
 				 min_size, alignment, cache_level);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 6cd3e1c..0924be9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -209,7 +209,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 
 		/* Map the page containing the relocation we're going to perform.  */
 		reloc->offset += obj->gtt_offset;
-		reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
+		reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 						      reloc->offset & PAGE_MASK);
 		reloc_entry = (uint32_t __iomem *)
 			(reloc_page + (reloc->offset & ~PAGE_MASK));
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f79081e..e044f58 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -290,7 +290,7 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
 		return;
 
 
-	pd_addr = (gtt_pte_t __iomem*)dev_priv->mm.gsm + ppgtt->pd_offset/sizeof(gtt_pte_t);
+	pd_addr = (gtt_pte_t __iomem*)dev_priv->gtt.gsm + ppgtt->pd_offset/sizeof(gtt_pte_t);
 	for (i = 0; i < ppgtt->num_pd_entries; i++) {
 		dma_addr_t pt_addr;
 
@@ -367,7 +367,7 @@ static void i915_ggtt_clear_range(struct drm_device *dev,
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	gtt_pte_t scratch_pte;
-	gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->mm.gsm + first_entry;
+	gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->gtt.gsm + first_entry;
 	const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
 	int i;
 
@@ -393,8 +393,8 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
 	struct drm_i915_gem_object *obj;
 
 	/* First fill our portion of the GTT with scratch pages */
-	i915_ggtt_clear_range(dev, dev_priv->mm.gtt_start / PAGE_SIZE,
-			      dev_priv->mm.gtt_total / PAGE_SIZE);
+	i915_ggtt_clear_range(dev, dev_priv->gtt.start / PAGE_SIZE,
+			      dev_priv->gtt.total / PAGE_SIZE);
 
 	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
 		i915_gem_clflush_object(obj);
@@ -433,7 +433,7 @@ static void gen6_ggtt_bind_object(struct drm_i915_gem_object *obj,
 	const int first_entry = obj->gtt_space->start >> PAGE_SHIFT;
 	const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
 	gtt_pte_t __iomem *gtt_entries =
-		(gtt_pte_t __iomem *)dev_priv->mm.gsm + first_entry;
+		(gtt_pte_t __iomem *)dev_priv->gtt.gsm + first_entry;
 	int unused, i = 0;
 	unsigned int len, m = 0;
 	dma_addr_t addr;
@@ -556,9 +556,9 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 		obj->has_global_gtt_mapping = 1;
 	}
 
-	dev_priv->mm.gtt_start = start;
-	dev_priv->mm.gtt_mappable_end = mappable_end;
-	dev_priv->mm.gtt_total = end - start;
+	dev_priv->gtt.start = start;
+	dev_priv->gtt.mappable_end = mappable_end;
+	dev_priv->gtt.total = end - start;
 
 	/* Clear any non-preallocated blocks */
 	drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
@@ -748,9 +748,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
 		goto err_out;
 	}
 
-	dev_priv->mm.gsm = ioremap_wc(gtt_bus_addr,
-				      dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
-	if (!dev_priv->mm.gsm) {
+	dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr,
+				       dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
+	if (!dev_priv->gtt.gsm) {
 		DRM_ERROR("Failed to map the gtt page table\n");
 		teardown_scratch_page(dev);
 		ret = -ENOMEM;
@@ -774,7 +774,7 @@ err_out:
 void i915_gem_gtt_fini(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	iounmap(dev_priv->mm.gsm);
+	iounmap(dev_priv->gtt.gsm);
 	teardown_scratch_page(dev);
 	if (INTEL_INFO(dev)->gen < 6)
 		intel_gmch_remove();
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 65f1d4f..eaaf2be 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -368,7 +368,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
 
 		obj->map_and_fenceable =
 			obj->gtt_space == NULL ||
-			(obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end &&
+			(obj->gtt_offset + obj->base.size <= dev_priv->gtt.mappable_end &&
 			 i915_gem_object_fence_ok(obj, args->tiling_mode));
 
 		/* Rebind if we need a change of alignment */
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 6ba0573..62aae5d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -939,7 +939,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
 			goto unwind;
 
 		local_irq_save(flags);
-		if (reloc_offset < dev_priv->mm.gtt_mappable_end &&
+		if (reloc_offset < dev_priv->gtt.mappable_end &&
 		    src->has_global_gtt_mapping) {
 			void __iomem *s;
 
@@ -948,7 +948,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
 			 * captures what the GPU read.
 			 */
 
-			s = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
+			s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 						     reloc_offset);
 			memcpy_fromio(d, s, PAGE_SIZE);
 			io_mapping_unmap_atomic(s);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 162cb22..723161b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8506,7 +8506,7 @@ void intel_modeset_init(struct drm_device *dev)
 		dev->mode_config.max_width = 8192;
 		dev->mode_config.max_height = 8192;
 	}
-	dev->mode_config.fb_base = dev_priv->mm.gtt_base_addr;
+	dev->mode_config.fb_base = dev_priv->gtt.mappable_base;
 
 	DRM_DEBUG_KMS("%d display pipe%s available.\n",
 		      dev_priv->num_pipe, dev_priv->num_pipe > 1 ? "s" : "");
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 71d5580..ce02af8 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -142,7 +142,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
 	info->fix.smem_len = size;
 
 	info->screen_base =
-		ioremap_wc(dev_priv->mm.gtt_base_addr + obj->gtt_offset,
+		ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
 			   size);
 	if (!info->screen_base) {
 		ret = -ENOSPC;
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index fabe0ac..ba978bf 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -195,7 +195,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
 	if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
 		regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_obj->handle->vaddr;
 	else
-		regs = io_mapping_map_wc(dev_priv->mm.gtt_mapping,
+		regs = io_mapping_map_wc(dev_priv->gtt.mappable,
 					 overlay->reg_bo->gtt_offset);
 
 	return regs;
@@ -1434,7 +1434,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
 		regs = (struct overlay_registers __iomem *)
 			overlay->reg_bo->phys_obj->handle->vaddr;
 	else
-		regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
+		regs = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 						overlay->reg_bo->gtt_offset);
 
 	return regs;
-- 
1.8.1

[PATCH 05/13] drm/i915: Remove use on gma_bus_addr on gen6+

[Ben Widawsky]

We have enough info to not use the intel-gtt bridge stuff.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_dma.c         | 3 +--
 drivers/gpu/drm/i915/i915_gem_gtt.c     | 2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index bb4382f..b8f42e0 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1417,7 +1417,7 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 	if (!ap)
 		return;
 
-	ap->ranges[0].base = dev_priv->mm.gtt->gma_bus_addr;
+	ap->ranges[0].base = dev_priv->gtt.mappable_base;
 	ap->ranges[0].size =
 		dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
 	primary =
@@ -1534,7 +1534,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 	}
 
 	aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
-	dev_priv->gtt.mappable_base = dev_priv->mm.gtt->gma_bus_addr;
 
 	dev_priv->gtt.mappable =
 		io_mapping_create_wc(dev_priv->gtt.mappable_base,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e044f58..4461a49 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -719,7 +719,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
 
 	/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
 	gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
-	dev_priv->mm.gtt->gma_bus_addr = pci_resource_start(dev->pdev, 2);
+	dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
 
 	/* i9xx_setup */
 	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2bd074a..9765055 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1164,7 +1164,7 @@ static int intel_init_ring_buffer(struct drm_device *dev,
 		goto err_unpin;
 
 	ring->virtual_start =
-		ioremap_wc(dev_priv->mm.gtt->gma_bus_addr + obj->gtt_offset,
+		ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
 			   ring->size);
 	if (ring->virtual_start == NULL) {
 		DRM_ERROR("Failed to map ringbuffer.\n");
-- 
1.8.1

[PATCH 06/13] drm/i915: Remove use of gtt_mappable_entries

[Ben Widawsky]

Mappable_end, ie. size is almost always what you want as opposed to the
number of entries. Since we already have that information, we can scrap
the number of entries and only calculate it when needed.

If gtt_start is !0, this will have slightly different behavior. This
difference can only occur in DRI1, and exists when we try to kick out
the firmware fb. The new code seems like a bugfix to me.

The other case where we've changed the behavior is during init we check
the mappable region against our current known upper and lower limits
(64MB, and 512MB). This now matches the comment, and makes things more
convenient after removing gtt_mappable_entries.

Also worth noting is the setting of mappable_end is taken out of setup
because we do it earlier now in the DRI2 case and therefore need to add
that tiny hunk to support the DRI1 IOCTL.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_dma.c     |  8 ++++----
 drivers/gpu/drm/i915/i915_gem.c     |  1 +
 drivers/gpu/drm/i915/i915_gem_gtt.c | 15 +++++++--------
 drivers/gpu/drm/i915/intel_fb.c     |  3 +--
 4 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index b8f42e0..03a97d1 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1418,8 +1418,8 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 		return;
 
 	ap->ranges[0].base = dev_priv->gtt.mappable_base;
-	ap->ranges[0].size =
-		dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+	ap->ranges[0].size = dev_priv->gtt.mappable_end - dev_priv->gtt.start;
+
 	primary =
 		pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
 
@@ -1533,7 +1533,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 		goto put_gmch;
 	}
 
-	aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+	aperture_size = dev_priv->gtt.mappable_end;
 
 	dev_priv->gtt.mappable =
 		io_mapping_create_wc(dev_priv->gtt.mappable_base,
@@ -1690,7 +1690,7 @@ int i915_driver_unload(struct drm_device *dev)
 	if (dev_priv->mm.gtt_mtrr >= 0) {
 		mtrr_del(dev_priv->mm.gtt_mtrr,
 			 dev_priv->gtt.mappable_base,
-			 dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE);
+			 dev_priv->gtt.mappable_end);
 		dev_priv->mm.gtt_mtrr = -1;
 	}
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4ec66a9..e84c9f9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -166,6 +166,7 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data,
 	mutex_lock(&dev->struct_mutex);
 	i915_gem_setup_global_gtt(dev, args->gtt_start, args->gtt_end,
 				  args->gtt_end);
+	dev_priv->gtt.mappable_end = args->gtt_end;
 	mutex_unlock(&dev->struct_mutex);
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 4461a49..46e9544 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -557,7 +557,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 	}
 
 	dev_priv->gtt.start = start;
-	dev_priv->gtt.mappable_end = mappable_end;
 	dev_priv->gtt.total = end - start;
 
 	/* Clear any non-preallocated blocks */
@@ -596,7 +595,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
 	int ret;
 
 	gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
-	mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+	mappable_size = dev_priv->gtt.mappable_end;
 
 	if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
 		/* PPGTT pdes are stolen from global gtt ptes, so shrink the
@@ -720,6 +719,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
 	gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
 	dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
+	dev_priv->gtt.mappable_end = pci_resource_len(dev->pdev, 2);
 
 	/* i9xx_setup */
 	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
@@ -730,14 +730,13 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	else
 		dev_priv->mm.gtt->stolen_size = gen7_get_stolen_size(snb_gmch_ctl);
 
-	dev_priv->mm.gtt->gtt_mappable_entries = pci_resource_len(dev->pdev, 2) >> PAGE_SHIFT;
 	/* 64/512MB is the current min/max we actually know of, but this is just a
 	 * coarse sanity check.
 	 */
-	if ((dev_priv->mm.gtt->gtt_mappable_entries >> 8) < 64 ||
-	    dev_priv->mm.gtt->gtt_mappable_entries > dev_priv->mm.gtt->gtt_total_entries) {
-		DRM_ERROR("Unknown GMADR entries (%d)\n",
-			  dev_priv->mm.gtt->gtt_mappable_entries);
+	if ((dev_priv->gtt.mappable_end < (64<<20) ||
+	    (dev_priv->gtt.mappable_end > (512<<20)))) {
+		DRM_ERROR("Unknown GMADR size (%lx)\n",
+			  dev_priv->gtt.mappable_end);
 		ret = -ENXIO;
 		goto err_out;
 	}
@@ -759,7 +758,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
 
 	/* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
 	DRM_INFO("Memory usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
-	DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8);
+	DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20);
 	DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index ce02af8..ce5f544 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -135,8 +135,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
 		goto out_unpin;
 	}
 	info->apertures->ranges[0].base = dev->mode_config.fb_base;
-	info->apertures->ranges[0].size =
-		dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+	info->apertures->ranges[0].size = dev_priv->gtt.mappable_end;
 
 	info->fix.smem_start = dev->mode_config.fb_base + obj->gtt_offset;
 	info->fix.smem_len = size;
-- 
1.8.1

[PATCH 07/13] drm/i915: Stop using gtt_total_entries

[Ben Widawsky]

Similar to gtt_mappable_entries we don't usually want the entries,
it's easy enough to calculate it when you need.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_drv.h     |  3 +++
 drivers/gpu/drm/i915/i915_gem_gtt.c | 28 ++++++++++++++++------------
 2 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 51766d2..9d8f196 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -374,6 +374,7 @@ struct intel_device_info {
 struct i915_gtt {
 	unsigned long start;		/* Start offset of used GTT */
 	size_t total;			/* Total size GTT can map */
+	size_t used;			/* Amount used <= total */
 
 	unsigned long mappable_end;	/* End offset that we can CPU map */
 	struct io_mapping *mappable;	/* Mapping to our CPU mappable region */
@@ -381,7 +382,9 @@ struct i915_gtt {
 
 	/** "Graphics Stolen Memory" holds the global PTEs */
 	void __iomem *gsm;
+
 };
+#define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
 
 #define I915_PPGTT_PD_ENTRIES 512
 #define I915_PPGTT_PT_ENTRIES 1024
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 46e9544..5a7a4a9 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -119,7 +119,8 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
 	/* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024
 	 * entries. For aliasing ppgtt support we just steal them at the end for
 	 * now. */
-	first_pd_entry_in_global_pt = dev_priv->mm.gtt->gtt_total_entries - I915_PPGTT_PD_ENTRIES;
+	first_pd_entry_in_global_pt =
+		gtt_total_entries(dev_priv->gtt) - I915_PPGTT_PD_ENTRIES;
 
 	ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
 	if (!ppgtt)
@@ -368,7 +369,7 @@ static void i915_ggtt_clear_range(struct drm_device *dev,
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	gtt_pte_t scratch_pte;
 	gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->gtt.gsm + first_entry;
-	const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
+	const int max_entries = gtt_total_entries(dev_priv->gtt) - first_entry;
 	int i;
 
 	if (INTEL_INFO(dev)->gen < 6) {
@@ -431,7 +432,7 @@ static void gen6_ggtt_bind_object(struct drm_i915_gem_object *obj,
 	struct sg_table *st = obj->pages;
 	struct scatterlist *sg = st->sgl;
 	const int first_entry = obj->gtt_space->start >> PAGE_SHIFT;
-	const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
+	const int max_entries = gtt_total_entries(dev_priv->gtt) - first_entry;
 	gtt_pte_t __iomem *gtt_entries =
 		(gtt_pte_t __iomem *)dev_priv->gtt.gsm + first_entry;
 	int unused, i = 0;
@@ -557,7 +558,9 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 	}
 
 	dev_priv->gtt.start = start;
-	dev_priv->gtt.total = end - start;
+	dev_priv->gtt.used = end - start;
+	if (dev_priv->gtt.used < dev_priv->gtt.total)
+		DRM_DEBUG_DRIVER("Warning: using less than total memory\n");
 
 	/* Clear any non-preallocated blocks */
 	drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
@@ -594,7 +597,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
 	unsigned long gtt_size, mappable_size;
 	int ret;
 
-	gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
+	gtt_size = dev_priv->gtt.total;
 	mappable_size = dev_priv->gtt.mappable_end;
 
 	if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
@@ -687,6 +690,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	phys_addr_t gtt_bus_addr;
+	u32 gtt_size;
 	u16 snb_gmch_ctl;
 	int ret;
 
@@ -716,15 +720,15 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
 		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
 
+	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
+
 	/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
 	gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
 	dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
 	dev_priv->gtt.mappable_end = pci_resource_len(dev->pdev, 2);
+	gtt_size = gen6_get_total_gtt_size(snb_gmch_ctl);
+	dev_priv->gtt.total = (gtt_size / sizeof(gtt_pte_t)) << PAGE_SHIFT;
 
-	/* i9xx_setup */
-	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
-	dev_priv->mm.gtt->gtt_total_entries =
-		gen6_get_total_gtt_size(snb_gmch_ctl) / sizeof(gtt_pte_t);
 	if (INTEL_INFO(dev)->gen < 7)
 		dev_priv->mm.gtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
 	else
@@ -747,8 +751,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
 		goto err_out;
 	}
 
-	dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr,
-				       dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
+	dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr, gtt_size);
 	if (!dev_priv->gtt.gsm) {
 		DRM_ERROR("Failed to map the gtt page table\n");
 		teardown_scratch_page(dev);
@@ -757,7 +760,8 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	}
 
 	/* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
-	DRM_INFO("Memory usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
+	DRM_INFO("Memory usable by graphics device = %zdM\n",
+		 dev_priv->gtt.total >> 20);
 	DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20);
 	DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
 
-- 
1.8.1

[PATCH 08/13] drm/i915: Move stolen_size to the new struct

[Ben Widawsky]

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_drv.h        | 2 ++
 drivers/gpu/drm/i915/i915_gem_gtt.c    | 7 ++++---
 drivers/gpu/drm/i915/i915_gem_stolen.c | 8 ++++----
 3 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9d8f196..201da6d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -380,6 +380,8 @@ struct i915_gtt {
 	struct io_mapping *mappable;	/* Mapping to our CPU mappable region */
 	phys_addr_t mappable_base;	/* PA of our GMADR */
 
+	size_t stolen_size;
+
 	/** "Graphics Stolen Memory" holds the global PTEs */
 	void __iomem *gsm;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5a7a4a9..e829f25 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -730,9 +730,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	dev_priv->gtt.total = (gtt_size / sizeof(gtt_pte_t)) << PAGE_SHIFT;
 
 	if (INTEL_INFO(dev)->gen < 7)
-		dev_priv->mm.gtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
+		dev_priv->gtt.stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
 	else
-		dev_priv->mm.gtt->stolen_size = gen7_get_stolen_size(snb_gmch_ctl);
+		dev_priv->gtt.stolen_size = gen7_get_stolen_size(snb_gmch_ctl);
 
 	/* 64/512MB is the current min/max we actually know of, but this is just a
 	 * coarse sanity check.
@@ -763,7 +763,8 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	DRM_INFO("Memory usable by graphics device = %zdM\n",
 		 dev_priv->gtt.total >> 20);
 	DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20);
-	DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
+	DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n",
+			 dev_priv->gtt.stolen_size >> 20);
 
 	return 0;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index f21ae17..69d97cb 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -187,11 +187,11 @@ int i915_gem_init_stolen(struct drm_device *dev)
 	if (dev_priv->mm.stolen_base == 0)
 		return 0;
 
-	DRM_DEBUG_KMS("found %d bytes of stolen memory at %08lx\n",
-		      dev_priv->mm.gtt->stolen_size, dev_priv->mm.stolen_base);
+	DRM_DEBUG_KMS("found %zd bytes of stolen memory at %08lx\n",
+		      dev_priv->gtt.stolen_size, dev_priv->mm.stolen_base);
 
 	/* Basic memrange allocator for stolen space */
-	drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->mm.gtt->stolen_size);
+	drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->gtt.stolen_size);
 
 	return 0;
 }
@@ -205,7 +205,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
 	struct scatterlist *sg;
 
 	DRM_DEBUG_DRIVER("offset=0x%x, size=%d\n", offset, size);
-	BUG_ON(offset > dev_priv->mm.gtt->stolen_size - size);
+	BUG_ON(offset > dev_priv->gtt.stolen_size - size);
 
 	/* We hide that we have no struct page backing our stolen object
 	 * by wrapping the contiguous physical allocation with a fake
-- 
1.8.1

[PATCH 09/13] agp/intel: decouple more of the agp-i915 sharing

[Ben Widawsky]

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/char/agp/intel-gtt.c | 35 +++++++++++++++++++++--------------
 include/drm/intel-gtt.h      | 11 +----------
 2 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index c8d9dcb..eb05eb5 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -76,6 +76,14 @@ static struct _intel_private {
 	int resource_valid;
 	struct page *scratch_page;
 	int refcount;
+	/* Size of memory reserved for graphics by the BIOS */
+	unsigned int stolen_size;
+	/* Total number of gtt entries. */
+	unsigned int gtt_total_entries;
+	/* Part of the gtt that is mappable by the cpu, for those chips where
+	 * this is not the full gtt. */
+	unsigned int gtt_mappable_entries;
+	phys_addr_t gma_bus_addr;
 } intel_private;
 
 #define INTEL_GTT_GEN	intel_private.driver->gen
@@ -506,7 +514,7 @@ static unsigned int intel_gtt_total_entries(void)
 		/* On previous hardware, the GTT size was just what was
 		 * required to map the aperture.
 		 */
-		return intel_private.base.gtt_mappable_entries;
+		return intel_private.gtt_mappable_entries;
 	}
 }
 
@@ -572,8 +580,8 @@ static int intel_gtt_init(void)
 	if (ret != 0)
 		return ret;
 
-	intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries();
-	intel_private.base.gtt_total_entries = intel_gtt_total_entries();
+	intel_private.gtt_mappable_entries = intel_gtt_mappable_entries();
+	intel_private.gtt_total_entries = intel_gtt_total_entries();
 
 	/* save the PGETBL reg for resume */
 	intel_private.PGETBL_save =
@@ -585,10 +593,10 @@ static int intel_gtt_init(void)
 
 	dev_info(&intel_private.bridge_dev->dev,
 			"detected gtt size: %dK total, %dK mappable\n",
-			intel_private.base.gtt_total_entries * 4,
-			intel_private.base.gtt_mappable_entries * 4);
+			intel_private.gtt_total_entries * 4,
+			intel_private.gtt_mappable_entries * 4);
 
-	gtt_map_size = intel_private.base.gtt_total_entries * 4;
+	gtt_map_size = intel_private.gtt_total_entries * 4;
 
 	intel_private.gtt = NULL;
 	if (INTEL_GTT_GEN < 6 && INTEL_GTT_GEN > 2)
@@ -605,7 +613,7 @@ static int intel_gtt_init(void)
 
 	global_cache_flush();   /* FIXME: ? */
 
-	intel_private.base.stolen_size = intel_gtt_stolen_size();
+	intel_private.stolen_size = intel_gtt_stolen_size();
 
 	intel_private.base.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
 
@@ -622,7 +630,7 @@ static int intel_gtt_init(void)
 		pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
 				      &gma_addr);
 
-	intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
+	intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
 
 	return 0;
 }
@@ -633,8 +641,7 @@ static int intel_fake_agp_fetch_size(void)
 	unsigned int aper_size;
 	int i;
 
-	aper_size = (intel_private.base.gtt_mappable_entries << PAGE_SHIFT)
-		    / MB(1);
+	aper_size = (intel_private.gtt_mappable_entries << PAGE_SHIFT) / MB(1);
 
 	for (i = 0; i < num_sizes; i++) {
 		if (aper_size == intel_fake_agp_sizes[i].size) {
@@ -778,7 +785,7 @@ static int intel_fake_agp_configure(void)
 	    return -EIO;
 
 	intel_private.clear_fake_agp = true;
-	agp_bridge->gart_bus_addr = intel_private.base.gma_bus_addr;
+	agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;
 
 	return 0;
 }
@@ -844,8 +851,8 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
 		return -ENODEV;
 
 	if (intel_private.clear_fake_agp) {
-		int start = intel_private.base.stolen_size / PAGE_SIZE;
-		int end = intel_private.base.gtt_mappable_entries;
+		int start = intel_private.stolen_size / PAGE_SIZE;
+		int end = intel_private.gtt_mappable_entries;
 		intel_gtt_clear_range(start, end - start);
 		intel_private.clear_fake_agp = false;
 	}
@@ -856,7 +863,7 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
 	if (mem->page_count == 0)
 		goto out;
 
-	if (pg_start + mem->page_count > intel_private.base.gtt_total_entries)
+	if (pg_start + mem->page_count > intel_private.gtt_total_entries)
 		goto out_err;
 
 	if (type != mem->type)
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 3e3a166..6f53ecd 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -4,22 +4,13 @@
 #define	_DRM_INTEL_GTT_H
 
 struct intel_gtt {
-	/* Size of memory reserved for graphics by the BIOS */
-	unsigned int stolen_size;
-	/* Total number of gtt entries. */
-	unsigned int gtt_total_entries;
-	/* Part of the gtt that is mappable by the cpu, for those chips where
-	 * this is not the full gtt. */
-	unsigned int gtt_mappable_entries;
-	/* Whether i915 needs to use the dmar apis or not. */
+	/*  Whether i915 needs to use the dmar apis or not. */
 	unsigned int needs_dmar : 1;
 	/* Whether we idle the gpu before mapping/unmapping */
 	unsigned int do_idle_maps : 1;
 	/* Share the scratch page dma with ppgtts. */
 	dma_addr_t scratch_page_dma;
 	struct page *scratch_page;
-	/* needed for ioremap in drm/i915 */
-	phys_addr_t gma_bus_addr;
 } *intel_gtt_get(void);
 
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
-- 
1.8.1

[PATCH 10/13] drm/i915: Needs dmar, not

[Ben Widawsky]

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/char/agp/intel-gtt.c        | 10 ++++++----
 drivers/gpu/drm/i915/i915_gem_gtt.c | 35 +++++++++++++----------------------
 include/drm/intel-gtt.h             |  2 --
 3 files changed, 19 insertions(+), 28 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index eb05eb5..a531377 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -84,6 +84,8 @@ static struct _intel_private {
 	 * this is not the full gtt. */
 	unsigned int gtt_mappable_entries;
 	phys_addr_t gma_bus_addr;
+	/* Whether i915 needs to use the dmar apis or not. */
+	unsigned int needs_dmar : 1;
 } intel_private;
 
 #define INTEL_GTT_GEN	intel_private.driver->gen
@@ -299,7 +301,7 @@ static int intel_gtt_setup_scratch_page(void)
 	get_page(page);
 	set_pages_uc(page, 1);
 
-	if (intel_private.base.needs_dmar) {
+	if (intel_private.needs_dmar) {
 		dma_addr = pci_map_page(intel_private.pcidev, page, 0,
 				    PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 		if (pci_dma_mapping_error(intel_private.pcidev, dma_addr))
@@ -615,7 +617,7 @@ static int intel_gtt_init(void)
 
 	intel_private.stolen_size = intel_gtt_stolen_size();
 
-	intel_private.base.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
+	intel_private.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
 
 	ret = intel_gtt_setup_scratch_page();
 	if (ret != 0) {
@@ -875,7 +877,7 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
 	if (!mem->is_flushed)
 		global_cache_flush();
 
-	if (intel_private.base.needs_dmar) {
+	if (intel_private.needs_dmar) {
 		struct sg_table st;
 
 		ret = intel_gtt_map_memory(mem->pages, mem->page_count, &st);
@@ -919,7 +921,7 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
 
 	intel_gtt_clear_range(pg_start, mem->page_count);
 
-	if (intel_private.base.needs_dmar) {
+	if (intel_private.needs_dmar) {
 		intel_gtt_unmap_memory(mem->sg_list, mem->num_sg);
 		mem->sg_list = NULL;
 		mem->num_sg = 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e829f25..2acca75 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -139,28 +139,23 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
 			goto err_pt_alloc;
 	}
 
-	if (dev_priv->mm.gtt->needs_dmar) {
-		ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t)
-						*ppgtt->num_pd_entries,
-					     GFP_KERNEL);
-		if (!ppgtt->pt_dma_addr)
-			goto err_pt_alloc;
+	ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t) *ppgtt->num_pd_entries,
+				     GFP_KERNEL);
+	if (!ppgtt->pt_dma_addr)
+		goto err_pt_alloc;
 
-		for (i = 0; i < ppgtt->num_pd_entries; i++) {
-			dma_addr_t pt_addr;
+	for (i = 0; i < ppgtt->num_pd_entries; i++) {
+		dma_addr_t pt_addr;
 
-			pt_addr = pci_map_page(dev->pdev, ppgtt->pt_pages[i],
-					       0, 4096,
-					       PCI_DMA_BIDIRECTIONAL);
+		pt_addr = pci_map_page(dev->pdev, ppgtt->pt_pages[i], 0, 4096,
+				       PCI_DMA_BIDIRECTIONAL);
 
-			if (pci_dma_mapping_error(dev->pdev,
-						  pt_addr)) {
-				ret = -EIO;
-				goto err_pd_pin;
+		if (pci_dma_mapping_error(dev->pdev, pt_addr)) {
+			ret = -EIO;
+			goto err_pd_pin;
 
-			}
-			ppgtt->pt_dma_addr[i] = pt_addr;
 		}
+		ppgtt->pt_dma_addr[i] = pt_addr;
 	}
 
 	ppgtt->scratch_page_dma_addr = dev_priv->mm.gtt->scratch_page_dma;
@@ -295,11 +290,7 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
 	for (i = 0; i < ppgtt->num_pd_entries; i++) {
 		dma_addr_t pt_addr;
 
-		if (dev_priv->mm.gtt->needs_dmar)
-			pt_addr = ppgtt->pt_dma_addr[i];
-		else
-			pt_addr = page_to_phys(ppgtt->pt_pages[i]);
-
+		pt_addr = ppgtt->pt_dma_addr[i];
 		pd_entry = GEN6_PDE_ADDR_ENCODE(pt_addr);
 		pd_entry |= GEN6_PDE_VALID;
 
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 6f53ecd..63157c5 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -4,8 +4,6 @@
 #define	_DRM_INTEL_GTT_H
 
 struct intel_gtt {
-	/*  Whether i915 needs to use the dmar apis or not. */
-	unsigned int needs_dmar : 1;
 	/* Whether we idle the gpu before mapping/unmapping */
 	unsigned int do_idle_maps : 1;
 	/* Share the scratch page dma with ppgtts. */
-- 
1.8.1

[PATCH 11/13] drm/i915: Cut out the infamous ILK w/a from AGP layer

[Ben Widawsky]

And, move it to where the rest of the logic is.

Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/char/agp/intel-gtt.c        | 27 ---------------------------
 drivers/gpu/drm/i915/i915_drv.h     |  1 +
 drivers/gpu/drm/i915/i915_gem_gtt.c | 27 ++++++++++++++++++++++++---
 include/drm/intel-gtt.h             |  2 --
 4 files changed, 25 insertions(+), 32 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index a531377..f54ddc0 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -849,9 +849,6 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
 {
 	int ret = -EINVAL;
 
-	if (intel_private.base.do_idle_maps)
-		return -ENODEV;
-
 	if (intel_private.clear_fake_agp) {
 		int start = intel_private.stolen_size / PAGE_SIZE;
 		int end = intel_private.gtt_mappable_entries;
@@ -916,9 +913,6 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
 	if (mem->page_count == 0)
 		return 0;
 
-	if (intel_private.base.do_idle_maps)
-		return -ENODEV;
-
 	intel_gtt_clear_range(pg_start, mem->page_count);
 
 	if (intel_private.needs_dmar) {
@@ -1078,24 +1072,6 @@ static void i965_write_entry(dma_addr_t addr,
 	writel(addr | pte_flags, intel_private.gtt + entry);
 }
 
-/* Certain Gen5 chipsets require require idling the GPU before
- * unmapping anything from the GTT when VT-d is enabled.
- */
-static inline int needs_idle_maps(void)
-{
-#ifdef CONFIG_INTEL_IOMMU
-	const unsigned short gpu_devid = intel_private.pcidev->device;
-
-	/* Query intel_iommu to see if we need the workaround. Presumably that
-	 * was loaded first.
-	 */
-	if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB ||
-	     gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) &&
-	     intel_iommu_gfx_mapped)
-		return 1;
-#endif
-	return 0;
-}
 
 static int i9xx_setup(void)
 {
@@ -1124,9 +1100,6 @@ static int i9xx_setup(void)
 		break;
 	}
 
-	if (needs_idle_maps())
-		intel_private.base.do_idle_maps = 1;
-
 	intel_i9xx_setup_flush();
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 201da6d..6c8b0b8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -385,6 +385,7 @@ struct i915_gtt {
 	/** "Graphics Stolen Memory" holds the global PTEs */
 	void __iomem *gsm;
 
+	bool do_idle_maps;
 };
 #define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2acca75..afd5ec7 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -330,11 +330,30 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
 	}
 }
 
+extern int intel_iommu_gfx_mapped;
+/* Certain Gen5 chipsets require require idling the GPU before
+ * unmapping anything from the GTT when VT-d is enabled.
+ */
+static inline bool needs_idle_maps(struct drm_device *dev)
+{
+#ifdef CONFIG_INTEL_IOMMU
+	const u16 gpu_devid = dev->pdev->device;
+
+	/* Query intel_iommu to see if we need the workaround. Presumably that
+	 * was loaded first.
+	 */
+	if ((gpu_devid == 0x0044 || gpu_devid == 0x46) &&
+	     intel_iommu_gfx_mapped)
+		return true;
+#endif
+	return false;
+}
+
 static bool do_idling(struct drm_i915_private *dev_priv)
 {
 	bool ret = dev_priv->mm.interruptible;
 
-	if (unlikely(dev_priv->mm.gtt->do_idle_maps)) {
+	if (unlikely(dev_priv->gtt.do_idle_maps)) {
 		dev_priv->mm.interruptible = false;
 		if (i915_gpu_idle(dev_priv->dev)) {
 			DRM_ERROR("Couldn't idle GPU\n");
@@ -348,11 +367,10 @@ static bool do_idling(struct drm_i915_private *dev_priv)
 
 static void undo_idling(struct drm_i915_private *dev_priv, bool interruptible)
 {
-	if (unlikely(dev_priv->mm.gtt->do_idle_maps))
+	if (unlikely(dev_priv->gtt.do_idle_maps))
 		dev_priv->mm.interruptible = interruptible;
 }
 
-
 static void i915_ggtt_clear_range(struct drm_device *dev,
 				 unsigned first_entry,
 				 unsigned num_entries)
@@ -701,6 +719,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
 			intel_gmch_remove();
 			return -ENODEV;
 		}
+
+		dev_priv->gtt.do_idle_maps = needs_idle_maps(dev);
+
 		return 0;
 	}
 
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 63157c5..4982dca 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -5,8 +5,6 @@
 
 struct intel_gtt {
 	/* Whether we idle the gpu before mapping/unmapping */
-	unsigned int do_idle_maps : 1;
-	/* Share the scratch page dma with ppgtts. */
 	dma_addr_t scratch_page_dma;
 	struct page *scratch_page;
 } *intel_gtt_get(void);
-- 
1.8.1

[PATCH 12/13] drm/i915: Remove scratch page from shared

[Ben Widawsky]

We already had a mapping in both (minus the phys_addr in AGP).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/char/agp/intel-gtt.c        |  9 +++++----
 drivers/gpu/drm/i915/i915_drv.h     |  2 ++
 drivers/gpu/drm/i915/i915_gem_gtt.c | 16 ++++++++--------
 include/drm/intel-gtt.h             |  3 ---
 4 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index f54ddc0..773ce8b 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -75,6 +75,7 @@ static struct _intel_private {
 	struct resource ifp_resource;
 	int resource_valid;
 	struct page *scratch_page;
+	phys_addr_t scratch_page_dma;
 	int refcount;
 	/* Size of memory reserved for graphics by the BIOS */
 	unsigned int stolen_size;
@@ -307,9 +308,9 @@ static int intel_gtt_setup_scratch_page(void)
 		if (pci_dma_mapping_error(intel_private.pcidev, dma_addr))
 			return -EINVAL;
 
-		intel_private.base.scratch_page_dma = dma_addr;
+		intel_private.scratch_page_dma = dma_addr;
 	} else
-		intel_private.base.scratch_page_dma = page_to_phys(page);
+		intel_private.scratch_page_dma = page_to_phys(page);
 
 	intel_private.scratch_page = page;
 
@@ -556,7 +557,7 @@ static unsigned int intel_gtt_mappable_entries(void)
 static void intel_gtt_teardown_scratch_page(void)
 {
 	set_pages_wb(intel_private.scratch_page, 1);
-	pci_unmap_page(intel_private.pcidev, intel_private.base.scratch_page_dma,
+	pci_unmap_page(intel_private.pcidev, intel_private.scratch_page_dma,
 		       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 	put_page(intel_private.scratch_page);
 	__free_page(intel_private.scratch_page);
@@ -900,7 +901,7 @@ void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries)
 	unsigned int i;
 
 	for (i = first_entry; i < (first_entry + num_entries); i++) {
-		intel_private.driver->write_entry(intel_private.base.scratch_page_dma,
+		intel_private.driver->write_entry(intel_private.scratch_page_dma,
 						  i, 0);
 	}
 	readl(intel_private.gtt+i-1);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6c8b0b8..6637090 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -386,6 +386,8 @@ struct i915_gtt {
 	void __iomem *gsm;
 
 	bool do_idle_maps;
+	dma_addr_t scratch_page_dma;
+	struct page *scratch_page;
 };
 #define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index afd5ec7..b7641f7 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -158,7 +158,7 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
 		ppgtt->pt_dma_addr[i] = pt_addr;
 	}
 
-	ppgtt->scratch_page_dma_addr = dev_priv->mm.gtt->scratch_page_dma;
+	ppgtt->scratch_page_dma_addr = dev_priv->gtt.scratch_page_dma;
 
 	i915_ppgtt_clear_range(ppgtt, 0,
 			       ppgtt->num_pd_entries*I915_PPGTT_PT_ENTRIES);
@@ -391,7 +391,7 @@ static void i915_ggtt_clear_range(struct drm_device *dev,
 		 first_entry, num_entries, max_entries))
 		num_entries = max_entries;
 
-	scratch_pte = pte_encode(dev, dev_priv->mm.gtt->scratch_page_dma, I915_CACHE_LLC);
+	scratch_pte = pte_encode(dev, dev_priv->gtt.scratch_page_dma, I915_CACHE_LLC);
 	for (i = 0; i < num_entries; i++)
 		iowrite32(scratch_pte, &gtt_base[i]);
 	readl(gtt_base);
@@ -656,8 +656,8 @@ static int setup_scratch_page(struct drm_device *dev)
 #else
 	dma_addr = page_to_phys(page);
 #endif
-	dev_priv->mm.gtt->scratch_page = page;
-	dev_priv->mm.gtt->scratch_page_dma = dma_addr;
+	dev_priv->gtt.scratch_page = page;
+	dev_priv->gtt.scratch_page_dma = dma_addr;
 
 	return 0;
 }
@@ -665,11 +665,11 @@ static int setup_scratch_page(struct drm_device *dev)
 static void teardown_scratch_page(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	set_pages_wb(dev_priv->mm.gtt->scratch_page, 1);
-	pci_unmap_page(dev->pdev, dev_priv->mm.gtt->scratch_page_dma,
+	set_pages_wb(dev_priv->gtt.scratch_page, 1);
+	pci_unmap_page(dev->pdev, dev_priv->gtt.scratch_page_dma,
 		       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
-	put_page(dev_priv->mm.gtt->scratch_page);
-	__free_page(dev_priv->mm.gtt->scratch_page);
+	put_page(dev_priv->gtt.scratch_page);
+	__free_page(dev_priv->gtt.scratch_page);
 }
 
 static inline unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 4982dca..ae55605 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -4,9 +4,6 @@
 #define	_DRM_INTEL_GTT_H
 
 struct intel_gtt {
-	/* Whether we idle the gpu before mapping/unmapping */
-	dma_addr_t scratch_page_dma;
-	struct page *scratch_page;
 } *intel_gtt_get(void);
 
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
-- 
1.8.1

[PATCH 13/13] drm/i915: Finally kill off struct intel-gtt

[Ben Widawsky]

Nothing is shared anymore between AGP and drm/i915 driver. Pre-GEN6
still uses AGP, but all necessary info is encapsulated per driver.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/char/agp/intel-gtt.c        |  7 -------
 drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +--------------------
 include/drm/intel-gtt.h             |  3 ---
 3 files changed, 1 insertion(+), 30 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 773ce8b..53086a2 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -60,7 +60,6 @@ struct intel_gtt_driver {
 };
 
 static struct _intel_private {
-	struct intel_gtt base;
 	const struct intel_gtt_driver *driver;
 	struct pci_dev *pcidev;	/* device one */
 	struct pci_dev *bridge_dev;
@@ -1372,12 +1371,6 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 }
 EXPORT_SYMBOL(intel_gmch_probe);
 
-struct intel_gtt *intel_gtt_get(void)
-{
-	return &intel_private.base;
-}
-EXPORT_SYMBOL(intel_gtt_get);
-
 void intel_gtt_chipset_flush(void)
 {
 	if (intel_private.driver->chipset_flush)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b7641f7..e3782bb 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -707,28 +707,10 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	 * hostbridge query stuff. Skip it entirely
 	 */
 	if (INTEL_INFO(dev)->gen < 6) {
-		ret = intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
-		if (!ret) {
-			DRM_ERROR("failed to set up gmch\n");
-			return -EIO;
-		}
-
-		dev_priv->mm.gtt = intel_gtt_get();
-		if (!dev_priv->mm.gtt) {
-			DRM_ERROR("Failed to initialize GTT\n");
-			intel_gmch_remove();
-			return -ENODEV;
-		}
-
 		dev_priv->gtt.do_idle_maps = needs_idle_maps(dev);
-
-		return 0;
+		return intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
 	}
 
-	dev_priv->mm.gtt = kzalloc(sizeof(*dev_priv->mm.gtt), GFP_KERNEL);
-	if (!dev_priv->mm.gtt)
-		return -ENOMEM;
-
 	if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
 		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
 
@@ -794,5 +776,4 @@ void i915_gem_gtt_fini(struct drm_device *dev)
 	teardown_scratch_page(dev);
 	if (INTEL_INFO(dev)->gen < 6)
 		intel_gmch_remove();
-	kfree(dev_priv->mm.gtt);
 }
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index ae55605..8b546ee 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -3,9 +3,6 @@
 #ifndef _DRM_INTEL_GTT_H
 #define	_DRM_INTEL_GTT_H
 
-struct intel_gtt {
-} *intel_gtt_get(void);
-
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 		     struct agp_bridge_data *bridge);
 void intel_gmch_remove(void);
-- 
1.8.1

Re: [PATCH 00/13] The final nail in AGP on GEN6+

[Ben Widawsky]

On Tue, 15 Jan 2013 13:26:08 -0800
Ben Widawsky <ben@bwidawsk.net> wrote:

> 1-3: Pave the way to use a new struct i915_gtt
> 4: Create the new structure
> 5-13: Move all AGP bridge data to new structure. Killing off things
> where possible.
> 
> I am happy that yet again this series results in a net decrease of
> code (even though we have to duplicate a couple of struct fields).
> 
> It's now even more trivial than before to even cut out the
> intel-gtt.ko requirement.
> 
> I have some future things relying on the i915_gtt structure, so
> patches 1-4 are important to me.

Small heads up to potential reviewers:

Daniel found a couple of bugs in patches 6 and 7 where I am not
initializing various gtt information we need in pre-GEN6 case. I've
addressed these and will resend them in the future.

Also, patch 10 needs a better commit message. It was originally two
distinct commits which didn't change behavior, and I picked the wrong
commit message. I shall fix that as well.

> 
> Ben Widawsky (13):
>   drm/i915: Kill gtt_end
>   drm/i915: Mappable_end can't ever be > end
>   drm/i915: Remove gtt_mappable_total
>   drm/i915: Create a gtt structure
>   drm/i915: Remove use on gma_bus_addr on gen6+
>   drm/i915: Remove use of gtt_mappable_entries
>   drm/i915: Stop using gtt_total_entries
>   drm/i915: Move stolen_size to the new struct
>   agp/intel: decouple more of the agp-i915 sharing
>   drm/i915: Needs dmar, not
>   drm/i915: Cut out the infamous ILK w/a from AGP layer
>   drm/i915: Remove scratch page from shared
>   drm/i915: Finally kill off struct intel-gtt
> 
>  drivers/char/agp/intel-gtt.c               |  88 ++++++---------
>  drivers/gpu/drm/i915/i915_debugfs.c        |   3 +-
>  drivers/gpu/drm/i915/i915_dma.c            |  29 +++--
>  drivers/gpu/drm/i915/i915_drv.h            |  39 +++++--
>  drivers/gpu/drm/i915/i915_gem.c            |  18 ++--
>  drivers/gpu/drm/i915/i915_gem_evict.c      |   2 +-
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   2 +-
>  drivers/gpu/drm/i915/i915_gem_gtt.c        | 167
> ++++++++++++++---------------
> drivers/gpu/drm/i915/i915_gem_stolen.c     |   8 +-
> drivers/gpu/drm/i915/i915_gem_tiling.c     |   2 +-
> drivers/gpu/drm/i915/i915_irq.c            |   4 +-
> drivers/gpu/drm/i915/intel_display.c       |   2 +-
> drivers/gpu/drm/i915/intel_fb.c            |   5 +-
> drivers/gpu/drm/i915/intel_overlay.c       |   4 +-
> drivers/gpu/drm/i915/intel_ringbuffer.c    |   2 +-
> include/drm/intel-gtt.h                    |  19 ---- 16 files
> changed, 184 insertions(+), 210 deletions(-)
> 

[PATCH 05/13 v2] drm/i915: Remove use on gma_bus_addr on gen6+

[Ben Widawsky]

We have enough info to not use the intel_gtt bridge stuff.

v2: Move setup of mappable_base above the legacy init stuff because we
still need that on older platforms. (Daniel)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_dma.c         | 3 +--
 drivers/gpu/drm/i915/i915_gem_gtt.c     | 3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index bb4382f..b8f42e0 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1417,7 +1417,7 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 	if (!ap)
 		return;
 
-	ap->ranges[0].base = dev_priv->mm.gtt->gma_bus_addr;
+	ap->ranges[0].base = dev_priv->gtt.mappable_base;
 	ap->ranges[0].size =
 		dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
 	primary =
@@ -1534,7 +1534,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 	}
 
 	aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
-	dev_priv->gtt.mappable_base = dev_priv->mm.gtt->gma_bus_addr;
 
 	dev_priv->gtt.mappable =
 		io_mapping_create_wc(dev_priv->gtt.mappable_base,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e044f58..c5fd35b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -691,6 +691,8 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	u16 snb_gmch_ctl;
 	int ret;
 
+	dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
+
 	/* On modern platforms we need not worry ourself with the legacy
 	 * hostbridge query stuff. Skip it entirely
 	 */
@@ -719,7 +721,6 @@ int i915_gem_gtt_init(struct drm_device *dev)
 
 	/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
 	gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
-	dev_priv->mm.gtt->gma_bus_addr = pci_resource_start(dev->pdev, 2);
 
 	/* i9xx_setup */
 	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2bd074a..9765055 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1164,7 +1164,7 @@ static int intel_init_ring_buffer(struct drm_device *dev,
 		goto err_unpin;
 
 	ring->virtual_start =
-		ioremap_wc(dev_priv->mm.gtt->gma_bus_addr + obj->gtt_offset,
+		ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
 			   ring->size);
 	if (ring->virtual_start == NULL) {
 		DRM_ERROR("Failed to map ringbuffer.\n");
-- 
1.8.1.1

[PATCH 06/13 v2] drm/i915: Remove use of gtt_mappable_entries

[Ben Widawsky]

Mappable_end, ie. size is almost always what you want as opposed to the
number of entries. Since we already have that information, we can scrap
the number of entries and only calculate it when needed.

If gtt_start is !0, this will have slightly different behavior. This
difference can only occur in DRI1, and exists when we try to kick out
the firmware fb. The new code seems like a bugfix to me.

The other case where we've changed the behavior is during init we check
the mappable region against our current known upper and lower limits
(64MB, and 512MB). This now matches the comment, and makes things more
convenient after removing gtt_mappable_entries.

Also worth noting is the setting of mappable_end is taken out of setup
because we do it earlier now in the DRI2 case and therefore need to add
that tiny hunk to support the DRI1 IOCTL.

v2: Move up mappable end to before legacy AGP init

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_dma.c     |  8 ++++----
 drivers/gpu/drm/i915/i915_gem.c     |  1 +
 drivers/gpu/drm/i915/i915_gem_gtt.c | 15 +++++++--------
 drivers/gpu/drm/i915/intel_fb.c     |  3 +--
 4 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index b8f42e0..03a97d1 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1418,8 +1418,8 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 		return;
 
 	ap->ranges[0].base = dev_priv->gtt.mappable_base;
-	ap->ranges[0].size =
-		dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+	ap->ranges[0].size = dev_priv->gtt.mappable_end - dev_priv->gtt.start;
+
 	primary =
 		pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
 
@@ -1533,7 +1533,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 		goto put_gmch;
 	}
 
-	aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+	aperture_size = dev_priv->gtt.mappable_end;
 
 	dev_priv->gtt.mappable =
 		io_mapping_create_wc(dev_priv->gtt.mappable_base,
@@ -1690,7 +1690,7 @@ int i915_driver_unload(struct drm_device *dev)
 	if (dev_priv->mm.gtt_mtrr >= 0) {
 		mtrr_del(dev_priv->mm.gtt_mtrr,
 			 dev_priv->gtt.mappable_base,
-			 dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE);
+			 dev_priv->gtt.mappable_end);
 		dev_priv->mm.gtt_mtrr = -1;
 	}
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4ec66a9..e84c9f9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -166,6 +166,7 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data,
 	mutex_lock(&dev->struct_mutex);
 	i915_gem_setup_global_gtt(dev, args->gtt_start, args->gtt_end,
 				  args->gtt_end);
+	dev_priv->gtt.mappable_end = args->gtt_end;
 	mutex_unlock(&dev->struct_mutex);
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index c5fd35b..f10aa87 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -557,7 +557,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 	}
 
 	dev_priv->gtt.start = start;
-	dev_priv->gtt.mappable_end = mappable_end;
 	dev_priv->gtt.total = end - start;
 
 	/* Clear any non-preallocated blocks */
@@ -596,7 +595,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
 	int ret;
 
 	gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
-	mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+	mappable_size = dev_priv->gtt.mappable_end;
 
 	if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
 		/* PPGTT pdes are stolen from global gtt ptes, so shrink the
@@ -692,6 +691,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	int ret;
 
 	dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
+	dev_priv->gtt.mappable_end = pci_resource_len(dev->pdev, 2);
 
 	/* On modern platforms we need not worry ourself with the legacy
 	 * hostbridge query stuff. Skip it entirely
@@ -731,14 +731,13 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	else
 		dev_priv->mm.gtt->stolen_size = gen7_get_stolen_size(snb_gmch_ctl);
 
-	dev_priv->mm.gtt->gtt_mappable_entries = pci_resource_len(dev->pdev, 2) >> PAGE_SHIFT;
 	/* 64/512MB is the current min/max we actually know of, but this is just a
 	 * coarse sanity check.
 	 */
-	if ((dev_priv->mm.gtt->gtt_mappable_entries >> 8) < 64 ||
-	    dev_priv->mm.gtt->gtt_mappable_entries > dev_priv->mm.gtt->gtt_total_entries) {
-		DRM_ERROR("Unknown GMADR entries (%d)\n",
-			  dev_priv->mm.gtt->gtt_mappable_entries);
+	if ((dev_priv->gtt.mappable_end < (64<<20) ||
+	    (dev_priv->gtt.mappable_end > (512<<20)))) {
+		DRM_ERROR("Unknown GMADR size (%lx)\n",
+			  dev_priv->gtt.mappable_end);
 		ret = -ENXIO;
 		goto err_out;
 	}
@@ -760,7 +759,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
 
 	/* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
 	DRM_INFO("Memory usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
-	DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8);
+	DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20);
 	DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index ce02af8..ce5f544 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -135,8 +135,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
 		goto out_unpin;
 	}
 	info->apertures->ranges[0].base = dev->mode_config.fb_base;
-	info->apertures->ranges[0].size =
-		dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+	info->apertures->ranges[0].size = dev_priv->gtt.mappable_end;
 
 	info->fix.smem_start = dev->mode_config.fb_base + obj->gtt_offset;
 	info->fix.smem_len = size;
-- 
1.8.1.1

[PATCH 07/13 v2] drm/i915: Stop using gtt_total_entries

[Ben Widawsky]

Similar to gtt_mappable_entries we don't usually want the entries,
it's easy enough to calculate it when you need.

v2: Move relevant fields above pre-gen6 init

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_drv.h     |  3 +++
 drivers/gpu/drm/i915/i915_gem_gtt.c | 33 ++++++++++++++++++---------------
 2 files changed, 21 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 51766d2..9d8f196 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -374,6 +374,7 @@ struct intel_device_info {
 struct i915_gtt {
 	unsigned long start;		/* Start offset of used GTT */
 	size_t total;			/* Total size GTT can map */
+	size_t used;			/* Amount used <= total */
 
 	unsigned long mappable_end;	/* End offset that we can CPU map */
 	struct io_mapping *mappable;	/* Mapping to our CPU mappable region */
@@ -381,7 +382,9 @@ struct i915_gtt {
 
 	/** "Graphics Stolen Memory" holds the global PTEs */
 	void __iomem *gsm;
+
 };
+#define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
 
 #define I915_PPGTT_PD_ENTRIES 512
 #define I915_PPGTT_PT_ENTRIES 1024
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f10aa87..ca8abe1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -119,7 +119,8 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
 	/* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024
 	 * entries. For aliasing ppgtt support we just steal them at the end for
 	 * now. */
-	first_pd_entry_in_global_pt = dev_priv->mm.gtt->gtt_total_entries - I915_PPGTT_PD_ENTRIES;
+	first_pd_entry_in_global_pt =
+		gtt_total_entries(dev_priv->gtt) - I915_PPGTT_PD_ENTRIES;
 
 	ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
 	if (!ppgtt)
@@ -368,7 +369,7 @@ static void i915_ggtt_clear_range(struct drm_device *dev,
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	gtt_pte_t scratch_pte;
 	gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->gtt.gsm + first_entry;
-	const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
+	const int max_entries = gtt_total_entries(dev_priv->gtt) - first_entry;
 	int i;
 
 	if (INTEL_INFO(dev)->gen < 6) {
@@ -431,7 +432,7 @@ static void gen6_ggtt_bind_object(struct drm_i915_gem_object *obj,
 	struct sg_table *st = obj->pages;
 	struct scatterlist *sg = st->sgl;
 	const int first_entry = obj->gtt_space->start >> PAGE_SHIFT;
-	const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
+	const int max_entries = gtt_total_entries(dev_priv->gtt) - first_entry;
 	gtt_pte_t __iomem *gtt_entries =
 		(gtt_pte_t __iomem *)dev_priv->gtt.gsm + first_entry;
 	int unused, i = 0;
@@ -557,7 +558,9 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
 	}
 
 	dev_priv->gtt.start = start;
-	dev_priv->gtt.total = end - start;
+	dev_priv->gtt.used = end - start;
+	if (dev_priv->gtt.used < dev_priv->gtt.total)
+		DRM_DEBUG_DRIVER("Warning: using less than total memory\n");
 
 	/* Clear any non-preallocated blocks */
 	drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
@@ -594,7 +597,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
 	unsigned long gtt_size, mappable_size;
 	int ret;
 
-	gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
+	gtt_size = dev_priv->gtt.total;
 	mappable_size = dev_priv->gtt.mappable_end;
 
 	if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
@@ -687,11 +690,18 @@ int i915_gem_gtt_init(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	phys_addr_t gtt_bus_addr;
+	u32 gtt_size;
 	u16 snb_gmch_ctl;
 	int ret;
 
+	if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
+		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
+
+	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
 	dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
 	dev_priv->gtt.mappable_end = pci_resource_len(dev->pdev, 2);
+	gtt_size = gen6_get_total_gtt_size(snb_gmch_ctl);
+	dev_priv->gtt.total = (gtt_size / sizeof(gtt_pte_t)) << PAGE_SHIFT;
 
 	/* On modern platforms we need not worry ourself with the legacy
 	 * hostbridge query stuff. Skip it entirely
@@ -716,16 +726,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	if (!dev_priv->mm.gtt)
 		return -ENOMEM;
 
-	if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
-		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
-
 	/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
 	gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
 
-	/* i9xx_setup */
-	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
-	dev_priv->mm.gtt->gtt_total_entries =
-		gen6_get_total_gtt_size(snb_gmch_ctl) / sizeof(gtt_pte_t);
 	if (INTEL_INFO(dev)->gen < 7)
 		dev_priv->mm.gtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
 	else
@@ -748,8 +751,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
 		goto err_out;
 	}
 
-	dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr,
-				       dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
+	dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr, gtt_size);
 	if (!dev_priv->gtt.gsm) {
 		DRM_ERROR("Failed to map the gtt page table\n");
 		teardown_scratch_page(dev);
@@ -758,7 +760,8 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	}
 
 	/* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
-	DRM_INFO("Memory usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
+	DRM_INFO("Memory usable by graphics device = %zdM\n",
+		 dev_priv->gtt.total >> 20);
 	DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20);
 	DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
 
-- 
1.8.1.1

[PATCH 10/13 v2] drm/i915: Needs_dmar, not

[Ben Widawsky]

The reasoning behind our code taking two paths depending upon whether or
not we may have been configured for IOMMU isn't clear to me. It should
always be safe to use the pci mapping functions as they are designed to
abstract the decision we were handling in i915.

Aside from simpler code, removing another member for the intel_gtt
struct is a nice motivation.

I ran this by Chris, and he wasn't concerned about the extra kzalloc,
and memory references vs. page_to_phys calculation in the case without
IOMMU.

v2: Update commit message

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/char/agp/intel-gtt.c        | 10 ++++++----
 drivers/gpu/drm/i915/i915_gem_gtt.c | 35 +++++++++++++----------------------
 include/drm/intel-gtt.h             |  2 --
 3 files changed, 19 insertions(+), 28 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index eb05eb5..a531377 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -84,6 +84,8 @@ static struct _intel_private {
 	 * this is not the full gtt. */
 	unsigned int gtt_mappable_entries;
 	phys_addr_t gma_bus_addr;
+	/* Whether i915 needs to use the dmar apis or not. */
+	unsigned int needs_dmar : 1;
 } intel_private;
 
 #define INTEL_GTT_GEN	intel_private.driver->gen
@@ -299,7 +301,7 @@ static int intel_gtt_setup_scratch_page(void)
 	get_page(page);
 	set_pages_uc(page, 1);
 
-	if (intel_private.base.needs_dmar) {
+	if (intel_private.needs_dmar) {
 		dma_addr = pci_map_page(intel_private.pcidev, page, 0,
 				    PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 		if (pci_dma_mapping_error(intel_private.pcidev, dma_addr))
@@ -615,7 +617,7 @@ static int intel_gtt_init(void)
 
 	intel_private.stolen_size = intel_gtt_stolen_size();
 
-	intel_private.base.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
+	intel_private.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
 
 	ret = intel_gtt_setup_scratch_page();
 	if (ret != 0) {
@@ -875,7 +877,7 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
 	if (!mem->is_flushed)
 		global_cache_flush();
 
-	if (intel_private.base.needs_dmar) {
+	if (intel_private.needs_dmar) {
 		struct sg_table st;
 
 		ret = intel_gtt_map_memory(mem->pages, mem->page_count, &st);
@@ -919,7 +921,7 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
 
 	intel_gtt_clear_range(pg_start, mem->page_count);
 
-	if (intel_private.base.needs_dmar) {
+	if (intel_private.needs_dmar) {
 		intel_gtt_unmap_memory(mem->sg_list, mem->num_sg);
 		mem->sg_list = NULL;
 		mem->num_sg = 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a92d8cd..ae96835 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -139,28 +139,23 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
 			goto err_pt_alloc;
 	}
 
-	if (dev_priv->mm.gtt->needs_dmar) {
-		ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t)
-						*ppgtt->num_pd_entries,
-					     GFP_KERNEL);
-		if (!ppgtt->pt_dma_addr)
-			goto err_pt_alloc;
+	ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t) *ppgtt->num_pd_entries,
+				     GFP_KERNEL);
+	if (!ppgtt->pt_dma_addr)
+		goto err_pt_alloc;
 
-		for (i = 0; i < ppgtt->num_pd_entries; i++) {
-			dma_addr_t pt_addr;
+	for (i = 0; i < ppgtt->num_pd_entries; i++) {
+		dma_addr_t pt_addr;
 
-			pt_addr = pci_map_page(dev->pdev, ppgtt->pt_pages[i],
-					       0, 4096,
-					       PCI_DMA_BIDIRECTIONAL);
+		pt_addr = pci_map_page(dev->pdev, ppgtt->pt_pages[i], 0, 4096,
+				       PCI_DMA_BIDIRECTIONAL);
 
-			if (pci_dma_mapping_error(dev->pdev,
-						  pt_addr)) {
-				ret = -EIO;
-				goto err_pd_pin;
+		if (pci_dma_mapping_error(dev->pdev, pt_addr)) {
+			ret = -EIO;
+			goto err_pd_pin;
 
-			}
-			ppgtt->pt_dma_addr[i] = pt_addr;
 		}
+		ppgtt->pt_dma_addr[i] = pt_addr;
 	}
 
 	ppgtt->scratch_page_dma_addr = dev_priv->mm.gtt->scratch_page_dma;
@@ -295,11 +290,7 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
 	for (i = 0; i < ppgtt->num_pd_entries; i++) {
 		dma_addr_t pt_addr;
 
-		if (dev_priv->mm.gtt->needs_dmar)
-			pt_addr = ppgtt->pt_dma_addr[i];
-		else
-			pt_addr = page_to_phys(ppgtt->pt_pages[i]);
-
+		pt_addr = ppgtt->pt_dma_addr[i];
 		pd_entry = GEN6_PDE_ADDR_ENCODE(pt_addr);
 		pd_entry |= GEN6_PDE_VALID;
 
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 6f53ecd..63157c5 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -4,8 +4,6 @@
 #define	_DRM_INTEL_GTT_H
 
 struct intel_gtt {
-	/*  Whether i915 needs to use the dmar apis or not. */
-	unsigned int needs_dmar : 1;
 	/* Whether we idle the gpu before mapping/unmapping */
 	unsigned int do_idle_maps : 1;
 	/* Share the scratch page dma with ppgtts. */
-- 
1.8.1.1

[PATCH 13/13 v2] drm/i915: Finally kill off struct intel_gtt

[Ben Widawsky]

Nothing is shared anymore between AGP and drm/i915 driver. Pre-GEN6
still uses AGP, but all necessary info is encapsulated per driver.

v2: Conflict resolution from earlier rebase

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/char/agp/intel-gtt.c        |  7 -------
 drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +--------------------
 include/drm/intel-gtt.h             |  3 ---
 3 files changed, 1 insertion(+), 30 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 773ce8b..53086a2 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -60,7 +60,6 @@ struct intel_gtt_driver {
 };
 
 static struct _intel_private {
-	struct intel_gtt base;
 	const struct intel_gtt_driver *driver;
 	struct pci_dev *pcidev;	/* device one */
 	struct pci_dev *bridge_dev;
@@ -1372,12 +1371,6 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 }
 EXPORT_SYMBOL(intel_gmch_probe);
 
-struct intel_gtt *intel_gtt_get(void)
-{
-	return &intel_private.base;
-}
-EXPORT_SYMBOL(intel_gtt_get);
-
 void intel_gtt_chipset_flush(void)
 {
 	if (intel_private.driver->chipset_flush)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b4227a1..c849e99 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -716,28 +716,10 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	 * hostbridge query stuff. Skip it entirely
 	 */
 	if (INTEL_INFO(dev)->gen < 6) {
-		ret = intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
-		if (!ret) {
-			DRM_ERROR("failed to set up gmch\n");
-			return -EIO;
-		}
-
-		dev_priv->mm.gtt = intel_gtt_get();
-		if (!dev_priv->mm.gtt) {
-			DRM_ERROR("Failed to initialize GTT\n");
-			intel_gmch_remove();
-			return -ENODEV;
-		}
-
 		dev_priv->gtt.do_idle_maps = needs_idle_maps(dev);
-
-		return 0;
+		return intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
 	}
 
-	dev_priv->mm.gtt = kzalloc(sizeof(*dev_priv->mm.gtt), GFP_KERNEL);
-	if (!dev_priv->mm.gtt)
-		return -ENOMEM;
-
 	/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
 	gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
 
@@ -794,5 +776,4 @@ void i915_gem_gtt_fini(struct drm_device *dev)
 	teardown_scratch_page(dev);
 	if (INTEL_INFO(dev)->gen < 6)
 		intel_gmch_remove();
-	kfree(dev_priv->mm.gtt);
 }
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index ae55605..8b546ee 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -3,9 +3,6 @@
 #ifndef _DRM_INTEL_GTT_H
 #define	_DRM_INTEL_GTT_H
 
-struct intel_gtt {
-} *intel_gtt_get(void);
-
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 		     struct agp_bridge_data *bridge);
 void intel_gmch_remove(void);
-- 
1.8.1.1

Re: [PATCH 01/13] drm/i915: Kill gtt_end

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> It's duplicated in the more useful gtt_total.
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_drv.h     | 1 -
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +--
>  2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d2b93a4..f49b7be 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -797,7 +797,6 @@ typedef struct drm_i915_private {
>                 /** Usable portion of the GTT for GEM */
>                 unsigned long gtt_start;
>                 unsigned long gtt_mappable_end;
> -               unsigned long gtt_end;
>                 unsigned long stolen_base; /* limited to low memory (32-bit) */
>
>                 /** "Graphics Stolen Memory" holds the global PTEs */
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index eac2cec..63da446 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -394,7 +394,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
>
>         /* First fill our portion of the GTT with scratch pages */
>         i915_ggtt_clear_range(dev, dev_priv->mm.gtt_start / PAGE_SIZE,
> -                             (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE);
> +                             dev_priv->mm.gtt_total / PAGE_SIZE);
>
>         list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
>                 i915_gem_clflush_object(obj);
> @@ -556,7 +556,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
>
>         dev_priv->mm.gtt_start = start;
>         dev_priv->mm.gtt_mappable_end = mappable_end;
> -       dev_priv->mm.gtt_end = end;
>         dev_priv->mm.gtt_total = end - start;
>         dev_priv->mm.mappable_gtt_total = min(end, mappable_end) - start;
>
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 02/13] drm/i915: Mappable_end can't ever be > end

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> Both DRI1 and DRI2 can never specify a mappable size which goes past the
> GTT size.  Don't pretend otherwise.
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 63da446..6c068b0 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -536,6 +536,8 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
>         struct drm_i915_gem_object *obj;
>         unsigned long hole_start, hole_end;
>
> +       BUG_ON(mappable_end > end);
> +
>         /* Subtract the guard page ... */
>         drm_mm_init(&dev_priv->mm.gtt_space, start, end - start - PAGE_SIZE);
>         if (!HAS_LLC(dev))
> @@ -557,7 +559,7 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
>         dev_priv->mm.gtt_start = start;
>         dev_priv->mm.gtt_mappable_end = mappable_end;
>         dev_priv->mm.gtt_total = end - start;
> -       dev_priv->mm.mappable_gtt_total = min(end, mappable_end) - start;
> +       dev_priv->mm.mappable_gtt_total = mappable_end - start;
>
>         /* Clear any non-preallocated blocks */
>         drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 03/13] drm/i915: Remove gtt_mappable_total

[Rodrigo Vivi]

for the patch itself feel free to use

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

but at this point I just got a bit confused why not having an standard
like always using total or always using end-start...


On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> With the assertion from the previous patch in place, it should be safe
> to get rid gtt_mappable_total. Keeps things saner to not have to track
> the same info in two places.
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
>  drivers/gpu/drm/i915/i915_drv.h     | 1 -
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 1 -
>  3 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 882a735..2f14b6d 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -259,7 +259,8 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
>                    count, size);
>
>         seq_printf(m, "%zu [%zu] gtt total\n",
> -                  dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
> +                  dev_priv->mm.gtt_total,
> +                  dev_priv->mm.gtt_mappable_end - dev_priv->mm.gtt_start);
>
>         mutex_unlock(&dev->struct_mutex);
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index f49b7be..5985ed0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -881,7 +881,6 @@ typedef struct drm_i915_private {
>
>                 /* accounting, useful for userland debugging */
>                 size_t gtt_total;
> -               size_t mappable_gtt_total;
>                 size_t object_memory;
>                 u32 object_count;
>         } mm;
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 6c068b0..f79081e 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -559,7 +559,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
>         dev_priv->mm.gtt_start = start;
>         dev_priv->mm.gtt_mappable_end = mappable_end;
>         dev_priv->mm.gtt_total = end - start;
> -       dev_priv->mm.mappable_gtt_total = mappable_end - start;
>
>         /* Clear any non-preallocated blocks */
>         drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 04/13] drm/i915: Create a gtt structure

[Rodrigo Vivi]

why not put gtt_mtrr to new gtt struct?

anyways, feel free to use Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> The purpose of the gtt structure is to help isolate our gtt specific
> properties from the rest of the code (in doing so it help us finish the
> isolation from the AGP connection).
>
> The following members are pulled out (and renamed):
> gtt_start
> gtt_total
> gtt_mappable_end
> gtt_mappable
> gtt_base_addr
> gsm
>
> The gtt structure will serve as a nice place to put gen specific gtt
> routines in upcoming patches.
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c        |  4 ++--
>  drivers/gpu/drm/i915/i915_dma.c            | 20 ++++++++++----------
>  drivers/gpu/drm/i915/i915_drv.h            | 29 +++++++++++++++++++++--------
>  drivers/gpu/drm/i915/i915_gem.c            | 17 +++++++++--------
>  drivers/gpu/drm/i915/i915_gem_evict.c      |  2 +-
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |  2 +-
>  drivers/gpu/drm/i915/i915_gem_gtt.c        | 24 ++++++++++++------------
>  drivers/gpu/drm/i915/i915_gem_tiling.c     |  2 +-
>  drivers/gpu/drm/i915/i915_irq.c            |  4 ++--
>  drivers/gpu/drm/i915/intel_display.c       |  2 +-
>  drivers/gpu/drm/i915/intel_fb.c            |  2 +-
>  drivers/gpu/drm/i915/intel_overlay.c       |  4 ++--
>  12 files changed, 63 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 2f14b6d..7123af4 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -259,8 +259,8 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
>                    count, size);
>
>         seq_printf(m, "%zu [%zu] gtt total\n",
> -                  dev_priv->mm.gtt_total,
> -                  dev_priv->mm.gtt_mappable_end - dev_priv->mm.gtt_start);
> +                  dev_priv->gtt.total,
> +                  dev_priv->gtt.mappable_end - dev_priv->gtt.start);
>
>         mutex_unlock(&dev->struct_mutex);
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 272e500..bb4382f 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1067,7 +1067,7 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
>         ring->status_page.gfx_addr = hws->addr & (0x1ffff<<12);
>
>         dev_priv->dri1.gfx_hws_cpu_addr =
> -               ioremap_wc(dev_priv->mm.gtt_base_addr + hws->addr, 4096);
> +               ioremap_wc(dev_priv->gtt.mappable_base + hws->addr, 4096);
>         if (dev_priv->dri1.gfx_hws_cpu_addr == NULL) {
>                 i915_dma_cleanup(dev);
>                 ring->status_page.gfx_addr = 0;
> @@ -1534,17 +1534,17 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>         }
>
>         aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
> -       dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr;
> +       dev_priv->gtt.mappable_base = dev_priv->mm.gtt->gma_bus_addr;
>
> -       dev_priv->mm.gtt_mapping =
> -               io_mapping_create_wc(dev_priv->mm.gtt_base_addr,
> +       dev_priv->gtt.mappable =
> +               io_mapping_create_wc(dev_priv->gtt.mappable_base,
>                                      aperture_size);
> -       if (dev_priv->mm.gtt_mapping == NULL) {
> +       if (dev_priv->gtt.mappable == NULL) {
>                 ret = -EIO;
>                 goto out_rmmap;
>         }
>
> -       i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr,
> +       i915_mtrr_setup(dev_priv, dev_priv->gtt.mappable_base,
>                         aperture_size);
>
>         /* The i915 workqueue is primarily used for batched retirement of
> @@ -1649,11 +1649,11 @@ out_gem_unload:
>  out_mtrrfree:
>         if (dev_priv->mm.gtt_mtrr >= 0) {
>                 mtrr_del(dev_priv->mm.gtt_mtrr,
> -                        dev_priv->mm.gtt_base_addr,
> +                        dev_priv->gtt.mappable_base,
>                          aperture_size);
>                 dev_priv->mm.gtt_mtrr = -1;
>         }
> -       io_mapping_free(dev_priv->mm.gtt_mapping);
> +       io_mapping_free(dev_priv->gtt.mappable);
>  out_rmmap:
>         pci_iounmap(dev->pdev, dev_priv->regs);
>  put_gmch:
> @@ -1687,10 +1687,10 @@ int i915_driver_unload(struct drm_device *dev)
>         /* Cancel the retire work handler, which should be idle now. */
>         cancel_delayed_work_sync(&dev_priv->mm.retire_work);
>
> -       io_mapping_free(dev_priv->mm.gtt_mapping);
> +       io_mapping_free(dev_priv->gtt.mappable);
>         if (dev_priv->mm.gtt_mtrr >= 0) {
>                 mtrr_del(dev_priv->mm.gtt_mtrr,
> -                        dev_priv->mm.gtt_base_addr,
> +                        dev_priv->gtt.mappable_base,
>                          dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE);
>                 dev_priv->mm.gtt_mtrr = -1;
>         }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 5985ed0..51766d2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -364,6 +364,25 @@ struct intel_device_info {
>         u8 has_llc:1;
>  };
>
> +/* The Graphics Translation Table is the way in which GEN hardware translates a
> + * Graphics Virtual Address into a Physical Address. In addition to the normal
> + * collateral associated with any va->pa translations GEN hardware also has a
> + * portion of the GTT which can be mapped by the CPU and remain both coherent
> + * and correct (in cases like swizzling). That region is referred to as GMADR in
> + * the spec.
> + */
> +struct i915_gtt {
> +       unsigned long start;            /* Start offset of used GTT */
> +       size_t total;                   /* Total size GTT can map */
> +
> +       unsigned long mappable_end;     /* End offset that we can CPU map */
> +       struct io_mapping *mappable;    /* Mapping to our CPU mappable region */
> +       phys_addr_t mappable_base;      /* PA of our GMADR */
> +
> +       /** "Graphics Stolen Memory" holds the global PTEs */
> +       void __iomem *gsm;
> +};
> +
>  #define I915_PPGTT_PD_ENTRIES 512
>  #define I915_PPGTT_PT_ENTRIES 1024
>  struct i915_hw_ppgtt {
> @@ -777,6 +796,8 @@ typedef struct drm_i915_private {
>         /* Register state */
>         bool modeset_on_lid;
>
> +       struct i915_gtt gtt;
> +
>         struct {
>                 /** Bridge to intel-gtt-ko */
>                 struct intel_gtt *gtt;
> @@ -795,15 +816,8 @@ typedef struct drm_i915_private {
>                 struct list_head unbound_list;
>
>                 /** Usable portion of the GTT for GEM */
> -               unsigned long gtt_start;
> -               unsigned long gtt_mappable_end;
>                 unsigned long stolen_base; /* limited to low memory (32-bit) */
>
> -               /** "Graphics Stolen Memory" holds the global PTEs */
> -               void __iomem *gsm;
> -
> -               struct io_mapping *gtt_mapping;
> -               phys_addr_t gtt_base_addr;
>                 int gtt_mtrr;
>
>                 /** PPGTT used for aliasing the PPGTT with the GTT */
> @@ -880,7 +894,6 @@ typedef struct drm_i915_private {
>                 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
>
>                 /* accounting, useful for userland debugging */
> -               size_t gtt_total;
>                 size_t object_memory;
>                 u32 object_count;
>         } mm;
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index ad98db5..4ec66a9 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -149,6 +149,7 @@ int
>  i915_gem_init_ioctl(struct drm_device *dev, void *data,
>                     struct drm_file *file)
>  {
> +       struct drm_i915_private *dev_priv = dev->dev_private;
>         struct drm_i915_gem_init *args = data;
>
>         if (drm_core_check_feature(dev, DRIVER_MODESET))
> @@ -186,7 +187,7 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
>                         pinned += obj->gtt_space->size;
>         mutex_unlock(&dev->struct_mutex);
>
> -       args->aper_size = dev_priv->mm.gtt_total;
> +       args->aper_size = dev_priv->gtt.total;
>         args->aper_available_size = args->aper_size - pinned;
>
>         return 0;
> @@ -637,7 +638,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev,
>                  * source page isn't available.  Return the error and we'll
>                  * retry in the slow path.
>                  */
> -               if (fast_user_write(dev_priv->mm.gtt_mapping, page_base,
> +               if (fast_user_write(dev_priv->gtt.mappable, page_base,
>                                     page_offset, user_data, page_length)) {
>                         ret = -EFAULT;
>                         goto out_unpin;
> @@ -1362,7 +1363,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
>
>         obj->fault_mappable = true;
>
> -       pfn = ((dev_priv->mm.gtt_base_addr + obj->gtt_offset) >> PAGE_SHIFT) +
> +       pfn = ((dev_priv->gtt.mappable_base + obj->gtt_offset) >> PAGE_SHIFT) +
>                 page_offset;
>
>         /* Finally, remap it using the new GTT offset */
> @@ -1568,7 +1569,7 @@ i915_gem_mmap_gtt(struct drm_file *file,
>                 goto unlock;
>         }
>
> -       if (obj->base.size > dev_priv->mm.gtt_mappable_end) {
> +       if (obj->base.size > dev_priv->gtt.mappable_end) {
>                 ret = -E2BIG;
>                 goto out;
>         }
> @@ -2944,7 +2945,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
>          * before evicting everything in a vain attempt to find space.
>          */
>         if (obj->base.size >
> -           (map_and_fenceable ? dev_priv->mm.gtt_mappable_end : dev_priv->mm.gtt_total)) {
> +           (map_and_fenceable ? dev_priv->gtt.mappable_end : dev_priv->gtt.total)) {
>                 DRM_ERROR("Attempting to bind an object larger than the aperture\n");
>                 return -E2BIG;
>         }
> @@ -2959,7 +2960,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
>         if (map_and_fenceable)
>                 free_space = drm_mm_search_free_in_range_color(&dev_priv->mm.gtt_space,
>                                                                size, alignment, obj->cache_level,
> -                                                              0, dev_priv->mm.gtt_mappable_end,
> +                                                              0, dev_priv->gtt.mappable_end,
>                                                                false);
>         else
>                 free_space = drm_mm_search_free_color(&dev_priv->mm.gtt_space,
> @@ -2971,7 +2972,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
>                         free_space =
>                                 drm_mm_get_block_range_generic(free_space,
>                                                                size, alignment, obj->cache_level,
> -                                                              0, dev_priv->mm.gtt_mappable_end,
> +                                                              0, dev_priv->gtt.mappable_end,
>                                                                false);
>                 else
>                         free_space =
> @@ -3017,7 +3018,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
>                 (free_space->start & (fence_alignment - 1)) == 0;
>
>         mappable =
> -               obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end;
> +               obj->gtt_offset + obj->base.size <= dev_priv->gtt.mappable_end;
>
>         obj->map_and_fenceable = mappable && fenceable;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
> index 776a322..c86d5d9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_evict.c
> +++ b/drivers/gpu/drm/i915/i915_gem_evict.c
> @@ -80,7 +80,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
>         if (mappable)
>                 drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
>                                             min_size, alignment, cache_level,
> -                                           0, dev_priv->mm.gtt_mappable_end);
> +                                           0, dev_priv->gtt.mappable_end);
>         else
>                 drm_mm_init_scan(&dev_priv->mm.gtt_space,
>                                  min_size, alignment, cache_level);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 6cd3e1c..0924be9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -209,7 +209,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
>
>                 /* Map the page containing the relocation we're going to perform.  */
>                 reloc->offset += obj->gtt_offset;
> -               reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
> +               reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
>                                                       reloc->offset & PAGE_MASK);
>                 reloc_entry = (uint32_t __iomem *)
>                         (reloc_page + (reloc->offset & ~PAGE_MASK));
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index f79081e..e044f58 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -290,7 +290,7 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
>                 return;
>
>
> -       pd_addr = (gtt_pte_t __iomem*)dev_priv->mm.gsm + ppgtt->pd_offset/sizeof(gtt_pte_t);
> +       pd_addr = (gtt_pte_t __iomem*)dev_priv->gtt.gsm + ppgtt->pd_offset/sizeof(gtt_pte_t);
>         for (i = 0; i < ppgtt->num_pd_entries; i++) {
>                 dma_addr_t pt_addr;
>
> @@ -367,7 +367,7 @@ static void i915_ggtt_clear_range(struct drm_device *dev,
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         gtt_pte_t scratch_pte;
> -       gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->mm.gsm + first_entry;
> +       gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->gtt.gsm + first_entry;
>         const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
>         int i;
>
> @@ -393,8 +393,8 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
>         struct drm_i915_gem_object *obj;
>
>         /* First fill our portion of the GTT with scratch pages */
> -       i915_ggtt_clear_range(dev, dev_priv->mm.gtt_start / PAGE_SIZE,
> -                             dev_priv->mm.gtt_total / PAGE_SIZE);
> +       i915_ggtt_clear_range(dev, dev_priv->gtt.start / PAGE_SIZE,
> +                             dev_priv->gtt.total / PAGE_SIZE);
>
>         list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
>                 i915_gem_clflush_object(obj);
> @@ -433,7 +433,7 @@ static void gen6_ggtt_bind_object(struct drm_i915_gem_object *obj,
>         const int first_entry = obj->gtt_space->start >> PAGE_SHIFT;
>         const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
>         gtt_pte_t __iomem *gtt_entries =
> -               (gtt_pte_t __iomem *)dev_priv->mm.gsm + first_entry;
> +               (gtt_pte_t __iomem *)dev_priv->gtt.gsm + first_entry;
>         int unused, i = 0;
>         unsigned int len, m = 0;
>         dma_addr_t addr;
> @@ -556,9 +556,9 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
>                 obj->has_global_gtt_mapping = 1;
>         }
>
> -       dev_priv->mm.gtt_start = start;
> -       dev_priv->mm.gtt_mappable_end = mappable_end;
> -       dev_priv->mm.gtt_total = end - start;
> +       dev_priv->gtt.start = start;
> +       dev_priv->gtt.mappable_end = mappable_end;
> +       dev_priv->gtt.total = end - start;
>
>         /* Clear any non-preallocated blocks */
>         drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
> @@ -748,9 +748,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
>                 goto err_out;
>         }
>
> -       dev_priv->mm.gsm = ioremap_wc(gtt_bus_addr,
> -                                     dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
> -       if (!dev_priv->mm.gsm) {
> +       dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr,
> +                                      dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
> +       if (!dev_priv->gtt.gsm) {
>                 DRM_ERROR("Failed to map the gtt page table\n");
>                 teardown_scratch_page(dev);
>                 ret = -ENOMEM;
> @@ -774,7 +774,7 @@ err_out:
>  void i915_gem_gtt_fini(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
> -       iounmap(dev_priv->mm.gsm);
> +       iounmap(dev_priv->gtt.gsm);
>         teardown_scratch_page(dev);
>         if (INTEL_INFO(dev)->gen < 6)
>                 intel_gmch_remove();
> diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
> index 65f1d4f..eaaf2be 100644
> --- a/drivers/gpu/drm/i915/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
> @@ -368,7 +368,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
>
>                 obj->map_and_fenceable =
>                         obj->gtt_space == NULL ||
> -                       (obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end &&
> +                       (obj->gtt_offset + obj->base.size <= dev_priv->gtt.mappable_end &&
>                          i915_gem_object_fence_ok(obj, args->tiling_mode));
>
>                 /* Rebind if we need a change of alignment */
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 6ba0573..62aae5d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -939,7 +939,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
>                         goto unwind;
>
>                 local_irq_save(flags);
> -               if (reloc_offset < dev_priv->mm.gtt_mappable_end &&
> +               if (reloc_offset < dev_priv->gtt.mappable_end &&
>                     src->has_global_gtt_mapping) {
>                         void __iomem *s;
>
> @@ -948,7 +948,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
>                          * captures what the GPU read.
>                          */
>
> -                       s = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
> +                       s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
>                                                      reloc_offset);
>                         memcpy_fromio(d, s, PAGE_SIZE);
>                         io_mapping_unmap_atomic(s);
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 162cb22..723161b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8506,7 +8506,7 @@ void intel_modeset_init(struct drm_device *dev)
>                 dev->mode_config.max_width = 8192;
>                 dev->mode_config.max_height = 8192;
>         }
> -       dev->mode_config.fb_base = dev_priv->mm.gtt_base_addr;
> +       dev->mode_config.fb_base = dev_priv->gtt.mappable_base;
>
>         DRM_DEBUG_KMS("%d display pipe%s available.\n",
>                       dev_priv->num_pipe, dev_priv->num_pipe > 1 ? "s" : "");
> diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
> index 71d5580..ce02af8 100644
> --- a/drivers/gpu/drm/i915/intel_fb.c
> +++ b/drivers/gpu/drm/i915/intel_fb.c
> @@ -142,7 +142,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
>         info->fix.smem_len = size;
>
>         info->screen_base =
> -               ioremap_wc(dev_priv->mm.gtt_base_addr + obj->gtt_offset,
> +               ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
>                            size);
>         if (!info->screen_base) {
>                 ret = -ENOSPC;
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index fabe0ac..ba978bf 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -195,7 +195,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
>         if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
>                 regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_obj->handle->vaddr;
>         else
> -               regs = io_mapping_map_wc(dev_priv->mm.gtt_mapping,
> +               regs = io_mapping_map_wc(dev_priv->gtt.mappable,
>                                          overlay->reg_bo->gtt_offset);
>
>         return regs;
> @@ -1434,7 +1434,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
>                 regs = (struct overlay_registers __iomem *)
>                         overlay->reg_bo->phys_obj->handle->vaddr;
>         else
> -               regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
> +               regs = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
>                                                 overlay->reg_bo->gtt_offset);
>
>         return regs;
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 08/13] drm/i915: Move stolen_size to the new struct

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_drv.h        | 2 ++
>  drivers/gpu/drm/i915/i915_gem_gtt.c    | 7 ++++---
>  drivers/gpu/drm/i915/i915_gem_stolen.c | 8 ++++----
>  3 files changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 9d8f196..201da6d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -380,6 +380,8 @@ struct i915_gtt {
>         struct io_mapping *mappable;    /* Mapping to our CPU mappable region */
>         phys_addr_t mappable_base;      /* PA of our GMADR */
>
> +       size_t stolen_size;
> +
>         /** "Graphics Stolen Memory" holds the global PTEs */
>         void __iomem *gsm;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 5a7a4a9..e829f25 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -730,9 +730,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
>         dev_priv->gtt.total = (gtt_size / sizeof(gtt_pte_t)) << PAGE_SHIFT;
>
>         if (INTEL_INFO(dev)->gen < 7)
> -               dev_priv->mm.gtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
> +               dev_priv->gtt.stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
>         else
> -               dev_priv->mm.gtt->stolen_size = gen7_get_stolen_size(snb_gmch_ctl);
> +               dev_priv->gtt.stolen_size = gen7_get_stolen_size(snb_gmch_ctl);
>
>         /* 64/512MB is the current min/max we actually know of, but this is just a
>          * coarse sanity check.
> @@ -763,7 +763,8 @@ int i915_gem_gtt_init(struct drm_device *dev)
>         DRM_INFO("Memory usable by graphics device = %zdM\n",
>                  dev_priv->gtt.total >> 20);
>         DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20);
> -       DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
> +       DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n",
> +                        dev_priv->gtt.stolen_size >> 20);
>
>         return 0;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
> index f21ae17..69d97cb 100644
> --- a/drivers/gpu/drm/i915/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
> @@ -187,11 +187,11 @@ int i915_gem_init_stolen(struct drm_device *dev)
>         if (dev_priv->mm.stolen_base == 0)
>                 return 0;
>
> -       DRM_DEBUG_KMS("found %d bytes of stolen memory at %08lx\n",
> -                     dev_priv->mm.gtt->stolen_size, dev_priv->mm.stolen_base);
> +       DRM_DEBUG_KMS("found %zd bytes of stolen memory at %08lx\n",
> +                     dev_priv->gtt.stolen_size, dev_priv->mm.stolen_base);
>
>         /* Basic memrange allocator for stolen space */
> -       drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->mm.gtt->stolen_size);
> +       drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->gtt.stolen_size);
>
>         return 0;
>  }
> @@ -205,7 +205,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
>         struct scatterlist *sg;
>
>         DRM_DEBUG_DRIVER("offset=0x%x, size=%d\n", offset, size);
> -       BUG_ON(offset > dev_priv->mm.gtt->stolen_size - size);
> +       BUG_ON(offset > dev_priv->gtt.stolen_size - size);
>
>         /* We hide that we have no struct page backing our stolen object
>          * by wrapping the contiguous physical allocation with a fake
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 09/13] agp/intel: decouple more of the agp-i915 sharing

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/char/agp/intel-gtt.c | 35 +++++++++++++++++++++--------------
>  include/drm/intel-gtt.h      | 11 +----------
>  2 files changed, 22 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index c8d9dcb..eb05eb5 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -76,6 +76,14 @@ static struct _intel_private {
>         int resource_valid;
>         struct page *scratch_page;
>         int refcount;
> +       /* Size of memory reserved for graphics by the BIOS */
> +       unsigned int stolen_size;
> +       /* Total number of gtt entries. */
> +       unsigned int gtt_total_entries;
> +       /* Part of the gtt that is mappable by the cpu, for those chips where
> +        * this is not the full gtt. */
> +       unsigned int gtt_mappable_entries;
> +       phys_addr_t gma_bus_addr;
>  } intel_private;
>
>  #define INTEL_GTT_GEN  intel_private.driver->gen
> @@ -506,7 +514,7 @@ static unsigned int intel_gtt_total_entries(void)
>                 /* On previous hardware, the GTT size was just what was
>                  * required to map the aperture.
>                  */
> -               return intel_private.base.gtt_mappable_entries;
> +               return intel_private.gtt_mappable_entries;
>         }
>  }
>
> @@ -572,8 +580,8 @@ static int intel_gtt_init(void)
>         if (ret != 0)
>                 return ret;
>
> -       intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries();
> -       intel_private.base.gtt_total_entries = intel_gtt_total_entries();
> +       intel_private.gtt_mappable_entries = intel_gtt_mappable_entries();
> +       intel_private.gtt_total_entries = intel_gtt_total_entries();
>
>         /* save the PGETBL reg for resume */
>         intel_private.PGETBL_save =
> @@ -585,10 +593,10 @@ static int intel_gtt_init(void)
>
>         dev_info(&intel_private.bridge_dev->dev,
>                         "detected gtt size: %dK total, %dK mappable\n",
> -                       intel_private.base.gtt_total_entries * 4,
> -                       intel_private.base.gtt_mappable_entries * 4);
> +                       intel_private.gtt_total_entries * 4,
> +                       intel_private.gtt_mappable_entries * 4);
>
> -       gtt_map_size = intel_private.base.gtt_total_entries * 4;
> +       gtt_map_size = intel_private.gtt_total_entries * 4;
>
>         intel_private.gtt = NULL;
>         if (INTEL_GTT_GEN < 6 && INTEL_GTT_GEN > 2)
> @@ -605,7 +613,7 @@ static int intel_gtt_init(void)
>
>         global_cache_flush();   /* FIXME: ? */
>
> -       intel_private.base.stolen_size = intel_gtt_stolen_size();
> +       intel_private.stolen_size = intel_gtt_stolen_size();
>
>         intel_private.base.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
>
> @@ -622,7 +630,7 @@ static int intel_gtt_init(void)
>                 pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
>                                       &gma_addr);
>
> -       intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
> +       intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
>
>         return 0;
>  }
> @@ -633,8 +641,7 @@ static int intel_fake_agp_fetch_size(void)
>         unsigned int aper_size;
>         int i;
>
> -       aper_size = (intel_private.base.gtt_mappable_entries << PAGE_SHIFT)
> -                   / MB(1);
> +       aper_size = (intel_private.gtt_mappable_entries << PAGE_SHIFT) / MB(1);
>
>         for (i = 0; i < num_sizes; i++) {
>                 if (aper_size == intel_fake_agp_sizes[i].size) {
> @@ -778,7 +785,7 @@ static int intel_fake_agp_configure(void)
>             return -EIO;
>
>         intel_private.clear_fake_agp = true;
> -       agp_bridge->gart_bus_addr = intel_private.base.gma_bus_addr;
> +       agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;
>
>         return 0;
>  }
> @@ -844,8 +851,8 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
>                 return -ENODEV;
>
>         if (intel_private.clear_fake_agp) {
> -               int start = intel_private.base.stolen_size / PAGE_SIZE;
> -               int end = intel_private.base.gtt_mappable_entries;
> +               int start = intel_private.stolen_size / PAGE_SIZE;
> +               int end = intel_private.gtt_mappable_entries;
>                 intel_gtt_clear_range(start, end - start);
>                 intel_private.clear_fake_agp = false;
>         }
> @@ -856,7 +863,7 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
>         if (mem->page_count == 0)
>                 goto out;
>
> -       if (pg_start + mem->page_count > intel_private.base.gtt_total_entries)
> +       if (pg_start + mem->page_count > intel_private.gtt_total_entries)
>                 goto out_err;
>
>         if (type != mem->type)
> diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
> index 3e3a166..6f53ecd 100644
> --- a/include/drm/intel-gtt.h
> +++ b/include/drm/intel-gtt.h
> @@ -4,22 +4,13 @@
>  #define        _DRM_INTEL_GTT_H
>
>  struct intel_gtt {
> -       /* Size of memory reserved for graphics by the BIOS */
> -       unsigned int stolen_size;
> -       /* Total number of gtt entries. */
> -       unsigned int gtt_total_entries;
> -       /* Part of the gtt that is mappable by the cpu, for those chips where
> -        * this is not the full gtt. */
> -       unsigned int gtt_mappable_entries;
> -       /* Whether i915 needs to use the dmar apis or not. */
> +       /*  Whether i915 needs to use the dmar apis or not. */
>         unsigned int needs_dmar : 1;
>         /* Whether we idle the gpu before mapping/unmapping */
>         unsigned int do_idle_maps : 1;
>         /* Share the scratch page dma with ppgtts. */
>         dma_addr_t scratch_page_dma;
>         struct page *scratch_page;
> -       /* needed for ioremap in drm/i915 */
> -       phys_addr_t gma_bus_addr;
>  } *intel_gtt_get(void);
>
>  int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 11/13] drm/i915: Cut out the infamous ILK w/a from AGP layer

[Rodrigo Vivi]

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> And, move it to where the rest of the logic is.
>
> Cc: Dave Airlie <airlied@redhat.com>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/char/agp/intel-gtt.c        | 27 ---------------------------
>  drivers/gpu/drm/i915/i915_drv.h     |  1 +
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 27 ++++++++++++++++++++++++---
>  include/drm/intel-gtt.h             |  2 --
>  4 files changed, 25 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index a531377..f54ddc0 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -849,9 +849,6 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
>  {
>         int ret = -EINVAL;
>
> -       if (intel_private.base.do_idle_maps)
> -               return -ENODEV;
> -
>         if (intel_private.clear_fake_agp) {
>                 int start = intel_private.stolen_size / PAGE_SIZE;
>                 int end = intel_private.gtt_mappable_entries;
> @@ -916,9 +913,6 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
>         if (mem->page_count == 0)
>                 return 0;
>
> -       if (intel_private.base.do_idle_maps)
> -               return -ENODEV;
> -

I'm not convinced new logic replaces these do_idle_maps asserts

>         intel_gtt_clear_range(pg_start, mem->page_count);
>
>         if (intel_private.needs_dmar) {
> @@ -1078,24 +1072,6 @@ static void i965_write_entry(dma_addr_t addr,
>         writel(addr | pte_flags, intel_private.gtt + entry);
>  }
>
> -/* Certain Gen5 chipsets require require idling the GPU before
> - * unmapping anything from the GTT when VT-d is enabled.
> - */
> -static inline int needs_idle_maps(void)
> -{
> -#ifdef CONFIG_INTEL_IOMMU
> -       const unsigned short gpu_devid = intel_private.pcidev->device;
> -
> -       /* Query intel_iommu to see if we need the workaround. Presumably that
> -        * was loaded first.
> -        */
> -       if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB ||
> -            gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) &&
> -            intel_iommu_gfx_mapped)
> -               return 1;
> -#endif
> -       return 0;
> -}
>
>  static int i9xx_setup(void)
>  {
> @@ -1124,9 +1100,6 @@ static int i9xx_setup(void)
>                 break;
>         }
>
> -       if (needs_idle_maps())
> -               intel_private.base.do_idle_maps = 1;
> -
>         intel_i9xx_setup_flush();
>
>         return 0;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 201da6d..6c8b0b8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -385,6 +385,7 @@ struct i915_gtt {
>         /** "Graphics Stolen Memory" holds the global PTEs */
>         void __iomem *gsm;
>
> +       bool do_idle_maps;
>  };
>  #define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 2acca75..afd5ec7 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -330,11 +330,30 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
>         }
>  }
>
> +extern int intel_iommu_gfx_mapped;
> +/* Certain Gen5 chipsets require require idling the GPU before
> + * unmapping anything from the GTT when VT-d is enabled.
> + */
> +static inline bool needs_idle_maps(struct drm_device *dev)
> +{
> +#ifdef CONFIG_INTEL_IOMMU
> +       const u16 gpu_devid = dev->pdev->device;
> +
> +       /* Query intel_iommu to see if we need the workaround. Presumably that
> +        * was loaded first.
> +        */
> +       if ((gpu_devid == 0x0044 || gpu_devid == 0x46) &&

I would prefer to stay with defied names instead of direct ids.

> +            intel_iommu_gfx_mapped)
> +               return true;
> +#endif
> +       return false;
> +}
> +
>  static bool do_idling(struct drm_i915_private *dev_priv)
>  {
>         bool ret = dev_priv->mm.interruptible;
>
> -       if (unlikely(dev_priv->mm.gtt->do_idle_maps)) {
> +       if (unlikely(dev_priv->gtt.do_idle_maps)) {
>                 dev_priv->mm.interruptible = false;
>                 if (i915_gpu_idle(dev_priv->dev)) {
>                         DRM_ERROR("Couldn't idle GPU\n");
> @@ -348,11 +367,10 @@ static bool do_idling(struct drm_i915_private *dev_priv)
>
>  static void undo_idling(struct drm_i915_private *dev_priv, bool interruptible)
>  {
> -       if (unlikely(dev_priv->mm.gtt->do_idle_maps))
> +       if (unlikely(dev_priv->gtt.do_idle_maps))
>                 dev_priv->mm.interruptible = interruptible;
>  }
>
> -
>  static void i915_ggtt_clear_range(struct drm_device *dev,
>                                  unsigned first_entry,
>                                  unsigned num_entries)
> @@ -701,6 +719,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
>                         intel_gmch_remove();
>                         return -ENODEV;
>                 }
> +
> +               dev_priv->gtt.do_idle_maps = needs_idle_maps(dev);
> +
>                 return 0;
>         }
>
> diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
> index 63157c5..4982dca 100644
> --- a/include/drm/intel-gtt.h
> +++ b/include/drm/intel-gtt.h
> @@ -5,8 +5,6 @@
>
>  struct intel_gtt {
>         /* Whether we idle the gpu before mapping/unmapping */
> -       unsigned int do_idle_maps : 1;
> -       /* Share the scratch page dma with ppgtts. */
>         dma_addr_t scratch_page_dma;
>         struct page *scratch_page;
>  } *intel_gtt_get(void);
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Other than that, feel free to use:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 12/13] drm/i915: Remove scratch page from shared

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> We already had a mapping in both (minus the phys_addr in AGP).
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/char/agp/intel-gtt.c        |  9 +++++----
>  drivers/gpu/drm/i915/i915_drv.h     |  2 ++
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 16 ++++++++--------
>  include/drm/intel-gtt.h             |  3 ---
>  4 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index f54ddc0..773ce8b 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -75,6 +75,7 @@ static struct _intel_private {
>         struct resource ifp_resource;
>         int resource_valid;
>         struct page *scratch_page;
> +       phys_addr_t scratch_page_dma;
>         int refcount;
>         /* Size of memory reserved for graphics by the BIOS */
>         unsigned int stolen_size;
> @@ -307,9 +308,9 @@ static int intel_gtt_setup_scratch_page(void)
>                 if (pci_dma_mapping_error(intel_private.pcidev, dma_addr))
>                         return -EINVAL;
>
> -               intel_private.base.scratch_page_dma = dma_addr;
> +               intel_private.scratch_page_dma = dma_addr;
>         } else
> -               intel_private.base.scratch_page_dma = page_to_phys(page);
> +               intel_private.scratch_page_dma = page_to_phys(page);
>
>         intel_private.scratch_page = page;
>
> @@ -556,7 +557,7 @@ static unsigned int intel_gtt_mappable_entries(void)
>  static void intel_gtt_teardown_scratch_page(void)
>  {
>         set_pages_wb(intel_private.scratch_page, 1);
> -       pci_unmap_page(intel_private.pcidev, intel_private.base.scratch_page_dma,
> +       pci_unmap_page(intel_private.pcidev, intel_private.scratch_page_dma,
>                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
>         put_page(intel_private.scratch_page);
>         __free_page(intel_private.scratch_page);
> @@ -900,7 +901,7 @@ void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries)
>         unsigned int i;
>
>         for (i = first_entry; i < (first_entry + num_entries); i++) {
> -               intel_private.driver->write_entry(intel_private.base.scratch_page_dma,
> +               intel_private.driver->write_entry(intel_private.scratch_page_dma,
>                                                   i, 0);
>         }
>         readl(intel_private.gtt+i-1);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6c8b0b8..6637090 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -386,6 +386,8 @@ struct i915_gtt {
>         void __iomem *gsm;
>
>         bool do_idle_maps;
> +       dma_addr_t scratch_page_dma;
> +       struct page *scratch_page;
>  };
>  #define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index afd5ec7..b7641f7 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -158,7 +158,7 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
>                 ppgtt->pt_dma_addr[i] = pt_addr;
>         }
>
> -       ppgtt->scratch_page_dma_addr = dev_priv->mm.gtt->scratch_page_dma;
> +       ppgtt->scratch_page_dma_addr = dev_priv->gtt.scratch_page_dma;
>
>         i915_ppgtt_clear_range(ppgtt, 0,
>                                ppgtt->num_pd_entries*I915_PPGTT_PT_ENTRIES);
> @@ -391,7 +391,7 @@ static void i915_ggtt_clear_range(struct drm_device *dev,
>                  first_entry, num_entries, max_entries))
>                 num_entries = max_entries;
>
> -       scratch_pte = pte_encode(dev, dev_priv->mm.gtt->scratch_page_dma, I915_CACHE_LLC);
> +       scratch_pte = pte_encode(dev, dev_priv->gtt.scratch_page_dma, I915_CACHE_LLC);
>         for (i = 0; i < num_entries; i++)
>                 iowrite32(scratch_pte, &gtt_base[i]);
>         readl(gtt_base);
> @@ -656,8 +656,8 @@ static int setup_scratch_page(struct drm_device *dev)
>  #else
>         dma_addr = page_to_phys(page);
>  #endif
> -       dev_priv->mm.gtt->scratch_page = page;
> -       dev_priv->mm.gtt->scratch_page_dma = dma_addr;
> +       dev_priv->gtt.scratch_page = page;
> +       dev_priv->gtt.scratch_page_dma = dma_addr;
>
>         return 0;
>  }
> @@ -665,11 +665,11 @@ static int setup_scratch_page(struct drm_device *dev)
>  static void teardown_scratch_page(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
> -       set_pages_wb(dev_priv->mm.gtt->scratch_page, 1);
> -       pci_unmap_page(dev->pdev, dev_priv->mm.gtt->scratch_page_dma,
> +       set_pages_wb(dev_priv->gtt.scratch_page, 1);
> +       pci_unmap_page(dev->pdev, dev_priv->gtt.scratch_page_dma,
>                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
> -       put_page(dev_priv->mm.gtt->scratch_page);
> -       __free_page(dev_priv->mm.gtt->scratch_page);
> +       put_page(dev_priv->gtt.scratch_page);
> +       __free_page(dev_priv->gtt.scratch_page);
>  }
>
>  static inline unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)
> diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
> index 4982dca..ae55605 100644
> --- a/include/drm/intel-gtt.h
> +++ b/include/drm/intel-gtt.h
> @@ -4,9 +4,6 @@
>  #define        _DRM_INTEL_GTT_H
>
>  struct intel_gtt {
> -       /* Whether we idle the gpu before mapping/unmapping */
> -       dma_addr_t scratch_page_dma;
> -       struct page *scratch_page;
>  } *intel_gtt_get(void);
>
>  int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 11/13] drm/i915: Cut out the infamous ILK w/a from AGP layer

[Ben Widawsky]

On Wed, 16 Jan 2013 21:09:32 -0200
Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote:

> On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> > And, move it to where the rest of the logic is.
> >
> > Cc: Dave Airlie <airlied@redhat.com>
> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> > ---
> >  drivers/char/agp/intel-gtt.c        | 27 ---------------------------
> >  drivers/gpu/drm/i915/i915_drv.h     |  1 +
> >  drivers/gpu/drm/i915/i915_gem_gtt.c | 27 ++++++++++++++++++++++++---
> >  include/drm/intel-gtt.h             |  2 --
> >  4 files changed, 25 insertions(+), 32 deletions(-)
> >
> > diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> > index a531377..f54ddc0 100644
> > --- a/drivers/char/agp/intel-gtt.c
> > +++ b/drivers/char/agp/intel-gtt.c
> > @@ -849,9 +849,6 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
> >  {
> >         int ret = -EINVAL;
> >
> > -       if (intel_private.base.do_idle_maps)
> > -               return -ENODEV;
> > -
> >         if (intel_private.clear_fake_agp) {
> >                 int start = intel_private.stolen_size / PAGE_SIZE;
> >                 int end = intel_private.gtt_mappable_entries;
> > @@ -916,9 +913,6 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
> >         if (mem->page_count == 0)
> >                 return 0;
> >
> > -       if (intel_private.base.do_idle_maps)
> > -               return -ENODEV;
> > -
> 
> I'm not convinced new logic replaces these do_idle_maps asserts

As the author of that original logic, it should have always just been a
sanity check. I think Chris even mentioned in the original patch we
shouldn't bother with the check, but meh.

Anyway, you are right that it's not replaced, but that should be fine.

> 
> >         intel_gtt_clear_range(pg_start, mem->page_count);
> >
> >         if (intel_private.needs_dmar) {
> > @@ -1078,24 +1072,6 @@ static void i965_write_entry(dma_addr_t addr,
> >         writel(addr | pte_flags, intel_private.gtt + entry);
> >  }
> >
> > -/* Certain Gen5 chipsets require require idling the GPU before
> > - * unmapping anything from the GTT when VT-d is enabled.
> > - */
> > -static inline int needs_idle_maps(void)
> > -{
> > -#ifdef CONFIG_INTEL_IOMMU
> > -       const unsigned short gpu_devid = intel_private.pcidev->device;
> > -
> > -       /* Query intel_iommu to see if we need the workaround. Presumably that
> > -        * was loaded first.
> > -        */
> > -       if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB ||
> > -            gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) &&
> > -            intel_iommu_gfx_mapped)
> > -               return 1;
> > -#endif
> > -       return 0;
> > -}
> >
> >  static int i9xx_setup(void)
> >  {
> > @@ -1124,9 +1100,6 @@ static int i9xx_setup(void)
> >                 break;
> >         }
> >
> > -       if (needs_idle_maps())
> > -               intel_private.base.do_idle_maps = 1;
> > -
> >         intel_i9xx_setup_flush();
> >
> >         return 0;
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 201da6d..6c8b0b8 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -385,6 +385,7 @@ struct i915_gtt {
> >         /** "Graphics Stolen Memory" holds the global PTEs */
> >         void __iomem *gsm;
> >
> > +       bool do_idle_maps;
> >  };
> >  #define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 2acca75..afd5ec7 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -330,11 +330,30 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
> >         }
> >  }
> >
> > +extern int intel_iommu_gfx_mapped;
> > +/* Certain Gen5 chipsets require require idling the GPU before
> > + * unmapping anything from the GTT when VT-d is enabled.
> > + */
> > +static inline bool needs_idle_maps(struct drm_device *dev)
> > +{
> > +#ifdef CONFIG_INTEL_IOMMU
> > +       const u16 gpu_devid = dev->pdev->device;
> > +
> > +       /* Query intel_iommu to see if we need the workaround. Presumably that
> > +        * was loaded first.
> > +        */
> > +       if ((gpu_devid == 0x0044 || gpu_devid == 0x46) &&
> 
> I would prefer to stay with defied names instead of direct ids.
> 

There is one problem, apparently we don't support 0x44 in our kernel,
and I didn't want to have the workaround there for an undefined chipset.
I see no reason to add 0x44 if Intel never shipped one. So I'd be happy
to use an existing define for 0x46, and leave 0x44 hardcoded if that
pleases people.

> > +            intel_iommu_gfx_mapped)
> > +               return true;
> > +#endif
> > +       return false;
> > +}
> > +
> >  static bool do_idling(struct drm_i915_private *dev_priv)
> >  {
> >         bool ret = dev_priv->mm.interruptible;
> >
> > -       if (unlikely(dev_priv->mm.gtt->do_idle_maps)) {
> > +       if (unlikely(dev_priv->gtt.do_idle_maps)) {
> >                 dev_priv->mm.interruptible = false;
> >                 if (i915_gpu_idle(dev_priv->dev)) {
> >                         DRM_ERROR("Couldn't idle GPU\n");
> > @@ -348,11 +367,10 @@ static bool do_idling(struct drm_i915_private *dev_priv)
> >
> >  static void undo_idling(struct drm_i915_private *dev_priv, bool interruptible)
> >  {
> > -       if (unlikely(dev_priv->mm.gtt->do_idle_maps))
> > +       if (unlikely(dev_priv->gtt.do_idle_maps))
> >                 dev_priv->mm.interruptible = interruptible;
> >  }
> >
> > -
> >  static void i915_ggtt_clear_range(struct drm_device *dev,
> >                                  unsigned first_entry,
> >                                  unsigned num_entries)
> > @@ -701,6 +719,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
> >                         intel_gmch_remove();
> >                         return -ENODEV;
> >                 }
> > +
> > +               dev_priv->gtt.do_idle_maps = needs_idle_maps(dev);
> > +
> >                 return 0;
> >         }
> >
> > diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
> > index 63157c5..4982dca 100644
> > --- a/include/drm/intel-gtt.h
> > +++ b/include/drm/intel-gtt.h
> > @@ -5,8 +5,6 @@
> >
> >  struct intel_gtt {
> >         /* Whether we idle the gpu before mapping/unmapping */
> > -       unsigned int do_idle_maps : 1;
> > -       /* Share the scratch page dma with ppgtts. */
> >         dma_addr_t scratch_page_dma;
> >         struct page *scratch_page;
> >  } *intel_gtt_get(void);
> > --
> > 1.8.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> Other than that, feel free to use:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> 
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br



-- 
Ben Widawsky, Intel Open Source Technology Center

Re: [PATCH 13/13] drm/i915: Finally kill off struct intel-gtt

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> Nothing is shared anymore between AGP and drm/i915 driver. Pre-GEN6
> still uses AGP, but all necessary info is encapsulated per driver.
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/char/agp/intel-gtt.c        |  7 -------
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +--------------------
>  include/drm/intel-gtt.h             |  3 ---
>  3 files changed, 1 insertion(+), 30 deletions(-)
>
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index 773ce8b..53086a2 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -60,7 +60,6 @@ struct intel_gtt_driver {
>  };
>
>  static struct _intel_private {
> -       struct intel_gtt base;
>         const struct intel_gtt_driver *driver;
>         struct pci_dev *pcidev; /* device one */
>         struct pci_dev *bridge_dev;
> @@ -1372,12 +1371,6 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
>  }
>  EXPORT_SYMBOL(intel_gmch_probe);
>
> -struct intel_gtt *intel_gtt_get(void)
> -{
> -       return &intel_private.base;
> -}
> -EXPORT_SYMBOL(intel_gtt_get);
> -
>  void intel_gtt_chipset_flush(void)
>  {
>         if (intel_private.driver->chipset_flush)
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index b7641f7..e3782bb 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -707,28 +707,10 @@ int i915_gem_gtt_init(struct drm_device *dev)
>          * hostbridge query stuff. Skip it entirely
>          */
>         if (INTEL_INFO(dev)->gen < 6) {
> -               ret = intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
> -               if (!ret) {
> -                       DRM_ERROR("failed to set up gmch\n");
> -                       return -EIO;
> -               }
> -
> -               dev_priv->mm.gtt = intel_gtt_get();
> -               if (!dev_priv->mm.gtt) {
> -                       DRM_ERROR("Failed to initialize GTT\n");
> -                       intel_gmch_remove();
> -                       return -ENODEV;
> -               }
> -
>                 dev_priv->gtt.do_idle_maps = needs_idle_maps(dev);
> -
> -               return 0;
> +               return intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
>         }
>
> -       dev_priv->mm.gtt = kzalloc(sizeof(*dev_priv->mm.gtt), GFP_KERNEL);
> -       if (!dev_priv->mm.gtt)
> -               return -ENOMEM;
> -
>         if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
>                 pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
>
> @@ -794,5 +776,4 @@ void i915_gem_gtt_fini(struct drm_device *dev)
>         teardown_scratch_page(dev);
>         if (INTEL_INFO(dev)->gen < 6)
>                 intel_gmch_remove();
> -       kfree(dev_priv->mm.gtt);
>  }
> diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
> index ae55605..8b546ee 100644
> --- a/include/drm/intel-gtt.h
> +++ b/include/drm/intel-gtt.h
> @@ -3,9 +3,6 @@
>  #ifndef _DRM_INTEL_GTT_H
>  #define        _DRM_INTEL_GTT_H
>
> -struct intel_gtt {
> -} *intel_gtt_get(void);
> -
>  int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
>                      struct agp_bridge_data *bridge);
>  void intel_gmch_remove(void);
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 13/13 v2] drm/i915: Finally kill off struct intel_gtt

[Rodrigo Vivi]

ops, I just noticed this v2 here...
same for this one:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Wed, Jan 16, 2013 at 4:23 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> Nothing is shared anymore between AGP and drm/i915 driver. Pre-GEN6
> still uses AGP, but all necessary info is encapsulated per driver.
>
> v2: Conflict resolution from earlier rebase
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/char/agp/intel-gtt.c        |  7 -------
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +--------------------
>  include/drm/intel-gtt.h             |  3 ---
>  3 files changed, 1 insertion(+), 30 deletions(-)
>
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index 773ce8b..53086a2 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -60,7 +60,6 @@ struct intel_gtt_driver {
>  };
>
>  static struct _intel_private {
> -       struct intel_gtt base;
>         const struct intel_gtt_driver *driver;
>         struct pci_dev *pcidev; /* device one */
>         struct pci_dev *bridge_dev;
> @@ -1372,12 +1371,6 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
>  }
>  EXPORT_SYMBOL(intel_gmch_probe);
>
> -struct intel_gtt *intel_gtt_get(void)
> -{
> -       return &intel_private.base;
> -}
> -EXPORT_SYMBOL(intel_gtt_get);
> -
>  void intel_gtt_chipset_flush(void)
>  {
>         if (intel_private.driver->chipset_flush)
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index b4227a1..c849e99 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -716,28 +716,10 @@ int i915_gem_gtt_init(struct drm_device *dev)
>          * hostbridge query stuff. Skip it entirely
>          */
>         if (INTEL_INFO(dev)->gen < 6) {
> -               ret = intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
> -               if (!ret) {
> -                       DRM_ERROR("failed to set up gmch\n");
> -                       return -EIO;
> -               }
> -
> -               dev_priv->mm.gtt = intel_gtt_get();
> -               if (!dev_priv->mm.gtt) {
> -                       DRM_ERROR("Failed to initialize GTT\n");
> -                       intel_gmch_remove();
> -                       return -ENODEV;
> -               }
> -
>                 dev_priv->gtt.do_idle_maps = needs_idle_maps(dev);
> -
> -               return 0;
> +               return intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
>         }
>
> -       dev_priv->mm.gtt = kzalloc(sizeof(*dev_priv->mm.gtt), GFP_KERNEL);
> -       if (!dev_priv->mm.gtt)
> -               return -ENOMEM;
> -
>         /* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
>         gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
>
> @@ -794,5 +776,4 @@ void i915_gem_gtt_fini(struct drm_device *dev)
>         teardown_scratch_page(dev);
>         if (INTEL_INFO(dev)->gen < 6)
>                 intel_gmch_remove();
> -       kfree(dev_priv->mm.gtt);
>  }
> diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
> index ae55605..8b546ee 100644
> --- a/include/drm/intel-gtt.h
> +++ b/include/drm/intel-gtt.h
> @@ -3,9 +3,6 @@
>  #ifndef _DRM_INTEL_GTT_H
>  #define        _DRM_INTEL_GTT_H
>
> -struct intel_gtt {
> -} *intel_gtt_get(void);
> -
>  int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
>                      struct agp_bridge_data *bridge);
>  void intel_gmch_remove(void);
> --
> 1.8.1.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 05/13 v2] drm/i915: Remove use on gma_bus_addr on gen6+

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Wed, Jan 16, 2013 at 4:20 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> We have enough info to not use the intel_gtt bridge stuff.
>
> v2: Move setup of mappable_base above the legacy init stuff because we
> still need that on older platforms. (Daniel)
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_dma.c         | 3 +--
>  drivers/gpu/drm/i915/i915_gem_gtt.c     | 3 ++-
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
>  3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index bb4382f..b8f42e0 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1417,7 +1417,7 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
>         if (!ap)
>                 return;
>
> -       ap->ranges[0].base = dev_priv->mm.gtt->gma_bus_addr;
> +       ap->ranges[0].base = dev_priv->gtt.mappable_base;
>         ap->ranges[0].size =
>                 dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
>         primary =
> @@ -1534,7 +1534,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>         }
>
>         aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
> -       dev_priv->gtt.mappable_base = dev_priv->mm.gtt->gma_bus_addr;
>
>         dev_priv->gtt.mappable =
>                 io_mapping_create_wc(dev_priv->gtt.mappable_base,
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index e044f58..c5fd35b 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -691,6 +691,8 @@ int i915_gem_gtt_init(struct drm_device *dev)
>         u16 snb_gmch_ctl;
>         int ret;
>
> +       dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
> +
>         /* On modern platforms we need not worry ourself with the legacy
>          * hostbridge query stuff. Skip it entirely
>          */
> @@ -719,7 +721,6 @@ int i915_gem_gtt_init(struct drm_device *dev)
>
>         /* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
>         gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
> -       dev_priv->mm.gtt->gma_bus_addr = pci_resource_start(dev->pdev, 2);
>
>         /* i9xx_setup */
>         pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 2bd074a..9765055 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1164,7 +1164,7 @@ static int intel_init_ring_buffer(struct drm_device *dev,
>                 goto err_unpin;
>
>         ring->virtual_start =
> -               ioremap_wc(dev_priv->mm.gtt->gma_bus_addr + obj->gtt_offset,
> +               ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
>                            ring->size);
>         if (ring->virtual_start == NULL) {
>                 DRM_ERROR("Failed to map ringbuffer.\n");
> --
> 1.8.1.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 06/13 v2] drm/i915: Remove use of gtt_mappable_entries

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Wed, Jan 16, 2013 at 4:22 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> Mappable_end, ie. size is almost always what you want as opposed to the
> number of entries. Since we already have that information, we can scrap
> the number of entries and only calculate it when needed.
>
> If gtt_start is !0, this will have slightly different behavior. This
> difference can only occur in DRI1, and exists when we try to kick out
> the firmware fb. The new code seems like a bugfix to me.
>
> The other case where we've changed the behavior is during init we check
> the mappable region against our current known upper and lower limits
> (64MB, and 512MB). This now matches the comment, and makes things more
> convenient after removing gtt_mappable_entries.
>
> Also worth noting is the setting of mappable_end is taken out of setup
> because we do it earlier now in the DRI2 case and therefore need to add
> that tiny hunk to support the DRI1 IOCTL.
>
> v2: Move up mappable end to before legacy AGP init
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_dma.c     |  8 ++++----
>  drivers/gpu/drm/i915/i915_gem.c     |  1 +
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 15 +++++++--------
>  drivers/gpu/drm/i915/intel_fb.c     |  3 +--
>  4 files changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index b8f42e0..03a97d1 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1418,8 +1418,8 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
>                 return;
>
>         ap->ranges[0].base = dev_priv->gtt.mappable_base;
> -       ap->ranges[0].size =
> -               dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
> +       ap->ranges[0].size = dev_priv->gtt.mappable_end - dev_priv->gtt.start;
> +
>         primary =
>                 pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
>
> @@ -1533,7 +1533,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>                 goto put_gmch;
>         }
>
> -       aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
> +       aperture_size = dev_priv->gtt.mappable_end;
>
>         dev_priv->gtt.mappable =
>                 io_mapping_create_wc(dev_priv->gtt.mappable_base,
> @@ -1690,7 +1690,7 @@ int i915_driver_unload(struct drm_device *dev)
>         if (dev_priv->mm.gtt_mtrr >= 0) {
>                 mtrr_del(dev_priv->mm.gtt_mtrr,
>                          dev_priv->gtt.mappable_base,
> -                        dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE);
> +                        dev_priv->gtt.mappable_end);
>                 dev_priv->mm.gtt_mtrr = -1;
>         }
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4ec66a9..e84c9f9 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -166,6 +166,7 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data,
>         mutex_lock(&dev->struct_mutex);
>         i915_gem_setup_global_gtt(dev, args->gtt_start, args->gtt_end,
>                                   args->gtt_end);
> +       dev_priv->gtt.mappable_end = args->gtt_end;
>         mutex_unlock(&dev->struct_mutex);
>
>         return 0;
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index c5fd35b..f10aa87 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -557,7 +557,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
>         }
>
>         dev_priv->gtt.start = start;
> -       dev_priv->gtt.mappable_end = mappable_end;
>         dev_priv->gtt.total = end - start;
>
>         /* Clear any non-preallocated blocks */
> @@ -596,7 +595,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
>         int ret;
>
>         gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
> -       mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
> +       mappable_size = dev_priv->gtt.mappable_end;
>
>         if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
>                 /* PPGTT pdes are stolen from global gtt ptes, so shrink the
> @@ -692,6 +691,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
>         int ret;
>
>         dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
> +       dev_priv->gtt.mappable_end = pci_resource_len(dev->pdev, 2);
>
>         /* On modern platforms we need not worry ourself with the legacy
>          * hostbridge query stuff. Skip it entirely
> @@ -731,14 +731,13 @@ int i915_gem_gtt_init(struct drm_device *dev)
>         else
>                 dev_priv->mm.gtt->stolen_size = gen7_get_stolen_size(snb_gmch_ctl);
>
> -       dev_priv->mm.gtt->gtt_mappable_entries = pci_resource_len(dev->pdev, 2) >> PAGE_SHIFT;
>         /* 64/512MB is the current min/max we actually know of, but this is just a
>          * coarse sanity check.
>          */
> -       if ((dev_priv->mm.gtt->gtt_mappable_entries >> 8) < 64 ||
> -           dev_priv->mm.gtt->gtt_mappable_entries > dev_priv->mm.gtt->gtt_total_entries) {
> -               DRM_ERROR("Unknown GMADR entries (%d)\n",
> -                         dev_priv->mm.gtt->gtt_mappable_entries);
> +       if ((dev_priv->gtt.mappable_end < (64<<20) ||
> +           (dev_priv->gtt.mappable_end > (512<<20)))) {
> +               DRM_ERROR("Unknown GMADR size (%lx)\n",
> +                         dev_priv->gtt.mappable_end);
>                 ret = -ENXIO;
>                 goto err_out;
>         }
> @@ -760,7 +759,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
>
>         /* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
>         DRM_INFO("Memory usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
> -       DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8);
> +       DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20);
>         DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
>
>         return 0;
> diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
> index ce02af8..ce5f544 100644
> --- a/drivers/gpu/drm/i915/intel_fb.c
> +++ b/drivers/gpu/drm/i915/intel_fb.c
> @@ -135,8 +135,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
>                 goto out_unpin;
>         }
>         info->apertures->ranges[0].base = dev->mode_config.fb_base;
> -       info->apertures->ranges[0].size =
> -               dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
> +       info->apertures->ranges[0].size = dev_priv->gtt.mappable_end;
>
>         info->fix.smem_start = dev->mode_config.fb_base + obj->gtt_offset;
>         info->fix.smem_len = size;
> --
> 1.8.1.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 07/13 v2] drm/i915: Stop using gtt_total_entries

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Wed, Jan 16, 2013 at 4:22 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> Similar to gtt_mappable_entries we don't usually want the entries,
> it's easy enough to calculate it when you need.
>
> v2: Move relevant fields above pre-gen6 init
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_drv.h     |  3 +++
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 33 ++++++++++++++++++---------------
>  2 files changed, 21 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 51766d2..9d8f196 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -374,6 +374,7 @@ struct intel_device_info {
>  struct i915_gtt {
>         unsigned long start;            /* Start offset of used GTT */
>         size_t total;                   /* Total size GTT can map */
> +       size_t used;                    /* Amount used <= total */
>
>         unsigned long mappable_end;     /* End offset that we can CPU map */
>         struct io_mapping *mappable;    /* Mapping to our CPU mappable region */
> @@ -381,7 +382,9 @@ struct i915_gtt {
>
>         /** "Graphics Stolen Memory" holds the global PTEs */
>         void __iomem *gsm;
> +
>  };
> +#define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
>
>  #define I915_PPGTT_PD_ENTRIES 512
>  #define I915_PPGTT_PT_ENTRIES 1024
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index f10aa87..ca8abe1 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -119,7 +119,8 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
>         /* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024
>          * entries. For aliasing ppgtt support we just steal them at the end for
>          * now. */
> -       first_pd_entry_in_global_pt = dev_priv->mm.gtt->gtt_total_entries - I915_PPGTT_PD_ENTRIES;
> +       first_pd_entry_in_global_pt =
> +               gtt_total_entries(dev_priv->gtt) - I915_PPGTT_PD_ENTRIES;
>
>         ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
>         if (!ppgtt)
> @@ -368,7 +369,7 @@ static void i915_ggtt_clear_range(struct drm_device *dev,
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         gtt_pte_t scratch_pte;
>         gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->gtt.gsm + first_entry;
> -       const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
> +       const int max_entries = gtt_total_entries(dev_priv->gtt) - first_entry;
>         int i;
>
>         if (INTEL_INFO(dev)->gen < 6) {
> @@ -431,7 +432,7 @@ static void gen6_ggtt_bind_object(struct drm_i915_gem_object *obj,
>         struct sg_table *st = obj->pages;
>         struct scatterlist *sg = st->sgl;
>         const int first_entry = obj->gtt_space->start >> PAGE_SHIFT;
> -       const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
> +       const int max_entries = gtt_total_entries(dev_priv->gtt) - first_entry;
>         gtt_pte_t __iomem *gtt_entries =
>                 (gtt_pte_t __iomem *)dev_priv->gtt.gsm + first_entry;
>         int unused, i = 0;
> @@ -557,7 +558,9 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
>         }
>
>         dev_priv->gtt.start = start;
> -       dev_priv->gtt.total = end - start;
> +       dev_priv->gtt.used = end - start;
> +       if (dev_priv->gtt.used < dev_priv->gtt.total)
> +               DRM_DEBUG_DRIVER("Warning: using less than total memory\n");
>
>         /* Clear any non-preallocated blocks */
>         drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
> @@ -594,7 +597,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
>         unsigned long gtt_size, mappable_size;
>         int ret;
>
> -       gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
> +       gtt_size = dev_priv->gtt.total;
>         mappable_size = dev_priv->gtt.mappable_end;
>
>         if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
> @@ -687,11 +690,18 @@ int i915_gem_gtt_init(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         phys_addr_t gtt_bus_addr;
> +       u32 gtt_size;
>         u16 snb_gmch_ctl;
>         int ret;
>
> +       if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
> +               pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
> +
> +       pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
>         dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
>         dev_priv->gtt.mappable_end = pci_resource_len(dev->pdev, 2);
> +       gtt_size = gen6_get_total_gtt_size(snb_gmch_ctl);
> +       dev_priv->gtt.total = (gtt_size / sizeof(gtt_pte_t)) << PAGE_SHIFT;
>
>         /* On modern platforms we need not worry ourself with the legacy
>          * hostbridge query stuff. Skip it entirely
> @@ -716,16 +726,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
>         if (!dev_priv->mm.gtt)
>                 return -ENOMEM;
>
> -       if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
> -               pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
> -
>         /* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
>         gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
>
> -       /* i9xx_setup */
> -       pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
> -       dev_priv->mm.gtt->gtt_total_entries =
> -               gen6_get_total_gtt_size(snb_gmch_ctl) / sizeof(gtt_pte_t);
>         if (INTEL_INFO(dev)->gen < 7)
>                 dev_priv->mm.gtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
>         else
> @@ -748,8 +751,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
>                 goto err_out;
>         }
>
> -       dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr,
> -                                      dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
> +       dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr, gtt_size);
>         if (!dev_priv->gtt.gsm) {
>                 DRM_ERROR("Failed to map the gtt page table\n");
>                 teardown_scratch_page(dev);
> @@ -758,7 +760,8 @@ int i915_gem_gtt_init(struct drm_device *dev)
>         }
>
>         /* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
> -       DRM_INFO("Memory usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
> +       DRM_INFO("Memory usable by graphics device = %zdM\n",
> +                dev_priv->gtt.total >> 20);
>         DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20);
>         DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
>
> --
> 1.8.1.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

Re: [PATCH 10/13 v2] drm/i915: Needs_dmar, not

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Wed, Jan 16, 2013 at 4:22 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> The reasoning behind our code taking two paths depending upon whether or
> not we may have been configured for IOMMU isn't clear to me. It should
> always be safe to use the pci mapping functions as they are designed to
> abstract the decision we were handling in i915.
>
> Aside from simpler code, removing another member for the intel_gtt
> struct is a nice motivation.
>
> I ran this by Chris, and he wasn't concerned about the extra kzalloc,
> and memory references vs. page_to_phys calculation in the case without
> IOMMU.
>
> v2: Update commit message
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/char/agp/intel-gtt.c        | 10 ++++++----
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 35 +++++++++++++----------------------
>  include/drm/intel-gtt.h             |  2 --
>  3 files changed, 19 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index eb05eb5..a531377 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -84,6 +84,8 @@ static struct _intel_private {
>          * this is not the full gtt. */
>         unsigned int gtt_mappable_entries;
>         phys_addr_t gma_bus_addr;
> +       /* Whether i915 needs to use the dmar apis or not. */
> +       unsigned int needs_dmar : 1;
>  } intel_private;
>
>  #define INTEL_GTT_GEN  intel_private.driver->gen
> @@ -299,7 +301,7 @@ static int intel_gtt_setup_scratch_page(void)
>         get_page(page);
>         set_pages_uc(page, 1);
>
> -       if (intel_private.base.needs_dmar) {
> +       if (intel_private.needs_dmar) {
>                 dma_addr = pci_map_page(intel_private.pcidev, page, 0,
>                                     PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
>                 if (pci_dma_mapping_error(intel_private.pcidev, dma_addr))
> @@ -615,7 +617,7 @@ static int intel_gtt_init(void)
>
>         intel_private.stolen_size = intel_gtt_stolen_size();
>
> -       intel_private.base.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
> +       intel_private.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
>
>         ret = intel_gtt_setup_scratch_page();
>         if (ret != 0) {
> @@ -875,7 +877,7 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
>         if (!mem->is_flushed)
>                 global_cache_flush();
>
> -       if (intel_private.base.needs_dmar) {
> +       if (intel_private.needs_dmar) {
>                 struct sg_table st;
>
>                 ret = intel_gtt_map_memory(mem->pages, mem->page_count, &st);
> @@ -919,7 +921,7 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
>
>         intel_gtt_clear_range(pg_start, mem->page_count);
>
> -       if (intel_private.base.needs_dmar) {
> +       if (intel_private.needs_dmar) {
>                 intel_gtt_unmap_memory(mem->sg_list, mem->num_sg);
>                 mem->sg_list = NULL;
>                 mem->num_sg = 0;
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index a92d8cd..ae96835 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -139,28 +139,23 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
>                         goto err_pt_alloc;
>         }
>
> -       if (dev_priv->mm.gtt->needs_dmar) {
> -               ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t)
> -                                               *ppgtt->num_pd_entries,
> -                                            GFP_KERNEL);
> -               if (!ppgtt->pt_dma_addr)
> -                       goto err_pt_alloc;
> +       ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t) *ppgtt->num_pd_entries,
> +                                    GFP_KERNEL);
> +       if (!ppgtt->pt_dma_addr)
> +               goto err_pt_alloc;
>
> -               for (i = 0; i < ppgtt->num_pd_entries; i++) {
> -                       dma_addr_t pt_addr;
> +       for (i = 0; i < ppgtt->num_pd_entries; i++) {
> +               dma_addr_t pt_addr;
>
> -                       pt_addr = pci_map_page(dev->pdev, ppgtt->pt_pages[i],
> -                                              0, 4096,
> -                                              PCI_DMA_BIDIRECTIONAL);
> +               pt_addr = pci_map_page(dev->pdev, ppgtt->pt_pages[i], 0, 4096,
> +                                      PCI_DMA_BIDIRECTIONAL);
>
> -                       if (pci_dma_mapping_error(dev->pdev,
> -                                                 pt_addr)) {
> -                               ret = -EIO;
> -                               goto err_pd_pin;
> +               if (pci_dma_mapping_error(dev->pdev, pt_addr)) {
> +                       ret = -EIO;
> +                       goto err_pd_pin;
>
> -                       }
> -                       ppgtt->pt_dma_addr[i] = pt_addr;
>                 }
> +               ppgtt->pt_dma_addr[i] = pt_addr;
>         }
>
>         ppgtt->scratch_page_dma_addr = dev_priv->mm.gtt->scratch_page_dma;
> @@ -295,11 +290,7 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
>         for (i = 0; i < ppgtt->num_pd_entries; i++) {
>                 dma_addr_t pt_addr;
>
> -               if (dev_priv->mm.gtt->needs_dmar)
> -                       pt_addr = ppgtt->pt_dma_addr[i];
> -               else
> -                       pt_addr = page_to_phys(ppgtt->pt_pages[i]);
> -
> +               pt_addr = ppgtt->pt_dma_addr[i];
>                 pd_entry = GEN6_PDE_ADDR_ENCODE(pt_addr);
>                 pd_entry |= GEN6_PDE_VALID;
>
> diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
> index 6f53ecd..63157c5 100644
> --- a/include/drm/intel-gtt.h
> +++ b/include/drm/intel-gtt.h
> @@ -4,8 +4,6 @@
>  #define        _DRM_INTEL_GTT_H
>
>  struct intel_gtt {
> -       /*  Whether i915 needs to use the dmar apis or not. */
> -       unsigned int needs_dmar : 1;
>         /* Whether we idle the gpu before mapping/unmapping */
>         unsigned int do_idle_maps : 1;
>         /* Share the scratch page dma with ppgtts. */
> --
> 1.8.1.1
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br