From: "Benoît Canet" <benoit.canet-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
To: Don Dutile <ddutile-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Cc: "Benoît Canet"
<benoit.canet-J9ArbTHlV+bR7s880joybQ@public.gmane.org>,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
qemu-devel-qX2TKyscuCcdnm+yROfE0A@public.gmane.org
Subject: Re: [Qemu-devel] SR-IOV PF reset and QEMU VFs VFIO passthrough
Date: Mon, 3 Jun 2013 23:27:23 +0200 [thread overview]
Message-ID: <20130603212723.GG4094@irqsave.net> (raw)
In-Reply-To: <51AD02B1.8070503-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> >I was asking this because the PF driver should reset the PF while the VF are
> >used by VFIO/QEMU when the PF doesn't respond anymore.
> >
> What your VF does while your PF is being reset is PF (& VF) dependent.
> A 'good design' would not impact the VF operation, other than to stall it until
> the PF completed reset. My experience, though, is that the PF has to be brought
> up to some level of functionality to share the physical resources with the VFs.
When the PF does an FLR the hardware go back to its default state, the SR-IOV
configuration is gone and the VFs disappears from the bus.
Then the restore state function of the kernel reset code would bring the SR-IOV
PF configuration back.
The hardware also have a privately owned SR-IOV related configuration in the PF
configuration space. This configuration is used to configure the VFs resources.
(memory)
Best regards
Benoît Canet
WARNING: multiple messages have this Message-ID (diff)
From: "Benoît Canet" <benoit.canet@irqsave.net>
To: Don Dutile <ddutile@redhat.com>
Cc: "Benoît Canet" <benoit.canet@irqsave.net>,
linux-pci@vger.kernel.org, qemu-devel@nongnu.org,
iommu@lists.linux-foundation.org, alex.williamson@redhat.com
Subject: Re: [Qemu-devel] SR-IOV PF reset and QEMU VFs VFIO passthrough
Date: Mon, 3 Jun 2013 23:27:23 +0200 [thread overview]
Message-ID: <20130603212723.GG4094@irqsave.net> (raw)
In-Reply-To: <51AD02B1.8070503@redhat.com>
> >I was asking this because the PF driver should reset the PF while the VF are
> >used by VFIO/QEMU when the PF doesn't respond anymore.
> >
> What your VF does while your PF is being reset is PF (& VF) dependent.
> A 'good design' would not impact the VF operation, other than to stall it until
> the PF completed reset. My experience, though, is that the PF has to be brought
> up to some level of functionality to share the physical resources with the VFs.
When the PF does an FLR the hardware go back to its default state, the SR-IOV
configuration is gone and the VFs disappears from the bus.
Then the restore state function of the kernel reset code would bring the SR-IOV
PF configuration back.
The hardware also have a privately owned SR-IOV related configuration in the PF
configuration space. This configuration is used to configure the VFs resources.
(memory)
Best regards
Benoît Canet
WARNING: multiple messages have this Message-ID (diff)
From: "Benoît Canet" <benoit.canet@irqsave.net>
To: Don Dutile <ddutile@redhat.com>
Cc: "Benoît Canet" <benoit.canet@irqsave.net>,
linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org,
alex.williamson@redhat.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] SR-IOV PF reset and QEMU VFs VFIO passthrough
Date: Mon, 3 Jun 2013 23:27:23 +0200 [thread overview]
Message-ID: <20130603212723.GG4094@irqsave.net> (raw)
In-Reply-To: <51AD02B1.8070503@redhat.com>
> >I was asking this because the PF driver should reset the PF while the VF are
> >used by VFIO/QEMU when the PF doesn't respond anymore.
> >
> What your VF does while your PF is being reset is PF (& VF) dependent.
> A 'good design' would not impact the VF operation, other than to stall it until
> the PF completed reset. My experience, though, is that the PF has to be brought
> up to some level of functionality to share the physical resources with the VFs.
When the PF does an FLR the hardware go back to its default state, the SR-IOV
configuration is gone and the VFs disappears from the bus.
Then the restore state function of the kernel reset code would bring the SR-IOV
PF configuration back.
The hardware also have a privately owned SR-IOV related configuration in the PF
configuration space. This configuration is used to configure the VFs resources.
(memory)
Best regards
Benoît Canet
next prev parent reply other threads:[~2013-06-03 21:27 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-01 12:13 SR-IOV PF reset and QEMU VFs VFIO passthrough Benoît Canet
2013-06-01 12:13 ` [Qemu-devel] " Benoît Canet
[not found] ` <20130601121320.GC5157-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
2013-06-02 14:11 ` Alex Williamson
2013-06-02 14:11 ` [Qemu-devel] " Alex Williamson
2013-06-02 14:11 ` Alex Williamson
2013-06-02 15:13 ` [Qemu-devel] " Benoît Canet
2013-06-03 18:41 ` Don Dutile
2013-06-03 18:41 ` Don Dutile
2013-06-03 19:29 ` Benoît Canet
2013-06-03 19:29 ` Benoît Canet
[not found] ` <20130603192958.GB31044-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
2013-06-03 20:55 ` Don Dutile
2013-06-03 20:55 ` Don Dutile
2013-06-03 20:55 ` Don Dutile
[not found] ` <51AD02B1.8070503-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2013-06-03 21:27 ` Benoît Canet [this message]
2013-06-03 21:27 ` Benoît Canet
2013-06-03 21:27 ` Benoît Canet
[not found] ` <20130603212723.GG4094-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
2013-06-03 21:42 ` Don Dutile
2013-06-03 21:42 ` Don Dutile
2013-06-03 21:42 ` Don Dutile
[not found] ` <51AD0DB8.8090109-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2013-06-03 21:58 ` Benoît Canet
2013-06-03 21:58 ` Benoît Canet
2013-06-03 21:58 ` Benoît Canet
[not found] ` <20130603215855.GC31044-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
2013-06-03 22:03 ` Don Dutile
2013-06-03 22:03 ` Don Dutile
2013-06-03 22:03 ` Don Dutile
[not found] ` <51AD12AB.1000903-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2013-06-04 15:54 ` Benoît Canet
2013-06-04 15:54 ` Benoît Canet
2013-06-04 15:54 ` Benoît Canet
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