From: Don Dutile <ddutile-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
To: "Benoît Canet" <benoit.canet-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
Cc: linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
qemu-devel-qX2TKyscuCcdnm+yROfE0A@public.gmane.org
Subject: Re: [Qemu-devel] SR-IOV PF reset and QEMU VFs VFIO passthrough
Date: Mon, 03 Jun 2013 18:03:23 -0400 [thread overview]
Message-ID: <51AD12AB.1000903@redhat.com> (raw)
In-Reply-To: <20130603215855.GC31044-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
On 06/03/2013 05:58 PM, Benoît Canet wrote:
>>> When the PF does an FLR the hardware go back to its default state, the SR-IOV
>>> configuration is gone and the VFs disappears from the bus.
>>> Then the restore state function of the kernel reset code would bring the SR-IOV
>>> PF configuration back.
>>>
>> Ok, now you're a bit mis-led here.
>> The configuration header for SRIOV is _not_ put back.
>> Only the std, PCI config header section is put back in place, along with
>> msi(x), pm-caps.
>> If the hw wipes out all VF state setup (which it should, IMO), all VF configuration
>> will be lost in the hw...
>> *but*, the PCI core will still think the VFs exist (not hot-unplugged, no more than PF was);
>> trying to setup the VFs again, will fail (or worse).
>
> I read the following code on a not so hold kernel.
>
> -----------
> int pci_reset_function(struct pci_dev *dev)
> {
>> .......int rc;
>
>> .......rc = pci_dev_reset(dev, 1);
>> .......if (rc)
>> .......>.......return rc;
>
>> .......pci_save_state(dev);
>
>> ......./*
>> ....... * both INTx and MSI are disabled after the Interrupt Disable bit
>> ....... * is set and the Bus Master bit is cleared.
>> ....... */
>> .......pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
>
>> .......rc = pci_dev_reset(dev, 0);
>
>> .......pci_restore_state(dev);
>
>> .......return rc;
> }
> EXPORT_SYMBOL_GPL(pci_reset_function);
> -----------
>
> and
>
> -----------
> /**
> * pci_restore_state - Restore the saved state of a PCI device
> * @dev: - PCI device that we're dealing with
> */
> void pci_restore_state(struct pci_dev *dev)
> {
>> .......if (!dev->state_saved)
>> .......>.......return;
>
>> ......./* PCI Express register must be restored first */
>> .......pci_restore_pcie_state(dev);
>> .......pci_restore_ats_state(dev);
>
>> .......pci_restore_config_space(dev);
>
>> .......pci_restore_pcix_state(dev);
>> .......pci_restore_msi_state(dev);
>> .......pci_restore_iov_state(dev);
>
>> .......dev->state_saved = false;
> }
> -----------
>
> with pci_restore_iov_state calling sriov_restore_state:
>
> -----------
> static void sriov_restore_state(struct pci_dev *dev)
> {
>> .......int i;
>> .......u16 ctrl;
>> .......struct pci_sriov *iov = dev->sriov;
>
>> .......pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL,&ctrl);
>> .......if (ctrl& PCI_SRIOV_CTRL_VFE)
>> .......>.......return;
>
>> .......for (i = PCI_IOV_RESOURCES; i<= PCI_IOV_RESOURCE_END; i++)
>> .......>.......pci_update_resource(dev, i);
>
>> .......pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
>> .......pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
>> .......pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
>> .......if (iov->ctrl& PCI_SRIOV_CTRL_VFE)
>> .......>.......msleep(100);
> }
> --------
>
> The sriov_restore_state looked like if it does the right thing but maybe I missread
> the code.
>
/my bad; I forgot about the save|restore_iov_state calls.... doh!
Now it gets down to how well your hw (& driver) works after the reset is done...
>>
>>> The hardware also have a privately owned SR-IOV related configuration in the PF
>>> configuration space. This configuration is used to configure the VFs resources.
>>> (memory)
>>>
>> Per the SRIOV spec, yes, but that's in PCIe ext cfg space.
>> That area of the PCI configuration is not saved or restored by dev-reset.
>
> Can a callback be added so PF driver can restore this state ?
>
As you pointed out, no need to, unless it's a device-specific,
PCIe cap structure. the SRIOV caps are re-instated, as you showed above...
> Best regards
>
> Benoît Canet
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Don Dutile <ddutile@redhat.com>
To: "Benoît Canet" <benoit.canet@irqsave.net>
Cc: linux-pci@vger.kernel.org, qemu-devel@nongnu.org,
iommu@lists.linux-foundation.org, alex.williamson@redhat.com
Subject: Re: [Qemu-devel] SR-IOV PF reset and QEMU VFs VFIO passthrough
Date: Mon, 03 Jun 2013 18:03:23 -0400 [thread overview]
Message-ID: <51AD12AB.1000903@redhat.com> (raw)
In-Reply-To: <20130603215855.GC31044@irqsave.net>
On 06/03/2013 05:58 PM, Benoît Canet wrote:
>>> When the PF does an FLR the hardware go back to its default state, the SR-IOV
>>> configuration is gone and the VFs disappears from the bus.
>>> Then the restore state function of the kernel reset code would bring the SR-IOV
>>> PF configuration back.
>>>
>> Ok, now you're a bit mis-led here.
>> The configuration header for SRIOV is _not_ put back.
>> Only the std, PCI config header section is put back in place, along with
>> msi(x), pm-caps.
>> If the hw wipes out all VF state setup (which it should, IMO), all VF configuration
>> will be lost in the hw...
>> *but*, the PCI core will still think the VFs exist (not hot-unplugged, no more than PF was);
>> trying to setup the VFs again, will fail (or worse).
>
> I read the following code on a not so hold kernel.
>
> -----------
> int pci_reset_function(struct pci_dev *dev)
> {
>> .......int rc;
>
>> .......rc = pci_dev_reset(dev, 1);
>> .......if (rc)
>> .......>.......return rc;
>
>> .......pci_save_state(dev);
>
>> ......./*
>> ....... * both INTx and MSI are disabled after the Interrupt Disable bit
>> ....... * is set and the Bus Master bit is cleared.
>> ....... */
>> .......pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
>
>> .......rc = pci_dev_reset(dev, 0);
>
>> .......pci_restore_state(dev);
>
>> .......return rc;
> }
> EXPORT_SYMBOL_GPL(pci_reset_function);
> -----------
>
> and
>
> -----------
> /**
> * pci_restore_state - Restore the saved state of a PCI device
> * @dev: - PCI device that we're dealing with
> */
> void pci_restore_state(struct pci_dev *dev)
> {
>> .......if (!dev->state_saved)
>> .......>.......return;
>
>> ......./* PCI Express register must be restored first */
>> .......pci_restore_pcie_state(dev);
>> .......pci_restore_ats_state(dev);
>
>> .......pci_restore_config_space(dev);
>
>> .......pci_restore_pcix_state(dev);
>> .......pci_restore_msi_state(dev);
>> .......pci_restore_iov_state(dev);
>
>> .......dev->state_saved = false;
> }
> -----------
>
> with pci_restore_iov_state calling sriov_restore_state:
>
> -----------
> static void sriov_restore_state(struct pci_dev *dev)
> {
>> .......int i;
>> .......u16 ctrl;
>> .......struct pci_sriov *iov = dev->sriov;
>
>> .......pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL,&ctrl);
>> .......if (ctrl& PCI_SRIOV_CTRL_VFE)
>> .......>.......return;
>
>> .......for (i = PCI_IOV_RESOURCES; i<= PCI_IOV_RESOURCE_END; i++)
>> .......>.......pci_update_resource(dev, i);
>
>> .......pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
>> .......pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
>> .......pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
>> .......if (iov->ctrl& PCI_SRIOV_CTRL_VFE)
>> .......>.......msleep(100);
> }
> --------
>
> The sriov_restore_state looked like if it does the right thing but maybe I missread
> the code.
>
/my bad; I forgot about the save|restore_iov_state calls.... doh!
Now it gets down to how well your hw (& driver) works after the reset is done...
>>
>>> The hardware also have a privately owned SR-IOV related configuration in the PF
>>> configuration space. This configuration is used to configure the VFs resources.
>>> (memory)
>>>
>> Per the SRIOV spec, yes, but that's in PCIe ext cfg space.
>> That area of the PCI configuration is not saved or restored by dev-reset.
>
> Can a callback be added so PF driver can restore this state ?
>
As you pointed out, no need to, unless it's a device-specific,
PCIe cap structure. the SRIOV caps are re-instated, as you showed above...
> Best regards
>
> Benoît Canet
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Don Dutile <ddutile@redhat.com>
To: "Benoît Canet" <benoit.canet@irqsave.net>
Cc: linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org,
alex.williamson@redhat.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] SR-IOV PF reset and QEMU VFs VFIO passthrough
Date: Mon, 03 Jun 2013 18:03:23 -0400 [thread overview]
Message-ID: <51AD12AB.1000903@redhat.com> (raw)
In-Reply-To: <20130603215855.GC31044@irqsave.net>
On 06/03/2013 05:58 PM, Benoît Canet wrote:
>>> When the PF does an FLR the hardware go back to its default state, the SR-IOV
>>> configuration is gone and the VFs disappears from the bus.
>>> Then the restore state function of the kernel reset code would bring the SR-IOV
>>> PF configuration back.
>>>
>> Ok, now you're a bit mis-led here.
>> The configuration header for SRIOV is _not_ put back.
>> Only the std, PCI config header section is put back in place, along with
>> msi(x), pm-caps.
>> If the hw wipes out all VF state setup (which it should, IMO), all VF configuration
>> will be lost in the hw...
>> *but*, the PCI core will still think the VFs exist (not hot-unplugged, no more than PF was);
>> trying to setup the VFs again, will fail (or worse).
>
> I read the following code on a not so hold kernel.
>
> -----------
> int pci_reset_function(struct pci_dev *dev)
> {
>> .......int rc;
>
>> .......rc = pci_dev_reset(dev, 1);
>> .......if (rc)
>> .......>.......return rc;
>
>> .......pci_save_state(dev);
>
>> ......./*
>> ....... * both INTx and MSI are disabled after the Interrupt Disable bit
>> ....... * is set and the Bus Master bit is cleared.
>> ....... */
>> .......pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
>
>> .......rc = pci_dev_reset(dev, 0);
>
>> .......pci_restore_state(dev);
>
>> .......return rc;
> }
> EXPORT_SYMBOL_GPL(pci_reset_function);
> -----------
>
> and
>
> -----------
> /**
> * pci_restore_state - Restore the saved state of a PCI device
> * @dev: - PCI device that we're dealing with
> */
> void pci_restore_state(struct pci_dev *dev)
> {
>> .......if (!dev->state_saved)
>> .......>.......return;
>
>> ......./* PCI Express register must be restored first */
>> .......pci_restore_pcie_state(dev);
>> .......pci_restore_ats_state(dev);
>
>> .......pci_restore_config_space(dev);
>
>> .......pci_restore_pcix_state(dev);
>> .......pci_restore_msi_state(dev);
>> .......pci_restore_iov_state(dev);
>
>> .......dev->state_saved = false;
> }
> -----------
>
> with pci_restore_iov_state calling sriov_restore_state:
>
> -----------
> static void sriov_restore_state(struct pci_dev *dev)
> {
>> .......int i;
>> .......u16 ctrl;
>> .......struct pci_sriov *iov = dev->sriov;
>
>> .......pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL,&ctrl);
>> .......if (ctrl& PCI_SRIOV_CTRL_VFE)
>> .......>.......return;
>
>> .......for (i = PCI_IOV_RESOURCES; i<= PCI_IOV_RESOURCE_END; i++)
>> .......>.......pci_update_resource(dev, i);
>
>> .......pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
>> .......pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
>> .......pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
>> .......if (iov->ctrl& PCI_SRIOV_CTRL_VFE)
>> .......>.......msleep(100);
> }
> --------
>
> The sriov_restore_state looked like if it does the right thing but maybe I missread
> the code.
>
/my bad; I forgot about the save|restore_iov_state calls.... doh!
Now it gets down to how well your hw (& driver) works after the reset is done...
>>
>>> The hardware also have a privately owned SR-IOV related configuration in the PF
>>> configuration space. This configuration is used to configure the VFs resources.
>>> (memory)
>>>
>> Per the SRIOV spec, yes, but that's in PCIe ext cfg space.
>> That area of the PCI configuration is not saved or restored by dev-reset.
>
> Can a callback be added so PF driver can restore this state ?
>
As you pointed out, no need to, unless it's a device-specific,
PCIe cap structure. the SRIOV caps are re-instated, as you showed above...
> Best regards
>
> Benoît Canet
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2013-06-03 22:03 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-01 12:13 SR-IOV PF reset and QEMU VFs VFIO passthrough Benoît Canet
2013-06-01 12:13 ` [Qemu-devel] " Benoît Canet
[not found] ` <20130601121320.GC5157-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
2013-06-02 14:11 ` Alex Williamson
2013-06-02 14:11 ` [Qemu-devel] " Alex Williamson
2013-06-02 14:11 ` Alex Williamson
2013-06-02 15:13 ` [Qemu-devel] " Benoît Canet
2013-06-03 18:41 ` Don Dutile
2013-06-03 18:41 ` Don Dutile
2013-06-03 19:29 ` Benoît Canet
2013-06-03 19:29 ` Benoît Canet
[not found] ` <20130603192958.GB31044-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
2013-06-03 20:55 ` Don Dutile
2013-06-03 20:55 ` Don Dutile
2013-06-03 20:55 ` Don Dutile
[not found] ` <51AD02B1.8070503-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2013-06-03 21:27 ` Benoît Canet
2013-06-03 21:27 ` Benoît Canet
2013-06-03 21:27 ` Benoît Canet
[not found] ` <20130603212723.GG4094-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
2013-06-03 21:42 ` Don Dutile
2013-06-03 21:42 ` Don Dutile
2013-06-03 21:42 ` Don Dutile
[not found] ` <51AD0DB8.8090109-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2013-06-03 21:58 ` Benoît Canet
2013-06-03 21:58 ` Benoît Canet
2013-06-03 21:58 ` Benoît Canet
[not found] ` <20130603215855.GC31044-J9ArbTHlV+bR7s880joybQ@public.gmane.org>
2013-06-03 22:03 ` Don Dutile [this message]
2013-06-03 22:03 ` Don Dutile
2013-06-03 22:03 ` Don Dutile
[not found] ` <51AD12AB.1000903-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2013-06-04 15:54 ` Benoît Canet
2013-06-04 15:54 ` Benoît Canet
2013-06-04 15:54 ` Benoît Canet
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=51AD12AB.1000903@redhat.com \
--to=ddutile-h+wxahxf7alqt0dzr+alfa@public.gmane.org \
--cc=benoit.canet-J9ArbTHlV+bR7s880joybQ@public.gmane.org \
--cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \
--cc=linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=qemu-devel-qX2TKyscuCcdnm+yROfE0A@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.