[U-Boot] [PATCH] gpio: spear_gpio: Fix gpio_set_value() implementation

[Marek Vasut <marex@denx.de>]

Dear Michael Trimarchi,

> Hi
> 
> On 06/20/2013 03:56 PM, Axel Lin wrote:
> > 2013/6/20 Marek Vasut <marex@denx.de>
> > 
> >> Dear Axel Lin,
> >> 
> >>> In current gpio_set_value() implementation, it always sets the gpio
> >>> control bit no matter the value argument is 0 or 1. Thus the GPIOs
> >>> never set to low. This patch fixes this bug.
> >>> 
> >>> Signed-off-by: Axel Lin <axel.lin@ingics.com>
> >>> ---
> >>> 
> >>>  drivers/gpio/spear_gpio.c | 5 ++++-
> >>>  1 file changed, 4 insertions(+), 1 deletion(-)
> >>> 
> >>> diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
> >>> index d3c728e..8878608 100644
> >>> --- a/drivers/gpio/spear_gpio.c
> >>> +++ b/drivers/gpio/spear_gpio.c
> >>> @@ -52,7 +52,10 @@ int gpio_set_value(unsigned gpio, int value)
> >>> 
> >>>  {
> >>>  
> >>>       struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
> >>> 
> >>> -     writel(1 << gpio, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
> >>> +     if (value)
> >>> +             writel(1 << gpio, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
> >>> +     else
> >>> +             writel(0, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
> >> 
> >> How can this possibly work? Writing 0 to the whole bank will unset all
> >> the GPIOs, no ?
> > 
> > Because each GPIO is controlled by a register.
> > And only one bit will be set when set gpio to high.
> 
> Yes, but how to reset just one bit if you use the same register offset?
> 
> I don't know this core but I know two possibilities:
> 
> 1) one set register and one clear register
> 	if (enable)
> 		writel(1 << gpio, REGSET_BANK(gpio));
> 	else
> 		writel(1 << gpio, REGCLEAR_BANK(gpio));
> 2) or
> set operation
> 	reg = readl(REG(gpio);
> 	if (enable)
> 		reg |= 1 << gpio;
> 	else
> 		reg &= ~(1 << gpio);
> 	writel(reg, REG(GPIO));
> 
> Any other way?

I think it's about time to read the datasheet :b

Best regards,
Marek Vasut