Re: [RFC 2/2] usb: dwc3: Add Qualcomm DWC3 glue layer driver

[Felipe Balbi <balbi@ti.com>]

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Hi,

On Tue, Aug 06, 2013 at 02:53:11PM +0300, Ivan T. Ivanov wrote:
> diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
> new file mode 100644
> index 0000000..e509abc
> --- /dev/null
> +++ b/drivers/usb/dwc3/dwc3-msm.c
> @@ -0,0 +1,175 @@
> +#undef CONFIG_REGULATOR

why ??????

> +static int dwc3_msm_probe(struct platform_device *pdev)
> +{
> +	struct device_node *node = pdev->dev.of_node;
> +	struct dwc3_msm *mdwc;
> +	struct resource *res;
> +	void __iomem *tcsr;
> +	int ret = 0;
> +
> +	dev_info(&pdev->dev, "MSM DWC3\n");

please don't. This is hardly necessary.

> +	mdwc = devm_kzalloc(&pdev->dev, sizeof(*mdwc), GFP_KERNEL);
> +	if (!mdwc) {
> +		dev_err(&pdev->dev, "not enough memory\n");

this message isn't needed either

> +	/*
> +	 * DWC3 Core requires its CORE CLK (aka master / bus clk) to
> +	 * run at 125Mhz in SSUSB mode and >60MHZ for HSUSB mode.
> +	 */
> +	clk_set_rate(mdwc->core_clk, 125000000);

if this is dwc3's core clock, why don't we teach dwc3.ko about this
requirement ? Just make sure to have it optional, since x86 and OMAP
wouldn't need direct fiddling with the clocks.

> +	clk_prepare_enable(mdwc->core_clk);
> +	clk_prepare_enable(mdwc->iface_clk);
> +	clk_prepare_enable(mdwc->sleep_clk);
> +	clk_prepare_enable(mdwc->utmi_clk);

do you really need to enable your clocks here ? Why don't you enable
them on runtime_resume and disable on runtime_suspend ?

> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	tcsr = devm_ioremap_resource(&pdev->dev, res);
> +	if (!tcsr) {
> +		dev_dbg(&pdev->dev, "tcsr ioremap failed\n");

no need to ioremap, also you're likely leaking clocks and regulators
enabled here.

Make sure to have something like:

	if (!tcsr)
		goto err_disable_clocks;

	/* TODO This has to be revised */\

	[...]

> +	} else {
> +		/* TODO: This has to be revised */
> +
> +		/* Enable USB3 on the primary USB port. */
> +		writel_relaxed(0x1, tcsr);
> +		/*
> +		 * Ensure that TCSR write is completed before
> +		 * USB registers initialization.
> +		 */
> +		mb();

why don't you use writel() instead. It will add the memory barrier for
you.

-- 
balbi

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