* [PATCH] drm/i915: Align tiled scanouts from stolen memory to 256k in the GTT
@ 2013-08-11 22:17 Chris Wilson
2013-08-12 9:38 ` Ville Syrjälä
0 siblings, 1 reply; 3+ messages in thread
From: Chris Wilson @ 2013-08-11 22:17 UTC (permalink / raw)
To: intel-gfx
For unfathomable reasons this alignment appears to be required for tiled
scanouts being read from stolen memory. I can find no reference in the
w/a db to support this requirement, but the evidence of my own eyes says
this prevents many headaches.
Note that I have not tricked anything older than Sandybridge into using
stolen tiled scanouts, so the extra alignment may be required there as
well.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_display.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6b7ce06..a7573f2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1848,6 +1848,8 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
case I915_TILING_X:
/* pin() will align the object as required by fence */
alignment = 0;
+ if (obj->stolen && INTEL_INFO(dev)->gen >= 6)
+ alignment = 256 * 1024;
break;
case I915_TILING_Y:
/* Despite that we check this in framebuffer_init userspace can
--
1.8.4.rc2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/i915: Align tiled scanouts from stolen memory to 256k in the GTT
2013-08-11 22:17 [PATCH] drm/i915: Align tiled scanouts from stolen memory to 256k in the GTT Chris Wilson
@ 2013-08-12 9:38 ` Ville Syrjälä
2013-08-12 9:42 ` Chris Wilson
0 siblings, 1 reply; 3+ messages in thread
From: Ville Syrjälä @ 2013-08-12 9:38 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Sun, Aug 11, 2013 at 11:17:28PM +0100, Chris Wilson wrote:
> For unfathomable reasons this alignment appears to be required for tiled
> scanouts being read from stolen memory. I can find no reference in the
> w/a db to support this requirement, but the evidence of my own eyes says
> this prevents many headaches.
>
> Note that I have not tricked anything older than Sandybridge into using
> stolen tiled scanouts, so the extra alignment may be required there as
> well.
Strange. I can't find anything except async flips and vt-d which would
require 256k alignment.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6b7ce06..a7573f2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1848,6 +1848,8 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
> case I915_TILING_X:
> /* pin() will align the object as required by fence */
> alignment = 0;
> + if (obj->stolen && INTEL_INFO(dev)->gen >= 6)
> + alignment = 256 * 1024;
> break;
> case I915_TILING_Y:
> /* Despite that we check this in framebuffer_init userspace can
> --
> 1.8.4.rc2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/i915: Align tiled scanouts from stolen memory to 256k in the GTT
2013-08-12 9:38 ` Ville Syrjälä
@ 2013-08-12 9:42 ` Chris Wilson
0 siblings, 0 replies; 3+ messages in thread
From: Chris Wilson @ 2013-08-12 9:42 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Mon, Aug 12, 2013 at 12:38:03PM +0300, Ville Syrjälä wrote:
> On Sun, Aug 11, 2013 at 11:17:28PM +0100, Chris Wilson wrote:
> > For unfathomable reasons this alignment appears to be required for tiled
> > scanouts being read from stolen memory. I can find no reference in the
> > w/a db to support this requirement, but the evidence of my own eyes says
> > this prevents many headaches.
> >
> > Note that I have not tricked anything older than Sandybridge into using
> > stolen tiled scanouts, so the extra alignment may be required there as
> > well.
>
> Strange. I can't find anything except async flips and vt-d which would
> require 256k alignment.
I can empathically state it is required though. It might not be 256k,
that's just the first value that stopped giving me headaches. :)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-08-12 9:42 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-08-11 22:17 [PATCH] drm/i915: Align tiled scanouts from stolen memory to 256k in the GTT Chris Wilson
2013-08-12 9:38 ` Ville Syrjälä
2013-08-12 9:42 ` Chris Wilson
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.