From: Paul Mackerras <paulus@samba.org>
To: Alexander Graf <agraf@suse.de>,
kvm-ppc@vger.kernel.org, kvm@vger.kernel.org
Subject: [RFC PATCH 06/10] KVM: PPC: Book3S HV: Implement architecture compatibility modes for POWER8
Date: Fri, 06 Sep 2013 03:55:16 +0000 [thread overview]
Message-ID: <20130906035516.GS29710@iris.ozlabs.ibm.com> (raw)
In-Reply-To: <20130906034820.GM29710@iris.ozlabs.ibm.com>
This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7)
compatibility modes on a POWER8 processor.
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
arch/powerpc/include/asm/reg.h | 2 ++
arch/powerpc/kvm/book3s_hv.c | 16 +++++++++++++++-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 4ca8b85..483e0a2 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -315,6 +315,8 @@
#define SPRN_PCR 0x152 /* Processor compatibility register */
#define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (pre POWER8) */
#define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (pre POWER8) */
+#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */
+#define PCR_ARCH_206 0x4 /* Architecture 2.06 */
#define PCR_ARCH_205 0x2 /* Architecture 2.05 */
#define SPRN_HEIR 0x153 /* Hypervisor Emulated Instruction Register */
#define SPRN_TLBINDEXR 0x154 /* P7 TLB control register */
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index da8619e..217041f 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -177,14 +177,28 @@ int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
switch (arch_compat) {
case PVR_ARCH_205:
- pcr = PCR_ARCH_205;
+ /*
+ * If an arch bit is set in PCR, all the defined
+ * higher-order arch bits also have to be set.
+ */
+ pcr = PCR_ARCH_206 | PCR_ARCH_205;
break;
case PVR_ARCH_206:
case PVR_ARCH_206p:
+ pcr = PCR_ARCH_206;
+ break;
+ case PVR_ARCH_207:
break;
default:
return -EINVAL;
}
+
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
+ /* POWER7 can't emulate POWER8 */
+ if (!(pcr & PCR_ARCH_206))
+ return -EINVAL;
+ pcr &= ~PCR_ARCH_206;
+ }
}
spin_lock(&vc->lock);
--
1.8.4.rc3
WARNING: multiple messages have this Message-ID (diff)
From: Paul Mackerras <paulus@samba.org>
To: Alexander Graf <agraf@suse.de>,
kvm-ppc@vger.kernel.org, kvm@vger.kernel.org
Subject: [RFC PATCH 06/10] KVM: PPC: Book3S HV: Implement architecture compatibility modes for POWER8
Date: Fri, 6 Sep 2013 13:55:16 +1000 [thread overview]
Message-ID: <20130906035516.GS29710@iris.ozlabs.ibm.com> (raw)
In-Reply-To: <20130906034820.GM29710@iris.ozlabs.ibm.com>
This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7)
compatibility modes on a POWER8 processor.
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
arch/powerpc/include/asm/reg.h | 2 ++
arch/powerpc/kvm/book3s_hv.c | 16 +++++++++++++++-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 4ca8b85..483e0a2 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -315,6 +315,8 @@
#define SPRN_PCR 0x152 /* Processor compatibility register */
#define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (pre POWER8) */
#define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (pre POWER8) */
+#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */
+#define PCR_ARCH_206 0x4 /* Architecture 2.06 */
#define PCR_ARCH_205 0x2 /* Architecture 2.05 */
#define SPRN_HEIR 0x153 /* Hypervisor Emulated Instruction Register */
#define SPRN_TLBINDEXR 0x154 /* P7 TLB control register */
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index da8619e..217041f 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -177,14 +177,28 @@ int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
switch (arch_compat) {
case PVR_ARCH_205:
- pcr = PCR_ARCH_205;
+ /*
+ * If an arch bit is set in PCR, all the defined
+ * higher-order arch bits also have to be set.
+ */
+ pcr = PCR_ARCH_206 | PCR_ARCH_205;
break;
case PVR_ARCH_206:
case PVR_ARCH_206p:
+ pcr = PCR_ARCH_206;
+ break;
+ case PVR_ARCH_207:
break;
default:
return -EINVAL;
}
+
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
+ /* POWER7 can't emulate POWER8 */
+ if (!(pcr & PCR_ARCH_206))
+ return -EINVAL;
+ pcr &= ~PCR_ARCH_206;
+ }
}
spin_lock(&vc->lock);
--
1.8.4.rc3
next prev parent reply other threads:[~2013-09-06 3:55 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-06 3:48 [RFC PATCH 0/10] Support POWER8 in HV KVM Paul Mackerras
2013-09-06 3:48 ` Paul Mackerras
2013-09-06 3:50 ` [RFC PATCH 01/10] KVM: PPC: Book3S HV: Align physical CPU thread numbers with virtual Paul Mackerras
2013-09-06 3:50 ` Paul Mackerras
2013-09-06 3:51 ` [RFC PATCH 02/10] KVM: PPC: Book3S HV: Don't set DABR on POWER8 Paul Mackerras
2013-09-06 3:51 ` Paul Mackerras
2013-09-06 3:51 ` [RFC PATCH 03/10] KVM: PPC: Book3S HV: Context-switch new POWER8 SPRs Paul Mackerras
2013-09-06 3:51 ` Paul Mackerras
2013-09-06 3:53 ` [RFC PATCH 04/10] KVM: PPC: Book3S HV: Flush the correct number of TLB sets on POWER8 Paul Mackerras
2013-09-06 3:53 ` Paul Mackerras
2013-09-06 3:54 ` [RFC PATCH 05/10] KVM: PPC: Book3S HV: Add handler for HV facility unavailable Paul Mackerras
2013-09-06 3:54 ` Paul Mackerras
2013-11-04 12:48 ` Alexander Graf
2013-11-04 12:48 ` Alexander Graf
2013-09-06 3:55 ` Paul Mackerras [this message]
2013-09-06 3:55 ` [RFC PATCH 06/10] KVM: PPC: Book3S HV: Implement architecture compatibility modes for POWER8 Paul Mackerras
2013-11-04 12:53 ` Alexander Graf
2013-11-04 12:53 ` Alexander Graf
2013-11-05 3:53 ` Paul Mackerras
2013-11-05 3:53 ` Paul Mackerras
2013-11-05 6:06 ` Alexander Graf
2013-11-05 6:06 ` Alexander Graf
2013-11-06 5:15 ` Paul Mackerras
2013-11-06 5:15 ` Paul Mackerras
2013-09-06 3:58 ` [RFC PATCH 07/10] KVM: PPC: Book3S HV: Consolidate code that checks reason for wake from nap Paul Mackerras
2013-09-06 3:58 ` Paul Mackerras
2013-09-06 3:58 ` [RFC PATCH 08/10] KVM: PPC: Book3S HV: Handle guest using doorbells for IPIs Paul Mackerras
2013-09-06 3:58 ` Paul Mackerras
2013-09-06 3:59 ` [RFC PATCH 09/10] KVM: PPC: Book3S HV: Handle new LPCR bits on POWER8 Paul Mackerras
2013-09-06 3:59 ` Paul Mackerras
2013-09-06 4:00 ` [RFC PATCH 10/10] KVM: PPC: Book3S HV: Prepare for host using hypervisor doorbells Paul Mackerras
2013-09-06 4:00 ` Paul Mackerras
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