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From: Lee Jones <lee.jones@linaro.org>
To: Maxime COQUELIN <maxime.coquelin@st.com>
Cc: Wolfram Sang <wsa@the-dreams.de>,
	srinivas.kandagatla@st.com, Rob Herring <rob.herring@calxeda.com>,
	Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Rob Landley <rob@landley.net>,
	Russell King <linux@arm.linux.org.uk>,
	Grant Likely <grant.likely@linaro.org>,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org,
	stephen.gallimore@st.com, stuart.menefy@st.com,
	gabriel.fernandez@st.com, olivier.clergeaud@st.com
Subject: Re: [PATCH 3/4] ARM: STi: Supply I2C configuration to STiH415 SoC
Date: Wed, 18 Sep 2013 13:00:12 +0100	[thread overview]
Message-ID: <20130918120012.GE16984@lee--X1> (raw)
In-Reply-To: <1379498483-4236-4-git-send-email-maxime.coquelin@st.com>

On Wed, 18 Sep 2013, Maxime COQUELIN wrote:

> This patch supplies I2C configuration to STiH415 SoC.
> 
> Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com>
> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
> ---
>  arch/arm/boot/dts/stih415-pinctrl.dtsi |   36 ++++++++++++++++++++
>  arch/arm/boot/dts/stih415.dtsi         |   57 ++++++++++++++++++++++++++++++++
>  2 files changed, 93 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi
> index 1d322b2..e56449d 100644
> --- a/arch/arm/boot/dts/stih415-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi
> @@ -86,6 +86,24 @@
>  					};
>  				};
>  			};
> +
> +			sbc_i2c0 {
> +				pinctrl_sbc_i2c0_default: sbc_i2c0-default {
> +					st,pins {
> +						sda = <&PIO4 6 ALT1 BIDIR>;
> +						scl = <&PIO4 5 ALT1 BIDIR>;
> +					};
> +				};
> +			};
> +
> +			sbc_i2c1 {
> +				pinctrl_sbc_i2c1_default: sbc_i2c1-default {
> +					st,pins {
> +						sda = <&PIO3 2 ALT2 BIDIR>;
> +						scl = <&PIO3 1 ALT2 BIDIR>;
> +					};
> +				};
> +			};
>  		};
>  
>  		pin-controller-front {
> @@ -143,6 +161,24 @@
>  				reg		= <0x7000 0x100>;
>  				st,bank-name	= "PIO12";
>  			};
> +
> +			i2c0 {
> +				pinctrl_i2c0_default: i2c0-default {
> +					st,pins {
> +						sda = <&PIO9 3 ALT1 BIDIR>;
> +						scl = <&PIO9 2 ALT1 BIDIR>;
> +					};
> +				};
> +			};
> +
> +			i2c1 {
> +				pinctrl_i2c1_default: i2c1-default {
> +					st,pins {
> +						sda = <&PIO12 1 ALT1 BIDIR>;
> +						scl = <&PIO12 0 ALT1 BIDIR>;
> +					};
> +				};
> +			};
>  		};
>  
>  		pin-controller-rear {
> diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
> index 74ab8de..643ae1c 100644
> --- a/arch/arm/boot/dts/stih415.dtsi
> +++ b/arch/arm/boot/dts/stih415.dtsi
> @@ -9,6 +9,7 @@
>  #include "stih41x.dtsi"
>  #include "stih415-clock.dtsi"
>  #include "stih415-pinctrl.dtsi"
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>  / {
>  
>  	L2: cache-controller {
> @@ -83,5 +84,61 @@
>  			pinctrl-names 	= "default";
>  			pinctrl-0	= <&pinctrl_sbc_serial1>;
>  		};
> +
> +		i2c0: i2c@fed40000{

Space before the '{'.

> +			compatible	= "st,comms-i2c";
> +			status		= "disabled";

Consider putting the node status at the bottom.

> +			reg		= <0xfed40000 0x110>;
> +			interrupts	=  <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>;
> +			clocks		= <&CLKS_ICN_REG_0>;
> +			clock-frequency = <400000>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_i2c0_default>;
> +			st,glitches;
> +			st,glitch-clk	= <500>;
> +			st,glitch-dat	= <500>;
> +		};
> +
> +		i2c1: i2c@fed41000{

Same here and throughout.

> +			compatible	= "st,comms-i2c";
> +			status		= "disabled";

Same here and throughout.

> +			reg		= <0xfed41000 0x110>;
> +			interrupts	=  <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
> +			clocks		= <&CLKS_ICN_REG_0>;
> +			clock-frequency = <400000>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_i2c1_default>;
> +			st,glitches;
> +			st,glitch-clk	= <500>;
> +			st,glitch-dat	= <500>;
> +		};
> +
> +		sbc_i2c0: i2c@fe540000{
> +			compatible	= "st,comms-i2c";
> +			status		= "disabled";
> +			reg		= <0xfe540000 0x110>;
> +			interrupts	=  <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>;
> +			clocks		= <&CLK_SYSIN>;
> +			clock-frequency = <400000>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_sbc_i2c0_default>;
> +			st,glitches;
> +			st,glitch-clk	= <500>;
> +			st,glitch-dat	= <500>;
> +		};
> +
> +		sbc_i2c1: i2c@fe541000{
> +			compatible	= "st,comms-i2c";
> +			status		= "disabled";
> +			reg		= <0xfe541000 0x110>;
> +			interrupts	=  <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>;
> +			clocks		= <&CLK_SYSIN>;
> +			clock-frequency = <400000>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_sbc_i2c1_default>;
> +			st,glitches;
> +			st,glitch-clk	= <500>;
> +			st,glitch-dat	= <500>;
> +		};
>  	};
>  };

Is this odd tabbing just the result of the patch format?

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

WARNING: multiple messages have this Message-ID (diff)
From: lee.jones@linaro.org (Lee Jones)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] ARM: STi: Supply I2C configuration to STiH415 SoC
Date: Wed, 18 Sep 2013 13:00:12 +0100	[thread overview]
Message-ID: <20130918120012.GE16984@lee--X1> (raw)
In-Reply-To: <1379498483-4236-4-git-send-email-maxime.coquelin@st.com>

On Wed, 18 Sep 2013, Maxime COQUELIN wrote:

> This patch supplies I2C configuration to STiH415 SoC.
> 
> Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com>
> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
> ---
>  arch/arm/boot/dts/stih415-pinctrl.dtsi |   36 ++++++++++++++++++++
>  arch/arm/boot/dts/stih415.dtsi         |   57 ++++++++++++++++++++++++++++++++
>  2 files changed, 93 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi
> index 1d322b2..e56449d 100644
> --- a/arch/arm/boot/dts/stih415-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi
> @@ -86,6 +86,24 @@
>  					};
>  				};
>  			};
> +
> +			sbc_i2c0 {
> +				pinctrl_sbc_i2c0_default: sbc_i2c0-default {
> +					st,pins {
> +						sda = <&PIO4 6 ALT1 BIDIR>;
> +						scl = <&PIO4 5 ALT1 BIDIR>;
> +					};
> +				};
> +			};
> +
> +			sbc_i2c1 {
> +				pinctrl_sbc_i2c1_default: sbc_i2c1-default {
> +					st,pins {
> +						sda = <&PIO3 2 ALT2 BIDIR>;
> +						scl = <&PIO3 1 ALT2 BIDIR>;
> +					};
> +				};
> +			};
>  		};
>  
>  		pin-controller-front {
> @@ -143,6 +161,24 @@
>  				reg		= <0x7000 0x100>;
>  				st,bank-name	= "PIO12";
>  			};
> +
> +			i2c0 {
> +				pinctrl_i2c0_default: i2c0-default {
> +					st,pins {
> +						sda = <&PIO9 3 ALT1 BIDIR>;
> +						scl = <&PIO9 2 ALT1 BIDIR>;
> +					};
> +				};
> +			};
> +
> +			i2c1 {
> +				pinctrl_i2c1_default: i2c1-default {
> +					st,pins {
> +						sda = <&PIO12 1 ALT1 BIDIR>;
> +						scl = <&PIO12 0 ALT1 BIDIR>;
> +					};
> +				};
> +			};
>  		};
>  
>  		pin-controller-rear {
> diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
> index 74ab8de..643ae1c 100644
> --- a/arch/arm/boot/dts/stih415.dtsi
> +++ b/arch/arm/boot/dts/stih415.dtsi
> @@ -9,6 +9,7 @@
>  #include "stih41x.dtsi"
>  #include "stih415-clock.dtsi"
>  #include "stih415-pinctrl.dtsi"
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>  / {
>  
>  	L2: cache-controller {
> @@ -83,5 +84,61 @@
>  			pinctrl-names 	= "default";
>  			pinctrl-0	= <&pinctrl_sbc_serial1>;
>  		};
> +
> +		i2c0: i2c at fed40000{

Space before the '{'.

> +			compatible	= "st,comms-i2c";
> +			status		= "disabled";

Consider putting the node status at the bottom.

> +			reg		= <0xfed40000 0x110>;
> +			interrupts	=  <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>;
> +			clocks		= <&CLKS_ICN_REG_0>;
> +			clock-frequency = <400000>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_i2c0_default>;
> +			st,glitches;
> +			st,glitch-clk	= <500>;
> +			st,glitch-dat	= <500>;
> +		};
> +
> +		i2c1: i2c at fed41000{

Same here and throughout.

> +			compatible	= "st,comms-i2c";
> +			status		= "disabled";

Same here and throughout.

> +			reg		= <0xfed41000 0x110>;
> +			interrupts	=  <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
> +			clocks		= <&CLKS_ICN_REG_0>;
> +			clock-frequency = <400000>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_i2c1_default>;
> +			st,glitches;
> +			st,glitch-clk	= <500>;
> +			st,glitch-dat	= <500>;
> +		};
> +
> +		sbc_i2c0: i2c at fe540000{
> +			compatible	= "st,comms-i2c";
> +			status		= "disabled";
> +			reg		= <0xfe540000 0x110>;
> +			interrupts	=  <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>;
> +			clocks		= <&CLK_SYSIN>;
> +			clock-frequency = <400000>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_sbc_i2c0_default>;
> +			st,glitches;
> +			st,glitch-clk	= <500>;
> +			st,glitch-dat	= <500>;
> +		};
> +
> +		sbc_i2c1: i2c at fe541000{
> +			compatible	= "st,comms-i2c";
> +			status		= "disabled";
> +			reg		= <0xfe541000 0x110>;
> +			interrupts	=  <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>;
> +			clocks		= <&CLK_SYSIN>;
> +			clock-frequency = <400000>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_sbc_i2c1_default>;
> +			st,glitches;
> +			st,glitch-clk	= <500>;
> +			st,glitch-dat	= <500>;
> +		};
>  	};
>  };

Is this odd tabbing just the result of the patch format?

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

  reply	other threads:[~2013-09-18 12:00 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-18 10:01 [PATCH 0/4] Add I2C support to ST SoCs Maxime COQUELIN
2013-09-18 10:01 ` Maxime COQUELIN
2013-09-18 10:01 ` [PATCH 1/4] i2c: busses: i2c-st: Add ST I2C controller Maxime COQUELIN
2013-09-18 10:01   ` Maxime COQUELIN
2013-09-18 12:47   ` Gabriel FERNANDEZ
2013-09-18 12:47     ` Gabriel FERNANDEZ
2013-09-18 12:47     ` Gabriel FERNANDEZ
     [not found]     ` <5239A0ED.6010606-qxv4g6HH51o@public.gmane.org>
2013-09-23 20:55       ` Stephen Warren
2013-09-23 20:55         ` Stephen Warren
2013-09-23 20:55         ` Stephen Warren
     [not found]   ` <1379498483-4236-2-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-09-23 21:06     ` Stephen Warren
2013-09-23 21:06       ` Stephen Warren
2013-09-23 21:06       ` Stephen Warren
     [not found]       ` <5240AD6E.4090905-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-09-24 15:38         ` Maxime COQUELIN
2013-09-24 15:38           ` Maxime COQUELIN
2013-09-24 15:38           ` Maxime COQUELIN
     [not found]           ` <5241B1FA.6020500-qxv4g6HH51o@public.gmane.org>
2013-09-24 15:59             ` Wolfram Sang
2013-09-24 15:59               ` Wolfram Sang
2013-09-24 15:59               ` Wolfram Sang
2013-09-26  9:30               ` Maxime COQUELIN
2013-09-26  9:30                 ` Maxime COQUELIN
2013-09-26  9:30                 ` Maxime COQUELIN
     [not found] ` <1379498483-4236-1-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-09-18 10:01   ` [PATCH 2/4] ARM: STi: Supply I2C configuration to STiH416 SoC Maxime COQUELIN
2013-09-18 10:01     ` Maxime COQUELIN
2013-09-18 10:01     ` Maxime COQUELIN
     [not found]     ` <1379498483-4236-3-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-09-18 12:03       ` Lee Jones
2013-09-18 12:03         ` Lee Jones
2013-09-18 12:03         ` Lee Jones
2013-09-18 12:46         ` Maxime COQUELIN
2013-09-18 12:46           ` Maxime COQUELIN
2013-09-18 12:46           ` Maxime COQUELIN
     [not found]           ` <84625B87D65BCF478CC1E9C886A4C314DEF1BD9578-+EwDPpWUVoSs+H57zxxw29BPR1lH4CV8@public.gmane.org>
2013-09-18 12:57             ` Srinivas KANDAGATLA
2013-09-18 12:57               ` Srinivas KANDAGATLA
2013-09-18 12:57               ` Srinivas KANDAGATLA
2013-09-19  7:16               ` Maxime COQUELIN
2013-09-19  7:16                 ` Maxime COQUELIN
2013-09-19  7:16                 ` Maxime COQUELIN
2013-09-19 12:59                 ` Srinivas KANDAGATLA
2013-09-19 12:59                   ` Srinivas KANDAGATLA
2013-09-19 15:22                   ` Maxime COQUELIN
2013-09-19 15:22                     ` Maxime COQUELIN
     [not found]                     ` <84625B87D65BCF478CC1E9C886A4C314DEF1BD957D-+EwDPpWUVoSs+H57zxxw29BPR1lH4CV8@public.gmane.org>
2013-09-19 15:32                       ` Lee Jones
2013-09-19 15:32                         ` Lee Jones
2013-09-19 15:32                         ` Lee Jones
2013-09-18 10:01 ` [PATCH 3/4] ARM: STi: Supply I2C configuration to STiH415 SoC Maxime COQUELIN
2013-09-18 10:01   ` Maxime COQUELIN
2013-09-18 12:00   ` Lee Jones [this message]
2013-09-18 12:00     ` Lee Jones
2013-09-18 12:38     ` Maxime COQUELIN
2013-09-18 12:38       ` Maxime COQUELIN
2013-09-18 12:38       ` Maxime COQUELIN
2013-09-18 10:01 ` [PATCH 4/4] ARM: STi: Add I2C config to B2000 and B2020 boards Maxime COQUELIN
2013-09-18 10:01   ` Maxime COQUELIN
2013-09-18 11:40   ` Lee Jones
2013-09-18 11:40     ` Lee Jones
2013-09-18 12:36     ` Maxime COQUELIN
2013-09-18 12:36       ` Maxime COQUELIN
2013-09-18 12:36       ` Maxime COQUELIN
  -- strict thread matches above, loose matches on Subject: below --
2013-10-01 10:39 [PATCH v3 0/4] Add I2C support to ST SoCs Maxime COQUELIN
     [not found] ` <1380623952-4252-1-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-10-01 10:39   ` [PATCH 3/4] ARM: STi: Supply I2C configuration to STiH415 SoC Maxime COQUELIN
2013-10-01 10:39     ` Maxime COQUELIN
2013-10-01 10:39     ` Maxime COQUELIN

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