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From: Tony Lindgren <tony@atomide.com>
To: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Sricharan R <r.sricharan@ti.com>,
	linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org,
	nm@ti.com, Rajendra Nayak <rnayak@ti.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH V5] ARM: OMAP5/DRA7: realtime_counter: Configure CNTFRQ register
Date: Fri, 11 Oct 2013 17:34:33 -0700	[thread overview]
Message-ID: <20131012003433.GJ29913@atomide.com> (raw)
In-Reply-To: <20131010171540.GG29913@atomide.com>

* Tony Lindgren <tony@atomide.com> [131010 10:23]:
> * Santosh Shilimkar <santosh.shilimkar@ti.com> [131010 06:20]:
> > On Thursday 10 October 2013 03:43 AM, Sricharan R wrote:
> > > From: R Sricharan <r.sricharan@ti.com>
> > > 
> > > The realtime counter called master counter, produces the count
> > > used by the private timer peripherals in the MPU_CLUSTER. The
> > > CNTFRQ per cpu register is used to denote the frequency of the counter.
> > > Currently the frequency value is passed from the
> > > DT file, but this is not scalable when we have other non-DT guest
> > > OS. This register must be set to the right value by the
> > > secure rom code. Setting this register helps in propagating the right
> > > frequency value across OSes.
> > > 
> > > More discussions and the reason for adding this in a non-DT
> > > way can be seen from below.
> > > http://www.mail-archive.com/linux-omap@vger.kernel.org/msg93832.html
> > > 
> > > So configuring this secure register for all the cpus here.
> > > 
> > > Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > Cc: Nishanth Menon <nm@ti.com>
> > > Cc: Rajendra Nayak <rnayak@ti.com>
> > > Cc: Marc Zyngier <marc.zyngier@arm.com>
> > > Cc: Mark Rutland <mark.rutland@arm.com>
> > > Cc: Tony Lindgren <tony@atomide.com>
> > > Tested-by: Nishanth Menon <nm@ti.com>
> > > Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > Signed-off-by: Sricharan R <r.sricharan@ti.com>
> > > ---
> > >  [V5] Removed the use of extern variable in omap-smp.c
> > >       as per suggestion from Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > 
> > Thanks for the updates Sricharan. Looks fine now.
> > 
> > Tony, Can you apply this version if you are fine with it.
> 
> Yes thanks looks good to me now. Applying into omap-for-v3.13/soc.

Grr, had to apply the following fix on top of this for some configs.

Tony

8< ---------------------------

From: Tony Lindgren <tony@atomide.com>
Date: Fri, 11 Oct 2013 17:28:04 -0700
Subject: [PATCH] ARM: OMAP2+: Fix build error for realtime counter init if not enabled

Otherwise we can get an error with some configs:

arch/arm/mach-omap2/timer.c:73: undefined reference to `omap_smc1'

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -66,12 +66,15 @@
 
 static struct omap_dm_timer clkev;
 static struct clock_event_device clockevent_gpt;
+
+#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 static unsigned long arch_timer_freq;
 
 void set_cntfreq(void)
 {
 	omap_smc1(OMAP5_DRA7_MON_SET_CNTFRQ_INDEX, arch_timer_freq);
 }
+#endif
 
 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
 {

WARNING: multiple messages have this Message-ID (diff)
From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V5] ARM: OMAP5/DRA7: realtime_counter: Configure CNTFRQ register
Date: Fri, 11 Oct 2013 17:34:33 -0700	[thread overview]
Message-ID: <20131012003433.GJ29913@atomide.com> (raw)
In-Reply-To: <20131010171540.GG29913@atomide.com>

* Tony Lindgren <tony@atomide.com> [131010 10:23]:
> * Santosh Shilimkar <santosh.shilimkar@ti.com> [131010 06:20]:
> > On Thursday 10 October 2013 03:43 AM, Sricharan R wrote:
> > > From: R Sricharan <r.sricharan@ti.com>
> > > 
> > > The realtime counter called master counter, produces the count
> > > used by the private timer peripherals in the MPU_CLUSTER. The
> > > CNTFRQ per cpu register is used to denote the frequency of the counter.
> > > Currently the frequency value is passed from the
> > > DT file, but this is not scalable when we have other non-DT guest
> > > OS. This register must be set to the right value by the
> > > secure rom code. Setting this register helps in propagating the right
> > > frequency value across OSes.
> > > 
> > > More discussions and the reason for adding this in a non-DT
> > > way can be seen from below.
> > > http://www.mail-archive.com/linux-omap at vger.kernel.org/msg93832.html
> > > 
> > > So configuring this secure register for all the cpus here.
> > > 
> > > Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > Cc: Nishanth Menon <nm@ti.com>
> > > Cc: Rajendra Nayak <rnayak@ti.com>
> > > Cc: Marc Zyngier <marc.zyngier@arm.com>
> > > Cc: Mark Rutland <mark.rutland@arm.com>
> > > Cc: Tony Lindgren <tony@atomide.com>
> > > Tested-by: Nishanth Menon <nm@ti.com>
> > > Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > Signed-off-by: Sricharan R <r.sricharan@ti.com>
> > > ---
> > >  [V5] Removed the use of extern variable in omap-smp.c
> > >       as per suggestion from Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > 
> > Thanks for the updates Sricharan. Looks fine now.
> > 
> > Tony, Can you apply this version if you are fine with it.
> 
> Yes thanks looks good to me now. Applying into omap-for-v3.13/soc.

Grr, had to apply the following fix on top of this for some configs.

Tony

8< ---------------------------

From: Tony Lindgren <tony@atomide.com>
Date: Fri, 11 Oct 2013 17:28:04 -0700
Subject: [PATCH] ARM: OMAP2+: Fix build error for realtime counter init if not enabled

Otherwise we can get an error with some configs:

arch/arm/mach-omap2/timer.c:73: undefined reference to `omap_smc1'

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -66,12 +66,15 @@
 
 static struct omap_dm_timer clkev;
 static struct clock_event_device clockevent_gpt;
+
+#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 static unsigned long arch_timer_freq;
 
 void set_cntfreq(void)
 {
 	omap_smc1(OMAP5_DRA7_MON_SET_CNTFRQ_INDEX, arch_timer_freq);
 }
+#endif
 
 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
 {

  reply	other threads:[~2013-10-12  0:34 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-10  7:43 [PATCH V5] ARM: OMAP5/DRA7: realtime_counter: Configure CNTFRQ register Sricharan R
2013-10-10  7:43 ` Sricharan R
2013-10-10 13:12 ` Santosh Shilimkar
2013-10-10 13:12   ` Santosh Shilimkar
2013-10-10 17:15   ` Tony Lindgren
2013-10-10 17:15     ` Tony Lindgren
2013-10-12  0:34     ` Tony Lindgren [this message]
2013-10-12  0:34       ` Tony Lindgren
2013-10-12  0:37       ` Santosh Shilimkar
2013-10-12  0:37         ` Santosh Shilimkar

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