From: Marek Vasut <marex@denx.de>
To: Huang Shijie <b32955@freescale.com>
Cc: angus.clark@st.com, shawn.guo@linaro.org, b44548@freescale.com,
broonie@linaro.org, dwmw2@infradead.org,
linux-doc@vger.kernel.org, b18965@freescale.com,
linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org,
pekon@ti.com, sourav.poddar@ti.com, computersforpeace@gmail.com,
lee.jones@linaro.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 7/7] mtd: spi-nor: Add Freescale QuadSpi driver
Date: Tue, 17 Dec 2013 14:16:18 +0100 [thread overview]
Message-ID: <201312171416.18560.marex@denx.de> (raw)
In-Reply-To: <1387184330-14448-8-git-send-email-b32955@freescale.com>
On Monday, December 16, 2013 at 09:58:50 AM, Huang Shijie wrote:
[...]
> +/* Macros for constructing the LUT register. */
> +#define LUT0(ins, pad, opr) \
> + (((opr) << OPRND0_SHIFT) | ((LUT_##pad) << PAD0_SHIFT) | \
> + ((LUT_##ins) << INSTR0_SHIFT))
> +
> +#define LUT1(ins, pad, opr) (LUT0(ins, pad, opr) << OPRND1_SHIFT)
Change this into an inline function, that way you'd get type-checking here.
[...]
> +enum fsl_qspi_devtype {
> + FSL_QUADSPI_VYBRID,
> + FSL_QUADSPI_IMX6SLX
Will the SLX be only a single-core chip?
> +};
> +
> +struct fsl_qspi_devtype_data {
> + enum fsl_qspi_devtype devtype;
> + u32 memmap_base;
> + int rxfifo;
> + int txfifo;
> +};
> +
> +static struct fsl_qspi_devtype_data vybrid_data = {
> + .devtype = FSL_QUADSPI_VYBRID,
> + .memmap_base = 0x20000000,
This memmap_base should come from DT prop.
> + .rxfifo = 128,
> + .txfifo = 64
Ditto for both of these too. They're HW props.
> +};
[...]
Best regards,
Marek Vasut
WARNING: multiple messages have this Message-ID (diff)
From: Marek Vasut <marex@denx.de>
To: Huang Shijie <b32955@freescale.com>
Cc: dwmw2@infradead.org, computersforpeace@gmail.com,
angus.clark@st.com, lee.jones@linaro.org, pekon@ti.com,
sourav.poddar@ti.com, broonie@linaro.org,
linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
b44548@freescale.com, b18965@freescale.com, shawn.guo@linaro.org
Subject: Re: [PATCH v3 7/7] mtd: spi-nor: Add Freescale QuadSpi driver
Date: Tue, 17 Dec 2013 14:16:18 +0100 [thread overview]
Message-ID: <201312171416.18560.marex@denx.de> (raw)
In-Reply-To: <1387184330-14448-8-git-send-email-b32955@freescale.com>
On Monday, December 16, 2013 at 09:58:50 AM, Huang Shijie wrote:
[...]
> +/* Macros for constructing the LUT register. */
> +#define LUT0(ins, pad, opr) \
> + (((opr) << OPRND0_SHIFT) | ((LUT_##pad) << PAD0_SHIFT) | \
> + ((LUT_##ins) << INSTR0_SHIFT))
> +
> +#define LUT1(ins, pad, opr) (LUT0(ins, pad, opr) << OPRND1_SHIFT)
Change this into an inline function, that way you'd get type-checking here.
[...]
> +enum fsl_qspi_devtype {
> + FSL_QUADSPI_VYBRID,
> + FSL_QUADSPI_IMX6SLX
Will the SLX be only a single-core chip?
> +};
> +
> +struct fsl_qspi_devtype_data {
> + enum fsl_qspi_devtype devtype;
> + u32 memmap_base;
> + int rxfifo;
> + int txfifo;
> +};
> +
> +static struct fsl_qspi_devtype_data vybrid_data = {
> + .devtype = FSL_QUADSPI_VYBRID,
> + .memmap_base = 0x20000000,
This memmap_base should come from DT prop.
> + .rxfifo = 128,
> + .txfifo = 64
Ditto for both of these too. They're HW props.
> +};
[...]
Best regards,
Marek Vasut
WARNING: multiple messages have this Message-ID (diff)
From: marex@denx.de (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 7/7] mtd: spi-nor: Add Freescale QuadSpi driver
Date: Tue, 17 Dec 2013 14:16:18 +0100 [thread overview]
Message-ID: <201312171416.18560.marex@denx.de> (raw)
In-Reply-To: <1387184330-14448-8-git-send-email-b32955@freescale.com>
On Monday, December 16, 2013 at 09:58:50 AM, Huang Shijie wrote:
[...]
> +/* Macros for constructing the LUT register. */
> +#define LUT0(ins, pad, opr) \
> + (((opr) << OPRND0_SHIFT) | ((LUT_##pad) << PAD0_SHIFT) | \
> + ((LUT_##ins) << INSTR0_SHIFT))
> +
> +#define LUT1(ins, pad, opr) (LUT0(ins, pad, opr) << OPRND1_SHIFT)
Change this into an inline function, that way you'd get type-checking here.
[...]
> +enum fsl_qspi_devtype {
> + FSL_QUADSPI_VYBRID,
> + FSL_QUADSPI_IMX6SLX
Will the SLX be only a single-core chip?
> +};
> +
> +struct fsl_qspi_devtype_data {
> + enum fsl_qspi_devtype devtype;
> + u32 memmap_base;
> + int rxfifo;
> + int txfifo;
> +};
> +
> +static struct fsl_qspi_devtype_data vybrid_data = {
> + .devtype = FSL_QUADSPI_VYBRID,
> + .memmap_base = 0x20000000,
This memmap_base should come from DT prop.
> + .rxfifo = 128,
> + .txfifo = 64
Ditto for both of these too. They're HW props.
> +};
[...]
Best regards,
Marek Vasut
next prev parent reply other threads:[~2013-12-17 13:16 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-16 8:58 [PATCH v3 0/7] mtd: spi-nor: add a new framework for SPI NOR Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` [PATCH v3 1/7] mtd: spi-nor: copy the SPI NOR commands to a new header file Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-17 13:01 ` Marek Vasut
2013-12-17 13:01 ` Marek Vasut
2013-12-17 13:01 ` Marek Vasut
2013-12-17 14:12 ` Huang Shijie
2013-12-17 14:12 ` Huang Shijie
2013-12-17 14:12 ` Huang Shijie
2013-12-16 8:58 ` [PATCH v3 2/7] mtd: spi-nor: add the basic data structures Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-17 13:05 ` Marek Vasut
2013-12-17 13:05 ` Marek Vasut
2013-12-17 13:05 ` Marek Vasut
2013-12-17 13:49 ` Huang Shijie
2013-12-17 13:49 ` Huang Shijie
2013-12-17 13:49 ` Huang Shijie
2013-12-17 15:16 ` Marek Vasut
2013-12-17 15:16 ` Marek Vasut
2013-12-17 15:16 ` Marek Vasut
2013-12-17 16:00 ` Huang Shijie
2013-12-17 16:00 ` Huang Shijie
2013-12-17 16:00 ` Huang Shijie
2013-12-16 8:58 ` [PATCH v3 3/7] mtd: spi-nor: add the framework for SPI NOR Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 18:41 ` Sourav Poddar
2013-12-16 18:41 ` Sourav Poddar
2013-12-16 18:41 ` Sourav Poddar
2013-12-17 2:56 ` Huang Shijie
2013-12-17 2:56 ` Huang Shijie
2013-12-17 2:56 ` Huang Shijie
2013-12-17 5:19 ` Sourav Poddar
2013-12-17 5:19 ` Sourav Poddar
2013-12-17 5:19 ` Sourav Poddar
2013-12-17 5:20 ` Huang Shijie
2013-12-17 5:20 ` Huang Shijie
2013-12-17 5:20 ` Huang Shijie
2013-12-17 13:07 ` Marek Vasut
2013-12-17 13:07 ` Marek Vasut
2013-12-17 13:07 ` Marek Vasut
2013-12-16 8:58 ` [PATCH v3 4/7] mtd: m25p80: use the SPI nor framework Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` [PATCH v3 5/7] mtd: spi-nor: add a helper to find the spi_device_id Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` [PATCH v3 6/7] Documentation: add the binding file for Quadspi driver Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-17 13:10 ` Marek Vasut
2013-12-17 13:10 ` Marek Vasut
2013-12-17 13:10 ` Marek Vasut
2013-12-17 13:36 ` thomas.langer
2013-12-17 13:36 ` thomas.langer at lantiq.com
2013-12-17 13:36 ` thomas.langer-th3ZBGNqt+7QT0dZR+AlfA
2013-12-17 15:10 ` Marek Vasut
2013-12-17 15:10 ` Marek Vasut
2013-12-17 15:10 ` Marek Vasut
2013-12-18 15:30 ` Gerhard Sittig
2013-12-18 15:30 ` Gerhard Sittig
2013-12-18 15:30 ` Gerhard Sittig
2013-12-18 16:03 ` Huang Shijie
2013-12-18 16:03 ` Huang Shijie
2013-12-18 16:03 ` Huang Shijie
2013-12-18 18:21 ` Gerhard Sittig
2013-12-18 18:21 ` Gerhard Sittig
2013-12-18 18:21 ` Gerhard Sittig
2013-12-16 8:58 ` [PATCH v3 7/7] mtd: spi-nor: Add Freescale QuadSpi driver Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-16 8:58 ` Huang Shijie
2013-12-17 13:16 ` Marek Vasut [this message]
2013-12-17 13:16 ` Marek Vasut
2013-12-17 13:16 ` Marek Vasut
2013-12-17 14:24 ` Huang Shijie
2013-12-17 14:24 ` Huang Shijie
2013-12-17 14:24 ` Huang Shijie
2013-12-17 4:08 ` [PATCH v3 0/7] mtd: spi-nor: add a new framework for SPI NOR Gupta, Pekon
2013-12-17 4:08 ` Gupta, Pekon
2013-12-17 4:08 ` Gupta, Pekon
2013-12-17 4:02 ` Huang Shijie
2013-12-17 4:02 ` Huang Shijie
2013-12-17 4:02 ` Huang Shijie
2013-12-17 5:00 ` Gupta, Pekon
2013-12-17 5:00 ` Gupta, Pekon
2013-12-17 5:00 ` Gupta, Pekon
2013-12-17 4:57 ` Huang Shijie
2013-12-17 4:57 ` Huang Shijie
2013-12-17 4:57 ` Huang Shijie
2013-12-17 5:45 ` Gupta, Pekon
2013-12-17 5:45 ` Gupta, Pekon
2013-12-17 5:45 ` Gupta, Pekon
2013-12-17 5:26 ` Huang Shijie
2013-12-17 5:26 ` Huang Shijie
2013-12-17 5:26 ` Huang Shijie
2013-12-17 6:07 ` Shawn Guo
2013-12-17 6:07 ` Shawn Guo
2013-12-17 6:07 ` Shawn Guo
2013-12-17 7:17 ` Gupta, Pekon
2013-12-17 7:17 ` Gupta, Pekon
2013-12-17 7:17 ` Gupta, Pekon
2013-12-17 7:17 ` Gupta, Pekon
2013-12-17 7:56 ` Shawn Guo
2013-12-17 7:56 ` Shawn Guo
2013-12-17 7:56 ` Shawn Guo
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