All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] drm/i915: Allow reading the TIMESTAMP register on Gen8.
@ 2014-01-21 22:42 Kenneth Graunke
  2014-01-22  9:48 ` Daniel Vetter
  0 siblings, 1 reply; 2+ messages in thread
From: Kenneth Graunke @ 2014-01-21 22:42 UTC (permalink / raw)
  To: intel-gfx

Nothing's changed here; we just need to bump the generation check.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
---
 drivers/gpu/drm/i915/intel_uncore.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 646fecf..c628414 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -805,7 +805,7 @@ static const struct register_whitelist {
 	uint32_t size;
 	uint32_t gen_bitmask; /* support gens, 0x10 for 4, 0x30 for 4 and 5, etc. */
 } whitelist[] = {
-	{ RING_TIMESTAMP(RENDER_RING_BASE), 8, 0xF0 },
+	{ RING_TIMESTAMP(RENDER_RING_BASE), 8, 0x1F0 },
 };
 
 int i915_reg_read_ioctl(struct drm_device *dev,
-- 
1.8.4.2

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] drm/i915: Allow reading the TIMESTAMP register on Gen8.
  2014-01-21 22:42 [PATCH] drm/i915: Allow reading the TIMESTAMP register on Gen8 Kenneth Graunke
@ 2014-01-22  9:48 ` Daniel Vetter
  0 siblings, 0 replies; 2+ messages in thread
From: Daniel Vetter @ 2014-01-22  9:48 UTC (permalink / raw)
  To: Kenneth Graunke; +Cc: intel-gfx

On Tue, Jan 21, 2014 at 02:42:38PM -0800, Kenneth Graunke wrote:
> Nothing's changed here; we just need to bump the generation check.
> 
> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>

Merged to -fixes to avoid hassles with ABI negotation - 3.14 is the first
officially supported bdw platform anyway.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 646fecf..c628414 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -805,7 +805,7 @@ static const struct register_whitelist {
>  	uint32_t size;
>  	uint32_t gen_bitmask; /* support gens, 0x10 for 4, 0x30 for 4 and 5, etc. */
>  } whitelist[] = {
> -	{ RING_TIMESTAMP(RENDER_RING_BASE), 8, 0xF0 },
> +	{ RING_TIMESTAMP(RENDER_RING_BASE), 8, 0x1F0 },
>  };
>  
>  int i915_reg_read_ioctl(struct drm_device *dev,
> -- 
> 1.8.4.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2014-01-22  9:48 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-01-21 22:42 [PATCH] drm/i915: Allow reading the TIMESTAMP register on Gen8 Kenneth Graunke
2014-01-22  9:48 ` Daniel Vetter

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.