From: christoffer.dall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 02/10] arm64: KVM: allows discrimination of AArch32 sysreg access
Date: Wed, 29 Jan 2014 12:06:47 -0800 [thread overview]
Message-ID: <20140129200647.GE3570@cbox> (raw)
In-Reply-To: <1390402602-22777-3-git-send-email-marc.zyngier@arm.com>
On Wed, Jan 22, 2014 at 02:56:34PM +0000, Marc Zyngier wrote:
> The current handling of AArch32 trapping is slightly less than
> perfect, as it is not possible (from a handler point of view)
> to distinguish it from an AArch64 access, nor to tell a 32bit
> from a 64bit access either.
>
> Fix this by introducing two additional flags:
> - is_aarch32: true if the access was made in AArch32 mode
> - is_32bit: true if is_aarch32 == true and a MCR/MRC instruction
> was used to perform the access (as opposed to MCRR/MRRC).
>
> This allows a handler to cover all the possible conditions in which
> a system register gets trapped.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm64/kvm/sys_regs.c | 5 +++++
> arch/arm64/kvm/sys_regs.h | 2 ++
> 2 files changed, 7 insertions(+)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 02e9d09..f063750 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -437,6 +437,8 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
> u32 hsr = kvm_vcpu_get_hsr(vcpu);
> int Rt2 = (hsr >> 10) & 0xf;
>
> + params.is_aarch32 = true;
> + params.is_32bit = false;
> params.CRm = (hsr >> 1) & 0xf;
> params.Rt = (hsr >> 5) & 0xf;
> params.is_write = ((hsr & 1) == 0);
> @@ -480,6 +482,8 @@ int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
> struct sys_reg_params params;
> u32 hsr = kvm_vcpu_get_hsr(vcpu);
>
> + params.is_aarch32 = true;
> + params.is_32bit = true;
> params.CRm = (hsr >> 1) & 0xf;
> params.Rt = (hsr >> 5) & 0xf;
> params.is_write = ((hsr & 1) == 0);
> @@ -549,6 +553,7 @@ int kvm_handle_sys_reg(struct kvm_vcpu *vcpu, struct kvm_run *run)
> struct sys_reg_params params;
> unsigned long esr = kvm_vcpu_get_hsr(vcpu);
>
> + params.is_aarch32 = false;
I'm wondering if we should set is_32bit = false, just for clarity...
> params.Op0 = (esr >> 20) & 3;
> params.Op1 = (esr >> 14) & 0x7;
> params.CRn = (esr >> 10) & 0xf;
> diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h
> index d50d372..d411e25 100644
> --- a/arch/arm64/kvm/sys_regs.h
> +++ b/arch/arm64/kvm/sys_regs.h
> @@ -30,6 +30,8 @@ struct sys_reg_params {
> u8 Op2;
> u8 Rt;
> bool is_write;
> + bool is_aarch32;
> + bool is_32bit; /* Only valid if is_aarch32 is true */
> };
>
> struct sys_reg_desc {
> --
> 1.8.3.4
>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
WARNING: multiple messages have this Message-ID (diff)
From: Christoffer Dall <christoffer.dall@linaro.org>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH v2 02/10] arm64: KVM: allows discrimination of AArch32 sysreg access
Date: Wed, 29 Jan 2014 12:06:47 -0800 [thread overview]
Message-ID: <20140129200647.GE3570@cbox> (raw)
In-Reply-To: <1390402602-22777-3-git-send-email-marc.zyngier@arm.com>
On Wed, Jan 22, 2014 at 02:56:34PM +0000, Marc Zyngier wrote:
> The current handling of AArch32 trapping is slightly less than
> perfect, as it is not possible (from a handler point of view)
> to distinguish it from an AArch64 access, nor to tell a 32bit
> from a 64bit access either.
>
> Fix this by introducing two additional flags:
> - is_aarch32: true if the access was made in AArch32 mode
> - is_32bit: true if is_aarch32 == true and a MCR/MRC instruction
> was used to perform the access (as opposed to MCRR/MRRC).
>
> This allows a handler to cover all the possible conditions in which
> a system register gets trapped.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm64/kvm/sys_regs.c | 5 +++++
> arch/arm64/kvm/sys_regs.h | 2 ++
> 2 files changed, 7 insertions(+)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 02e9d09..f063750 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -437,6 +437,8 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
> u32 hsr = kvm_vcpu_get_hsr(vcpu);
> int Rt2 = (hsr >> 10) & 0xf;
>
> + params.is_aarch32 = true;
> + params.is_32bit = false;
> params.CRm = (hsr >> 1) & 0xf;
> params.Rt = (hsr >> 5) & 0xf;
> params.is_write = ((hsr & 1) == 0);
> @@ -480,6 +482,8 @@ int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
> struct sys_reg_params params;
> u32 hsr = kvm_vcpu_get_hsr(vcpu);
>
> + params.is_aarch32 = true;
> + params.is_32bit = true;
> params.CRm = (hsr >> 1) & 0xf;
> params.Rt = (hsr >> 5) & 0xf;
> params.is_write = ((hsr & 1) == 0);
> @@ -549,6 +553,7 @@ int kvm_handle_sys_reg(struct kvm_vcpu *vcpu, struct kvm_run *run)
> struct sys_reg_params params;
> unsigned long esr = kvm_vcpu_get_hsr(vcpu);
>
> + params.is_aarch32 = false;
I'm wondering if we should set is_32bit = false, just for clarity...
> params.Op0 = (esr >> 20) & 3;
> params.Op1 = (esr >> 14) & 0x7;
> params.CRn = (esr >> 10) & 0xf;
> diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h
> index d50d372..d411e25 100644
> --- a/arch/arm64/kvm/sys_regs.h
> +++ b/arch/arm64/kvm/sys_regs.h
> @@ -30,6 +30,8 @@ struct sys_reg_params {
> u8 Op2;
> u8 Rt;
> bool is_write;
> + bool is_aarch32;
> + bool is_32bit; /* Only valid if is_aarch32 is true */
> };
>
> struct sys_reg_desc {
> --
> 1.8.3.4
>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
next prev parent reply other threads:[~2014-01-29 20:06 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-22 14:56 [PATCH v2 00/10] arm/arm64: KVM: host cache maintainance when guest caches are off Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-22 14:56 ` [PATCH v2 01/10] arm64: KVM: force cache clean on page fault when " Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:06 ` Christoffer Dall
2014-01-29 20:06 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 02/10] arm64: KVM: allows discrimination of AArch32 sysreg access Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:06 ` Christoffer Dall [this message]
2014-01-29 20:06 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 03/10] arm64: KVM: trap VM system registers until MMU and caches are ON Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 04/10] arm64: KVM: flush VM pages before letting the guest enable caches Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 05/10] ARM: KVM: force cache clean on page fault when caches are off Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 06/10] ARM: KVM: fix handling of trapped 64bit coprocessor accesses Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 07/10] ARM: KVM: fix ordering of " Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 08/10] ARM: KVM: introduce per-vcpu HYP Configuration Register Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:08 ` Christoffer Dall
2014-01-29 20:08 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 09/10] ARM: KVM: trap VM system registers until MMU and caches are ON Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:08 ` Christoffer Dall
2014-01-29 20:08 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 10/10] ARM: KVM: add world-switch for AMAIR{0,1} Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:08 ` Christoffer Dall
2014-01-29 20:08 ` Christoffer Dall
2014-01-28 12:11 ` [PATCH v2 00/10] arm/arm64: KVM: host cache maintainance when guest caches are off Pranavkumar Sawargaonkar
2014-01-28 12:11 ` Pranavkumar Sawargaonkar
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