From: christoffer.dall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 06/10] ARM: KVM: fix handling of trapped 64bit coprocessor accesses
Date: Wed, 29 Jan 2014 12:07:48 -0800 [thread overview]
Message-ID: <20140129200748.GI3570@cbox> (raw)
In-Reply-To: <1390402602-22777-7-git-send-email-marc.zyngier@arm.com>
On Wed, Jan 22, 2014 at 02:56:38PM +0000, Marc Zyngier wrote:
> Commit 240e99cbd00a (ARM: KVM: Fix 64-bit coprocessor handling)
> changed the way we match the 64bit coprocessor access from
> user space, but didn't update the trap handler for the same
> set of registers.
>
> The effect is that a trapped 64bit access is never matched, leading
> to a fault being injected into the guest. This went unnoticed as we
> didn;t really trap any 64bit register so far.
didn't
>
> Placing the CRm field of the access into the CRn field of the matching
> structure fixes the problem. Also update the debug feature to emit the
> expected string in case of failing match.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/kvm/coproc.c | 4 ++--
> arch/arm/kvm/coproc.h | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
> index 78c0885..126c90d 100644
> --- a/arch/arm/kvm/coproc.c
> +++ b/arch/arm/kvm/coproc.c
> @@ -443,7 +443,7 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
> {
> struct coproc_params params;
>
> - params.CRm = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf;
> + params.CRn = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf;
> params.Rt1 = (kvm_vcpu_get_hsr(vcpu) >> 5) & 0xf;
> params.is_write = ((kvm_vcpu_get_hsr(vcpu) & 1) == 0);
> params.is_64bit = true;
> @@ -451,7 +451,7 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
> params.Op1 = (kvm_vcpu_get_hsr(vcpu) >> 16) & 0xf;
> params.Op2 = 0;
> params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
> - params.CRn = 0;
> + params.CRm = 0;
>
> return emulate_cp15(vcpu, ¶ms);
> }
> diff --git a/arch/arm/kvm/coproc.h b/arch/arm/kvm/coproc.h
> index 0461d5c..c5ad7ff 100644
> --- a/arch/arm/kvm/coproc.h
> +++ b/arch/arm/kvm/coproc.h
> @@ -58,8 +58,8 @@ static inline void print_cp_instr(const struct coproc_params *p)
> {
> /* Look, we even formatted it for you to paste into the table! */
> if (p->is_64bit) {
> - kvm_pr_unimpl(" { CRm(%2lu), Op1(%2lu), is64, func_%s },\n",
> - p->CRm, p->Op1, p->is_write ? "write" : "read");
> + kvm_pr_unimpl(" { CRm64(%2lu), Op1(%2lu), is64, func_%s },\n",
> + p->CRn, p->Op1, p->is_write ? "write" : "read");
> } else {
> kvm_pr_unimpl(" { CRn(%2lu), CRm(%2lu), Op1(%2lu), Op2(%2lu), is32,"
> " func_%s },\n",
> --
> 1.8.3.4
>
Thanks for fixing my broken fix!
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
WARNING: multiple messages have this Message-ID (diff)
From: Christoffer Dall <christoffer.dall@linaro.org>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH v2 06/10] ARM: KVM: fix handling of trapped 64bit coprocessor accesses
Date: Wed, 29 Jan 2014 12:07:48 -0800 [thread overview]
Message-ID: <20140129200748.GI3570@cbox> (raw)
In-Reply-To: <1390402602-22777-7-git-send-email-marc.zyngier@arm.com>
On Wed, Jan 22, 2014 at 02:56:38PM +0000, Marc Zyngier wrote:
> Commit 240e99cbd00a (ARM: KVM: Fix 64-bit coprocessor handling)
> changed the way we match the 64bit coprocessor access from
> user space, but didn't update the trap handler for the same
> set of registers.
>
> The effect is that a trapped 64bit access is never matched, leading
> to a fault being injected into the guest. This went unnoticed as we
> didn;t really trap any 64bit register so far.
didn't
>
> Placing the CRm field of the access into the CRn field of the matching
> structure fixes the problem. Also update the debug feature to emit the
> expected string in case of failing match.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/kvm/coproc.c | 4 ++--
> arch/arm/kvm/coproc.h | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
> index 78c0885..126c90d 100644
> --- a/arch/arm/kvm/coproc.c
> +++ b/arch/arm/kvm/coproc.c
> @@ -443,7 +443,7 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
> {
> struct coproc_params params;
>
> - params.CRm = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf;
> + params.CRn = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf;
> params.Rt1 = (kvm_vcpu_get_hsr(vcpu) >> 5) & 0xf;
> params.is_write = ((kvm_vcpu_get_hsr(vcpu) & 1) == 0);
> params.is_64bit = true;
> @@ -451,7 +451,7 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
> params.Op1 = (kvm_vcpu_get_hsr(vcpu) >> 16) & 0xf;
> params.Op2 = 0;
> params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
> - params.CRn = 0;
> + params.CRm = 0;
>
> return emulate_cp15(vcpu, ¶ms);
> }
> diff --git a/arch/arm/kvm/coproc.h b/arch/arm/kvm/coproc.h
> index 0461d5c..c5ad7ff 100644
> --- a/arch/arm/kvm/coproc.h
> +++ b/arch/arm/kvm/coproc.h
> @@ -58,8 +58,8 @@ static inline void print_cp_instr(const struct coproc_params *p)
> {
> /* Look, we even formatted it for you to paste into the table! */
> if (p->is_64bit) {
> - kvm_pr_unimpl(" { CRm(%2lu), Op1(%2lu), is64, func_%s },\n",
> - p->CRm, p->Op1, p->is_write ? "write" : "read");
> + kvm_pr_unimpl(" { CRm64(%2lu), Op1(%2lu), is64, func_%s },\n",
> + p->CRn, p->Op1, p->is_write ? "write" : "read");
> } else {
> kvm_pr_unimpl(" { CRn(%2lu), CRm(%2lu), Op1(%2lu), Op2(%2lu), is32,"
> " func_%s },\n",
> --
> 1.8.3.4
>
Thanks for fixing my broken fix!
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
next prev parent reply other threads:[~2014-01-29 20:07 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-22 14:56 [PATCH v2 00/10] arm/arm64: KVM: host cache maintainance when guest caches are off Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-22 14:56 ` [PATCH v2 01/10] arm64: KVM: force cache clean on page fault when " Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:06 ` Christoffer Dall
2014-01-29 20:06 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 02/10] arm64: KVM: allows discrimination of AArch32 sysreg access Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:06 ` Christoffer Dall
2014-01-29 20:06 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 03/10] arm64: KVM: trap VM system registers until MMU and caches are ON Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 04/10] arm64: KVM: flush VM pages before letting the guest enable caches Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 05/10] ARM: KVM: force cache clean on page fault when caches are off Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 06/10] ARM: KVM: fix handling of trapped 64bit coprocessor accesses Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall [this message]
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 07/10] ARM: KVM: fix ordering of " Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:07 ` Christoffer Dall
2014-01-29 20:07 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 08/10] ARM: KVM: introduce per-vcpu HYP Configuration Register Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:08 ` Christoffer Dall
2014-01-29 20:08 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 09/10] ARM: KVM: trap VM system registers until MMU and caches are ON Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:08 ` Christoffer Dall
2014-01-29 20:08 ` Christoffer Dall
2014-01-22 14:56 ` [PATCH v2 10/10] ARM: KVM: add world-switch for AMAIR{0,1} Marc Zyngier
2014-01-22 14:56 ` Marc Zyngier
2014-01-29 20:08 ` Christoffer Dall
2014-01-29 20:08 ` Christoffer Dall
2014-01-28 12:11 ` [PATCH v2 00/10] arm/arm64: KVM: host cache maintainance when guest caches are off Pranavkumar Sawargaonkar
2014-01-28 12:11 ` Pranavkumar Sawargaonkar
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