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From: Vinod Koul <vinod.koul@intel.com>
To: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: davinci-linux-open-source@linux.davincidsp.com,
	Lars-Peter Clausen <lars@metafoo.de>,
	joelf@ti.com, Sekhar Nori <nsekhar@ti.com>,
	linux-kernel@vger.kernel.org, mporter@linaro.org,
	Liam Girdwood <lgirdwood@gmail.com>, Takashi Iwai <tiwai@suse.de>,
	Mark Brown <broonie@kernel.org>,
	dmaengine@vger.kernel.org, dan.j.williams@intel.com,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 05/14] arm: common: edma: Select event queue 1 as default when booted with DT
Date: Fri, 11 Apr 2014 18:16:41 +0530	[thread overview]
Message-ID: <20140411124641.GC32284@intel.com> (raw)
In-Reply-To: <5347DEDA.2060008@ti.com>

On Fri, Apr 11, 2014 at 03:23:54PM +0300, Peter Ujfalusi wrote:
> On 04/11/2014 02:31 PM, Vinod Koul wrote:
> 
> >> I would say that it is channel based config. I don't see the reason why would
> >> one mix different priorities on a configured channel between descriptors.
> >>
> >>> If not then we can add this in dma_slave_config ?
> >>
> >> So adding to the struct for example:
> >> bool high_priority;
> > 
> > In designware controller, we can have channel priorties from 0 to 7 which IIRC 7
> > being highest. So bool wont work. unsigned int/u8 would be good.
> 
> I see. But from a generic code what number should one pass if we want to get
> the highest priority? With eDMA3 we essentially have three levels (see later)
> so if we receive 7 as priority what shall we do? Just treat as highest? But if
> we receive 4, which is somewhere in the middle for designware it is still
> means highest for us.
> 
> I see this too small step partitioning in common code a bit problematic when
> it comes to how to interpret the 'magic numbers'.
> Also how all the driver in the system will decide the priority number? I'm
> sure they will pick something conveniently average for themselves and I
> imagine audio would try to pick something which is bigger than the numbers
> others have taken...
> 
> > How about your controller, is it binary?
> 
> We also have priority from 0 to 7, 0 being the highest priority. We have 3
> Transfer Controllers/Event Queues and we can set the priority for the TC/EQ
> and assign the given channel to the desired TC/EQ.
> So in reality we have 3 priorities to choose from in my view since we only
> have 3 TC/EQ in eDMA3 (of AM335x/AM447x) on other SoCs we can have different
> number of TC/EQ.

I think the number shouldn't be viewed in absolute terms. If we decide that (lets
say) 0-7, then any controller should map 0 to lowest and 7 to highest.

For your case you can do this and then intermediate numbers would be medium
priority. Such a system might work well...

Also how would a client driver know which priority to use? Would it come from
DT?

-- 
~Vinod

WARNING: multiple messages have this Message-ID (diff)
From: vinod.koul@intel.com (Vinod Koul)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 05/14] arm: common: edma: Select event queue 1 as default when booted with DT
Date: Fri, 11 Apr 2014 18:16:41 +0530	[thread overview]
Message-ID: <20140411124641.GC32284@intel.com> (raw)
In-Reply-To: <5347DEDA.2060008@ti.com>

On Fri, Apr 11, 2014 at 03:23:54PM +0300, Peter Ujfalusi wrote:
> On 04/11/2014 02:31 PM, Vinod Koul wrote:
> 
> >> I would say that it is channel based config. I don't see the reason why would
> >> one mix different priorities on a configured channel between descriptors.
> >>
> >>> If not then we can add this in dma_slave_config ?
> >>
> >> So adding to the struct for example:
> >> bool high_priority;
> > 
> > In designware controller, we can have channel priorties from 0 to 7 which IIRC 7
> > being highest. So bool wont work. unsigned int/u8 would be good.
> 
> I see. But from a generic code what number should one pass if we want to get
> the highest priority? With eDMA3 we essentially have three levels (see later)
> so if we receive 7 as priority what shall we do? Just treat as highest? But if
> we receive 4, which is somewhere in the middle for designware it is still
> means highest for us.
> 
> I see this too small step partitioning in common code a bit problematic when
> it comes to how to interpret the 'magic numbers'.
> Also how all the driver in the system will decide the priority number? I'm
> sure they will pick something conveniently average for themselves and I
> imagine audio would try to pick something which is bigger than the numbers
> others have taken...
> 
> > How about your controller, is it binary?
> 
> We also have priority from 0 to 7, 0 being the highest priority. We have 3
> Transfer Controllers/Event Queues and we can set the priority for the TC/EQ
> and assign the given channel to the desired TC/EQ.
> So in reality we have 3 priorities to choose from in my view since we only
> have 3 TC/EQ in eDMA3 (of AM335x/AM447x) on other SoCs we can have different
> number of TC/EQ.

I think the number shouldn't be viewed in absolute terms. If we decide that (lets
say) 0-7, then any controller should map 0 to lowest and 7 to highest.

For your case you can do this and then intermediate numbers would be medium
priority. Such a system might work well...

Also how would a client driver know which priority to use? Would it come from
DT?

-- 
~Vinod

WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vinod.koul@intel.com>
To: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>,
	dan.j.williams@intel.com, dmaengine@vger.kernel.org,
	linux-kernel@vger.kernel.org, joelf@ti.com,
	linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org,
	davinci-linux-open-source@linux.davincidsp.com,
	mporter@linaro.org, Mark Brown <broonie@kernel.org>,
	Lars-Peter Clausen <lars@metafoo.de>,
	Liam Girdwood <lgirdwood@gmail.com>, Takashi Iwai <tiwai@suse.de>
Subject: Re: [PATCH v2 05/14] arm: common: edma: Select event queue 1 as default when booted with DT
Date: Fri, 11 Apr 2014 18:16:41 +0530	[thread overview]
Message-ID: <20140411124641.GC32284@intel.com> (raw)
In-Reply-To: <5347DEDA.2060008@ti.com>

On Fri, Apr 11, 2014 at 03:23:54PM +0300, Peter Ujfalusi wrote:
> On 04/11/2014 02:31 PM, Vinod Koul wrote:
> 
> >> I would say that it is channel based config. I don't see the reason why would
> >> one mix different priorities on a configured channel between descriptors.
> >>
> >>> If not then we can add this in dma_slave_config ?
> >>
> >> So adding to the struct for example:
> >> bool high_priority;
> > 
> > In designware controller, we can have channel priorties from 0 to 7 which IIRC 7
> > being highest. So bool wont work. unsigned int/u8 would be good.
> 
> I see. But from a generic code what number should one pass if we want to get
> the highest priority? With eDMA3 we essentially have three levels (see later)
> so if we receive 7 as priority what shall we do? Just treat as highest? But if
> we receive 4, which is somewhere in the middle for designware it is still
> means highest for us.
> 
> I see this too small step partitioning in common code a bit problematic when
> it comes to how to interpret the 'magic numbers'.
> Also how all the driver in the system will decide the priority number? I'm
> sure they will pick something conveniently average for themselves and I
> imagine audio would try to pick something which is bigger than the numbers
> others have taken...
> 
> > How about your controller, is it binary?
> 
> We also have priority from 0 to 7, 0 being the highest priority. We have 3
> Transfer Controllers/Event Queues and we can set the priority for the TC/EQ
> and assign the given channel to the desired TC/EQ.
> So in reality we have 3 priorities to choose from in my view since we only
> have 3 TC/EQ in eDMA3 (of AM335x/AM447x) on other SoCs we can have different
> number of TC/EQ.

I think the number shouldn't be viewed in absolute terms. If we decide that (lets
say) 0-7, then any controller should map 0 to lowest and 7 to highest.

For your case you can do this and then intermediate numbers would be medium
priority. Such a system might work well...

Also how would a client driver know which priority to use? Would it come from
DT?

-- 
~Vinod

  reply	other threads:[~2014-04-11 12:46 UTC|newest]

Thread overview: 132+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-01 13:06 [PATCH v2 00/14] dma: edma: Fixes for cyclic (audio) operation Peter Ujfalusi
2014-04-01 13:06 ` Peter Ujfalusi
2014-04-01 13:06 ` Peter Ujfalusi
2014-04-01 13:06 ` [PATCH v2 02/14] dma: edma: Correct the handling of src/dst_maxburst == 0 Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06 ` [PATCH v2 04/14] dma: edma: Set DMA_CYCLIC capability flag Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06 ` [PATCH v2 05/14] arm: common: edma: Select event queue 1 as default when booted with DT Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
     [not found]   ` <1396357575-30585-6-git-send-email-peter.ujfalusi-l0cyMroinI0@public.gmane.org>
2014-04-10 16:23     ` Joel Fernandes
2014-04-10 16:23       ` Joel Fernandes
2014-04-10 16:23       ` Joel Fernandes
2014-04-11  8:17     ` Sekhar Nori
2014-04-11  8:17       ` Sekhar Nori
2014-04-11  8:17       ` Sekhar Nori
     [not found]       ` <5347A4FD.1030803-l0cyMroinI0@public.gmane.org>
2014-04-11  8:50         ` Peter Ujfalusi
2014-04-11  8:50           ` Peter Ujfalusi
2014-04-11  8:50           ` Peter Ujfalusi
     [not found]           ` <5347ACDE.7040407-l0cyMroinI0@public.gmane.org>
2014-04-11  8:56             ` Sekhar Nori
2014-04-11  8:56               ` Sekhar Nori
2014-04-11  8:56               ` Sekhar Nori
     [not found]               ` <5347AE49.5020109-l0cyMroinI0@public.gmane.org>
2014-04-11  9:38                 ` Peter Ujfalusi
2014-04-11  9:38                   ` Peter Ujfalusi
2014-04-11  9:38                   ` Peter Ujfalusi
2014-04-11  9:42                   ` Vinod Koul
2014-04-11  9:42                     ` Vinod Koul
2014-04-11  9:42                     ` Vinod Koul
     [not found]                     ` <20140411094217.GA32284-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2014-04-11 10:19                       ` Sekhar Nori
2014-04-11 10:19                         ` Sekhar Nori
2014-04-11 10:19                         ` Sekhar Nori
2014-04-11 11:32                       ` Peter Ujfalusi
2014-04-11 11:32                         ` Peter Ujfalusi
2014-04-11 11:32                         ` Peter Ujfalusi
2014-04-11 11:31                         ` Vinod Koul
2014-04-11 11:31                           ` Vinod Koul
     [not found]                           ` <20140411113154.GB32284-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2014-04-11 12:23                             ` Peter Ujfalusi
2014-04-11 12:23                               ` Peter Ujfalusi
2014-04-11 12:23                               ` Peter Ujfalusi
2014-04-11 12:46                               ` Vinod Koul [this message]
2014-04-11 12:46                                 ` Vinod Koul
2014-04-11 12:46                                 ` Vinod Koul
     [not found]                                 ` <20140411124641.GC32284-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2014-04-14 11:56                                   ` Peter Ujfalusi
2014-04-14 11:56                                     ` Peter Ujfalusi
2014-04-14 11:56                                     ` Peter Ujfalusi
     [not found]                                     ` <534BCCD3.9060805-l0cyMroinI0@public.gmane.org>
2014-04-14 12:12                                       ` Sekhar Nori
2014-04-14 12:12                                         ` Sekhar Nori
2014-04-14 12:12                                         ` Sekhar Nori
     [not found]                                         ` <534BD0B5.5000004-l0cyMroinI0@public.gmane.org>
2014-04-14 12:41                                           ` Peter Ujfalusi
2014-04-14 12:41                                             ` Peter Ujfalusi
2014-04-14 12:41                                             ` Peter Ujfalusi
     [not found]                                             ` <534BD788.3050406-l0cyMroinI0@public.gmane.org>
2014-04-14 14:32                                               ` Sekhar Nori
2014-04-14 14:32                                                 ` Sekhar Nori
2014-04-14 14:32                                                 ` Sekhar Nori
     [not found]                                                 ` <534BF181.6060503-l0cyMroinI0@public.gmane.org>
2014-04-16 12:59                                                   ` Peter Ujfalusi
2014-04-16 12:59                                                     ` Peter Ujfalusi
2014-04-16 12:59                                                     ` Peter Ujfalusi
     [not found]                                                     ` <534E7EB0.9000601-l0cyMroinI0@public.gmane.org>
2014-04-16 16:05                                                       ` Joel Fernandes
2014-04-16 16:05                                                         ` Joel Fernandes
2014-04-16 16:05                                                         ` Joel Fernandes
     [not found]                                                         ` <534EAA49.7030702-l0cyMroinI0@public.gmane.org>
2014-04-24  9:07                                                           ` Peter Ujfalusi
2014-04-24  9:07                                                             ` Peter Ujfalusi
2014-04-24  9:07                                                             ` Peter Ujfalusi
2014-04-11 20:16                       ` Joel Fernandes
2014-04-11 20:16                         ` Joel Fernandes
2014-04-11 20:16                         ` Joel Fernandes
     [not found] ` <1396357575-30585-1-git-send-email-peter.ujfalusi-l0cyMroinI0@public.gmane.org>
2014-04-01 13:06   ` [PATCH v2 01/14] platform_data: edma: Be precise with the paRAM struct Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06   ` [PATCH v2 03/14] dma: edma: Add support for DMA_PAUSE/RESUME operation Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-11 16:43     ` Vinod Koul
2014-04-11 16:43       ` Vinod Koul
     [not found]       ` <20140411164327.GD32284-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2014-04-11 20:51         ` Joel Fernandes
2014-04-11 20:51           ` Joel Fernandes
2014-04-11 20:51           ` Joel Fernandes
2014-04-01 13:06   ` [PATCH v2 06/14] arm: common: edma: Save the number of event queues/TCs Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06   ` [PATCH v2 07/14] arm: common: edma: API to request non default queue for a channel Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-11  8:43     ` Sekhar Nori
2014-04-11  8:43       ` Sekhar Nori
2014-04-11  8:43       ` Sekhar Nori
2014-04-01 13:06   ` [PATCH v2 08/14] DMA: edma: Use different eventq for cyclic channels Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
     [not found]     ` <1396357575-30585-9-git-send-email-peter.ujfalusi-l0cyMroinI0@public.gmane.org>
2014-04-10 16:36       ` Joel Fernandes
2014-04-10 16:36         ` Joel Fernandes
2014-04-10 16:36         ` Joel Fernandes
     [not found]         ` <5346C88E.8010504-l0cyMroinI0@public.gmane.org>
2014-04-11 16:47           ` Vinod Koul
2014-04-11 16:47             ` Vinod Koul
2014-04-11 16:47             ` Vinod Koul
     [not found]             ` <20140411164755.GE32284-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2014-04-11 20:56               ` Joel Fernandes
2014-04-11 20:56                 ` Joel Fernandes
2014-04-11 20:56                 ` Joel Fernandes
2014-04-01 13:06   ` [PATCH v2 09/14] dma: edma: Implement device_slave_caps callback Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06   ` [PATCH v2 10/14] dma: edma: Simplify direction configuration in edma_config_pset() Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-01 13:06     ` Peter Ujfalusi
2014-04-10 22:40     ` Joel Fernandes
2014-04-10 22:40       ` Joel Fernandes
2014-04-10 22:40       ` Joel Fernandes
     [not found]       ` <53471DC5.4090001-l0cyMroinI0@public.gmane.org>
2014-04-11  6:39         ` Peter Ujfalusi
2014-04-11  6:39           ` Peter Ujfalusi
2014-04-11  6:39           ` Peter Ujfalusi
     [not found]           ` <53478E0E.8040709-l0cyMroinI0@public.gmane.org>
2014-04-11 19:57             ` Joel Fernandes
2014-04-11 19:57               ` Joel Fernandes
2014-04-11 19:57               ` Joel Fernandes
2014-04-10 22:52   ` [PATCH v2 00/14] dma: edma: Fixes for cyclic (audio) operation Joel Fernandes
2014-04-10 22:52     ` Joel Fernandes
2014-04-10 22:52     ` Joel Fernandes
2014-04-01 13:06 ` [PATCH v2 11/14] dma: edma: Reduce debug print verbosity for non verbose debugging Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06 ` [PATCH v2 12/14] dma: edma: Prefix debug prints where the text were identical in prep callbacks Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06 ` [PATCH v2 13/14] dma: edma: Add channel number to debug prints Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06 ` [PATCH v2 14/14] dma: edma: Print the direction value as well when it is not supported Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-01 13:06   ` Peter Ujfalusi
2014-04-11 16:52 ` [PATCH v2 00/14] dma: edma: Fixes for cyclic (audio) operation Vinod Koul
2014-04-11 16:52   ` Vinod Koul

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