From: Brian Norris <computersforpeace@gmail.com>
To: Boris BREZILLON <boris.brezillon@free-electrons.com>
Cc: devicetree@vger.kernel.org,
Boris BREZILLON <b.brezillon.dev@gmail.com>,
kernel@stlinux.com, linux-kernel@vger.kernel.org,
Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
linux-mtd@lists.infradead.org, "Gupta, Pekon\"" <pekon@ti.com>,
Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
Lee Jones <lee.jones@linaro.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] mtd: nand: stm_nand_bch: add new driver
Date: Mon, 7 Jul 2014 16:52:22 -0700 [thread overview]
Message-ID: <20140707235222.GC7537@ld-irv-0074> (raw)
In-Reply-To: <20140703100522.756f9715@bbrezillon>
Hi Boris,
On Thu, Jul 03, 2014 at 10:05:22AM +0200, Boris BREZILLON wrote:
> On Wed, 2 Jul 2014 17:22:37 -0700 Brian Norris <computersforpeace@gmail.com> wrote:
> > On Wed, May 28, 2014 at 10:20:05AM +0100, Lee Jones wrote:
> > > +
> > > + nand_timing0: nand-timing {
> > > + sig-setup = <10>;
> > > + sig-hold = <10>;
> > > + CE-deassert = <0>;
> > > + WE-to-RBn = <100>;
> > > + wr-on = <10>;
> > > + wr-off = <30>;
> > > + rd-on = <10>;
> > > + rd-off = <30>;
> > > + chip-delay = <30>; /* delay in us */
> > > + };
> >
> > You didn't document any of this node. And I don't think we want to
> > specify every single timing parameter in DT; it may make sense to use
> > Boris Brezillon's approach (I note this further down, in the driver
> > code) for mapping non-ONFI NAND timings into a compatible ONFI timing
> > mode. This will greatly simplify the bindings needed, since it's
> > standardized and auto-detectable in many cases.
>
>
> AFAIR, the NAND timing representation for non-ONFI chips question was
> left unanswered:
>
> https://lkml.org/lkml/2014/5/20/581
>
> I can definitely respin my NAND timings series, but I'd like to be sure
> this is how you want it done before doing so.
Can we start by supporting ONFI-only (or ONFI-only, plus entries in
nand_flash_ids[]), and have nand_base provide the translation so drivers
can retrieve the info? Then we can begin supporting new drivers like
Lee's, and worry about the DT question separately.
BTW, Lee: you're completely missing the definitions for
'struct nand_sdr_timings' in this patch, so it doesn't compile.
> Just as a reminder, you and Jason thought NAND timings for non-ONFI
> chips could be auto detected thanks to READID informations (by storing
> some sort of "NANDID <-> timings" association table).
Yes, thanks for the reminder. I knew there was more than one reason I
was wary of Lee's patch (first, that it was duplication of another patch
set; and second, than I'm not sure it belongs in DT at all).
I think we should attempt to solve this without any need for DT
bindings, as most other parameters are auto-detectable in some sense
(even if we have to store some NANDID <-> timings tables). I think going
forward, we can expect that new NAND will use a JEDEC or ONFI spec, and
that we shouldn't have to scale nand_flash_ids[] to include too many
flash chip timings.
Brian
WARNING: multiple messages have this Message-ID (diff)
From: computersforpeace@gmail.com (Brian Norris)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] mtd: nand: stm_nand_bch: add new driver
Date: Mon, 7 Jul 2014 16:52:22 -0700 [thread overview]
Message-ID: <20140707235222.GC7537@ld-irv-0074> (raw)
In-Reply-To: <20140703100522.756f9715@bbrezillon>
Hi Boris,
On Thu, Jul 03, 2014 at 10:05:22AM +0200, Boris BREZILLON wrote:
> On Wed, 2 Jul 2014 17:22:37 -0700 Brian Norris <computersforpeace@gmail.com> wrote:
> > On Wed, May 28, 2014 at 10:20:05AM +0100, Lee Jones wrote:
> > > +
> > > + nand_timing0: nand-timing {
> > > + sig-setup = <10>;
> > > + sig-hold = <10>;
> > > + CE-deassert = <0>;
> > > + WE-to-RBn = <100>;
> > > + wr-on = <10>;
> > > + wr-off = <30>;
> > > + rd-on = <10>;
> > > + rd-off = <30>;
> > > + chip-delay = <30>; /* delay in us */
> > > + };
> >
> > You didn't document any of this node. And I don't think we want to
> > specify every single timing parameter in DT; it may make sense to use
> > Boris Brezillon's approach (I note this further down, in the driver
> > code) for mapping non-ONFI NAND timings into a compatible ONFI timing
> > mode. This will greatly simplify the bindings needed, since it's
> > standardized and auto-detectable in many cases.
>
>
> AFAIR, the NAND timing representation for non-ONFI chips question was
> left unanswered:
>
> https://lkml.org/lkml/2014/5/20/581
>
> I can definitely respin my NAND timings series, but I'd like to be sure
> this is how you want it done before doing so.
Can we start by supporting ONFI-only (or ONFI-only, plus entries in
nand_flash_ids[]), and have nand_base provide the translation so drivers
can retrieve the info? Then we can begin supporting new drivers like
Lee's, and worry about the DT question separately.
BTW, Lee: you're completely missing the definitions for
'struct nand_sdr_timings' in this patch, so it doesn't compile.
> Just as a reminder, you and Jason thought NAND timings for non-ONFI
> chips could be auto detected thanks to READID informations (by storing
> some sort of "NANDID <-> timings" association table).
Yes, thanks for the reminder. I knew there was more than one reason I
was wary of Lee's patch (first, that it was duplication of another patch
set; and second, than I'm not sure it belongs in DT at all).
I think we should attempt to solve this without any need for DT
bindings, as most other parameters are auto-detectable in some sense
(even if we have to store some NANDID <-> timings tables). I think going
forward, we can expect that new NAND will use a JEDEC or ONFI spec, and
that we shouldn't have to scale nand_flash_ids[] to include too many
flash chip timings.
Brian
WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Boris BREZILLON
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Boris BREZILLON
<b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
"Gupta, Pekon\"" <pekon-l0cyMroinI0@public.gmane.org>,
Ezequiel Garcia
<ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Jason Gunthorpe
<jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>
Subject: Re: [PATCH] mtd: nand: stm_nand_bch: add new driver
Date: Mon, 7 Jul 2014 16:52:22 -0700 [thread overview]
Message-ID: <20140707235222.GC7537@ld-irv-0074> (raw)
In-Reply-To: <20140703100522.756f9715@bbrezillon>
Hi Boris,
On Thu, Jul 03, 2014 at 10:05:22AM +0200, Boris BREZILLON wrote:
> On Wed, 2 Jul 2014 17:22:37 -0700 Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> > On Wed, May 28, 2014 at 10:20:05AM +0100, Lee Jones wrote:
> > > +
> > > + nand_timing0: nand-timing {
> > > + sig-setup = <10>;
> > > + sig-hold = <10>;
> > > + CE-deassert = <0>;
> > > + WE-to-RBn = <100>;
> > > + wr-on = <10>;
> > > + wr-off = <30>;
> > > + rd-on = <10>;
> > > + rd-off = <30>;
> > > + chip-delay = <30>; /* delay in us */
> > > + };
> >
> > You didn't document any of this node. And I don't think we want to
> > specify every single timing parameter in DT; it may make sense to use
> > Boris Brezillon's approach (I note this further down, in the driver
> > code) for mapping non-ONFI NAND timings into a compatible ONFI timing
> > mode. This will greatly simplify the bindings needed, since it's
> > standardized and auto-detectable in many cases.
>
>
> AFAIR, the NAND timing representation for non-ONFI chips question was
> left unanswered:
>
> https://lkml.org/lkml/2014/5/20/581
>
> I can definitely respin my NAND timings series, but I'd like to be sure
> this is how you want it done before doing so.
Can we start by supporting ONFI-only (or ONFI-only, plus entries in
nand_flash_ids[]), and have nand_base provide the translation so drivers
can retrieve the info? Then we can begin supporting new drivers like
Lee's, and worry about the DT question separately.
BTW, Lee: you're completely missing the definitions for
'struct nand_sdr_timings' in this patch, so it doesn't compile.
> Just as a reminder, you and Jason thought NAND timings for non-ONFI
> chips could be auto detected thanks to READID informations (by storing
> some sort of "NANDID <-> timings" association table).
Yes, thanks for the reminder. I knew there was more than one reason I
was wary of Lee's patch (first, that it was duplication of another patch
set; and second, than I'm not sure it belongs in DT at all).
I think we should attempt to solve this without any need for DT
bindings, as most other parameters are auto-detectable in some sense
(even if we have to store some NANDID <-> timings tables). I think going
forward, we can expect that new NAND will use a JEDEC or ONFI spec, and
that we shouldn't have to scale nand_flash_ids[] to include too many
flash chip timings.
Brian
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WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <computersforpeace@gmail.com>
To: Boris BREZILLON <boris.brezillon@free-electrons.com>
Cc: Lee Jones <lee.jones@linaro.org>,
devicetree@vger.kernel.org,
Boris BREZILLON <b.brezillon.dev@gmail.com>,
kernel@stlinux.com, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org, "Gupta, Pekon\"" <pekon@ti.com>,
Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
linux-arm-kernel@lists.infradead.org,
Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Subject: Re: [PATCH] mtd: nand: stm_nand_bch: add new driver
Date: Mon, 7 Jul 2014 16:52:22 -0700 [thread overview]
Message-ID: <20140707235222.GC7537@ld-irv-0074> (raw)
In-Reply-To: <20140703100522.756f9715@bbrezillon>
Hi Boris,
On Thu, Jul 03, 2014 at 10:05:22AM +0200, Boris BREZILLON wrote:
> On Wed, 2 Jul 2014 17:22:37 -0700 Brian Norris <computersforpeace@gmail.com> wrote:
> > On Wed, May 28, 2014 at 10:20:05AM +0100, Lee Jones wrote:
> > > +
> > > + nand_timing0: nand-timing {
> > > + sig-setup = <10>;
> > > + sig-hold = <10>;
> > > + CE-deassert = <0>;
> > > + WE-to-RBn = <100>;
> > > + wr-on = <10>;
> > > + wr-off = <30>;
> > > + rd-on = <10>;
> > > + rd-off = <30>;
> > > + chip-delay = <30>; /* delay in us */
> > > + };
> >
> > You didn't document any of this node. And I don't think we want to
> > specify every single timing parameter in DT; it may make sense to use
> > Boris Brezillon's approach (I note this further down, in the driver
> > code) for mapping non-ONFI NAND timings into a compatible ONFI timing
> > mode. This will greatly simplify the bindings needed, since it's
> > standardized and auto-detectable in many cases.
>
>
> AFAIR, the NAND timing representation for non-ONFI chips question was
> left unanswered:
>
> https://lkml.org/lkml/2014/5/20/581
>
> I can definitely respin my NAND timings series, but I'd like to be sure
> this is how you want it done before doing so.
Can we start by supporting ONFI-only (or ONFI-only, plus entries in
nand_flash_ids[]), and have nand_base provide the translation so drivers
can retrieve the info? Then we can begin supporting new drivers like
Lee's, and worry about the DT question separately.
BTW, Lee: you're completely missing the definitions for
'struct nand_sdr_timings' in this patch, so it doesn't compile.
> Just as a reminder, you and Jason thought NAND timings for non-ONFI
> chips could be auto detected thanks to READID informations (by storing
> some sort of "NANDID <-> timings" association table).
Yes, thanks for the reminder. I knew there was more than one reason I
was wary of Lee's patch (first, that it was duplication of another patch
set; and second, than I'm not sure it belongs in DT at all).
I think we should attempt to solve this without any need for DT
bindings, as most other parameters are auto-detectable in some sense
(even if we have to store some NANDID <-> timings tables). I think going
forward, we can expect that new NAND will use a JEDEC or ONFI spec, and
that we shouldn't have to scale nand_flash_ids[] to include too many
flash chip timings.
Brian
next prev parent reply other threads:[~2014-07-07 23:52 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-28 9:20 [PATCH] mtd: nand: stm_nand_bch: add new driver Lee Jones
2014-05-28 9:20 ` Lee Jones
2014-05-28 9:20 ` Lee Jones
2014-07-03 0:22 ` Brian Norris
2014-07-03 0:22 ` Brian Norris
2014-07-03 0:22 ` Brian Norris
2014-07-03 8:05 ` Boris BREZILLON
2014-07-03 8:05 ` Boris BREZILLON
2014-07-03 8:05 ` Boris BREZILLON
2014-07-07 23:52 ` Brian Norris [this message]
2014-07-07 23:52 ` Brian Norris
2014-07-07 23:52 ` Brian Norris
2014-07-07 23:52 ` Brian Norris
2014-07-08 7:58 ` Boris BREZILLON
2014-07-08 7:58 ` Boris BREZILLON
2014-07-08 7:58 ` Boris BREZILLON
2014-07-09 17:22 ` Brian Norris
2014-07-09 17:22 ` Brian Norris
2014-07-09 17:22 ` Brian Norris
2014-07-09 17:22 ` Brian Norris
2014-07-03 9:09 ` Gupta, Pekon
2014-07-03 9:09 ` Gupta, Pekon
2014-07-03 9:09 ` Gupta, Pekon
2014-07-08 0:16 ` Brian Norris
2014-07-08 0:16 ` Brian Norris
2014-07-08 0:16 ` Brian Norris
2014-08-05 14:23 ` Lee Jones
2014-08-05 14:23 ` Lee Jones
2014-08-05 14:23 ` Lee Jones
2014-08-05 14:23 ` Lee Jones
2014-08-05 21:02 ` pekon
2014-08-05 21:02 ` pekon
2014-08-05 21:02 ` pekon at pek-sem.com
2014-08-19 2:12 ` Brian Norris
2014-08-19 2:12 ` Brian Norris
2014-08-19 2:12 ` Brian Norris
2014-08-19 2:12 ` Brian Norris
2014-08-20 18:02 ` pekon
2014-08-20 18:02 ` pekon
2014-08-20 18:02 ` pekon
2014-07-31 16:47 ` Lee Jones
2014-07-31 16:47 ` Lee Jones
2014-07-31 16:47 ` Lee Jones
2014-07-31 17:54 ` Brian Norris
2014-07-31 17:54 ` Brian Norris
2014-07-31 17:54 ` Brian Norris
2014-07-31 17:54 ` Brian Norris
2014-08-01 9:27 ` Lee Jones
2014-08-01 9:27 ` Lee Jones
2014-08-01 9:27 ` Lee Jones
2014-08-19 2:42 ` Brian Norris
2014-08-19 2:42 ` Brian Norris
2014-08-19 2:42 ` Brian Norris
2014-08-19 2:42 ` Brian Norris
2014-08-06 10:44 ` Lee Jones
2014-08-06 10:44 ` Lee Jones
2014-08-06 10:44 ` Lee Jones
2014-08-06 10:26 ` Lee Jones
2014-08-06 10:26 ` Lee Jones
2014-08-06 10:26 ` Lee Jones
2014-07-03 0:50 ` Brian Norris
2014-07-03 0:50 ` Brian Norris
2014-07-03 0:50 ` Brian Norris
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