* [PATCH 0/7] mtd: denali: A collection of trivial coding style fixes
@ 2014-09-08 8:10 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Masahiro Yamada, Rashika Kheria, linux-kernel, Brian Norris,
Huang Shijie, Jiri Kosina, David Woodhouse, grmoore@altera.com,
Josh Triplett
Masahiro Yamada (7):
mtd: denali: fix the format of comment blocks
mtd: denali: remove unnecessary variable initializations
mtd: denali: remove unnecessary casts
mtd: denali: change the type of "i" to int
mtd: denali: remove a set-but-unused variable
mtd: denali: remove unnecessary parentheses
mtd: denali: fix indentations and other trivial things
drivers/mtd/nand/denali.c | 532 +++++++++++++++++++++++++---------------------
1 file changed, 290 insertions(+), 242 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 1/7] mtd: denali: fix the format of comment blocks
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:10 ` Masahiro Yamada
-1 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: David Woodhouse, Josh Triplett, linux-kernel, Masahiro Yamada,
Rashika Kheria, grmoore@altera.com, Brian Norris, Huang Shijie
We should use
/*
* Blah Blah ...
* ...
*/
for multi-line comment blocks.
In addition, refactor some comments where it seems reasonable and
remove some comments where the code is clear enough such as:
/* clear interrupts */
clear_interrupts(denali);
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 311 ++++++++++++++++++++++++++++------------------
1 file changed, 188 insertions(+), 123 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index da0fcc2..44a5f159 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -29,7 +29,8 @@
MODULE_LICENSE("GPL");
-/* We define a module parameter that allows the user to override
+/*
+ * We define a module parameter that allows the user to override
* the hardware and decide what timing mode should be used.
*/
#define NAND_DEFAULT_TIMINGS -1
@@ -41,8 +42,10 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
#define DENALI_NAND_NAME "denali-nand"
-/* We define a macro here that combines all interrupts this driver uses into
- * a single constant value, for convenience. */
+/*
+ * We define a macro here that combines all interrupts this driver uses into
+ * a single constant value, for convenience.
+ */
#define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \
INTR_STATUS__ECC_TRANSACTION_DONE | \
INTR_STATUS__ECC_ERR | \
@@ -54,23 +57,30 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
INTR_STATUS__RST_COMP | \
INTR_STATUS__ERASE_COMP)
-/* indicates whether or not the internal value for the flash bank is
- * valid or not */
+/*
+ * indicates whether or not the internal value for the flash bank is
+ * valid or not
+ */
#define CHIP_SELECT_INVALID -1
#define SUPPORT_8BITECC 1
-/* This macro divides two integers and rounds fractional values up
- * to the nearest integer value. */
+/*
+ * This macro divides two integers and rounds fractional values up
+ * to the nearest integer value.
+ */
#define CEIL_DIV(X, Y) (((X)%(Y)) ? ((X)/(Y)+1) : ((X)/(Y)))
-/* this macro allows us to convert from an MTD structure to our own
+/*
+ * this macro allows us to convert from an MTD structure to our own
* device context (denali) structure.
*/
#define mtd_to_denali(m) container_of(m, struct denali_nand_info, mtd)
-/* These constants are defined by the driver to enable common driver
- * configuration options. */
+/*
+ * These constants are defined by the driver to enable common driver
+ * configuration options.
+ */
#define SPARE_ACCESS 0x41
#define MAIN_ACCESS 0x42
#define MAIN_SPARE_ACCESS 0x43
@@ -84,8 +94,10 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
#define ADDR_CYCLE 1
#define STATUS_CYCLE 2
-/* this is a helper macro that allows us to
- * format the bank into the proper bits for the controller */
+/*
+ * this is a helper macro that allows us to
+ * format the bank into the proper bits for the controller
+ */
#define BANK(x) ((x) << 24)
/* forward declarations */
@@ -96,12 +108,12 @@ static void denali_irq_enable(struct denali_nand_info *denali,
uint32_t int_mask);
static uint32_t read_interrupt_status(struct denali_nand_info *denali);
-/* Certain operations for the denali NAND controller use
- * an indexed mode to read/write data. The operation is
- * performed by writing the address value of the command
- * to the device memory followed by the data. This function
+/*
+ * Certain operations for the denali NAND controller use an indexed mode to
+ * read/write data. The operation is performed by writing the address value
+ * of the command to the device memory followed by the data. This function
* abstracts this common operation.
-*/
+ */
static void index_addr(struct denali_nand_info *denali,
uint32_t address, uint32_t data)
{
@@ -117,8 +129,10 @@ static void index_addr_read_data(struct denali_nand_info *denali,
*pdata = ioread32(denali->flash_mem + 0x10);
}
-/* We need to buffer some data for some of the NAND core routines.
- * The operations manage buffering that data. */
+/*
+ * We need to buffer some data for some of the NAND core routines.
+ * The operations manage buffering that data.
+ */
static void reset_buf(struct denali_nand_info *denali)
{
denali->buf.head = denali->buf.tail = 0;
@@ -192,7 +206,8 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
return PASS;
}
-/* this routine calculates the ONFI timing values for a given mode and
+/*
+ * this routine calculates the ONFI timing values for a given mode and
* programs the clocking register accordingly. The mode is determined by
* the get_onfi_nand_para routine.
*/
@@ -298,9 +313,11 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
{
int i;
- /* we needn't to do a reset here because driver has already
+
+ /*
+ * we needn't to do a reset here because driver has already
* reset all the banks before
- * */
+ */
if (!(ioread32(denali->flash_reg + ONFI_TIMING_MODE) &
ONFI_TIMING_MODE__VALUE))
return FAIL;
@@ -313,8 +330,10 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
nand_onfi_timing_set(denali, i);
- /* By now, all the ONFI devices we know support the page cache */
- /* rw feature. So here we enable the pipeline_rw_ahead feature */
+ /*
+ * By now, all the ONFI devices we know support the page cache
+ * rw feature. So here we enable the pipeline_rw_ahead feature
+ */
/* iowrite32(1, denali->flash_reg + CACHE_WRITE_ENABLE); */
/* iowrite32(1, denali->flash_reg + CACHE_READ_ENABLE); */
@@ -340,8 +359,10 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
{
uint32_t tmp;
- /* Workaround to fix a controller bug which reports a wrong */
- /* spare area size for some kind of Toshiba NAND device */
+ /*
+ * Workaround to fix a controller bug which reports a wrong
+ * spare area size for some kind of Toshiba NAND device
+ */
if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
(ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) {
iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
@@ -391,7 +412,8 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
}
}
-/* determines how many NAND chips are connected to the controller. Note for
+/*
+ * determines how many NAND chips are connected to the controller. Note for
* Intel CE4100 devices we don't support more than one device.
*/
static void find_valid_banks(struct denali_nand_info *denali)
@@ -421,7 +443,8 @@ static void find_valid_banks(struct denali_nand_info *denali)
}
if (denali->platform == INTEL_CE4100) {
- /* Platform limitations of the CE4100 device limit
+ /*
+ * Platform limitations of the CE4100 device limit
* users to a single chip solution for NAND.
* Multichip support is not enabled.
*/
@@ -449,12 +472,13 @@ static void detect_max_banks(struct denali_nand_info *denali)
static void detect_partition_feature(struct denali_nand_info *denali)
{
- /* For MRST platform, denali->fwblks represent the
+ /*
+ * For MRST platform, denali->fwblks represent the
* number of blocks firmware is taken,
* FW is in protect partition and MTD driver has no
* permission to access it. So let driver know how many
* blocks it can't touch.
- * */
+ */
if (ioread32(denali->flash_reg + FEATURES) & FEATURES__PARTITION) {
if ((ioread32(denali->flash_reg + PERM_SRC_ID(1)) &
PERM_SRC_ID__SRCID) == SPECTRA_PARTITION_ID) {
@@ -481,11 +505,11 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
"%s, Line %d, Function: %s\n",
__FILE__, __LINE__, __func__);
- /* Use read id method to get device ID and other
- * params. For some NAND chips, controller can't
- * report the correct device ID by reading from
- * DEVICE_ID register
- * */
+ /*
+ * Use read id method to get device ID and other params.
+ * For some NAND chips, controller can't report the correct
+ * device ID by reading from DEVICE_ID register
+ */
addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
index_addr(denali, (uint32_t)addr | 0, 0x90);
index_addr(denali, (uint32_t)addr | 1, 0);
@@ -524,7 +548,8 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
detect_partition_feature(denali);
- /* If the user specified to override the default timings
+ /*
+ * If the user specified to override the default timings
* with a specific ONFI mode, we apply those changes here.
*/
if (onfi_timing_mode != NAND_DEFAULT_TIMINGS)
@@ -545,7 +570,8 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
iowrite32(0, denali->flash_reg + GLOBAL_INT_ENABLE);
}
-/* validation function to verify that the controlling software is making
+/*
+ * validation function to verify that the controlling software is making
* a valid request
*/
static inline bool is_flash_bank_valid(int flash_bank)
@@ -585,7 +611,8 @@ static void denali_irq_enable(struct denali_nand_info *denali,
iowrite32(int_mask, denali->flash_reg + INTR_EN(i));
}
-/* This function only returns when an interrupt that this driver cares about
+/*
+ * This function only returns when an interrupt that this driver cares about
* occurs. This is to reduce the overhead of servicing interrupts
*/
static inline uint32_t denali_irq_detected(struct denali_nand_info *denali)
@@ -625,9 +652,9 @@ static uint32_t read_interrupt_status(struct denali_nand_info *denali)
return ioread32(denali->flash_reg + intr_status_reg);
}
-/* This is the interrupt service routine. It handles all interrupts
- * sent to this device. Note that on CE4100, this is a shared
- * interrupt.
+/*
+ * This is the interrupt service routine. It handles all interrupts
+ * sent to this device. Note that on CE4100, this is a shared interrupt.
*/
static irqreturn_t denali_isr(int irq, void *dev_id)
{
@@ -637,19 +664,21 @@ static irqreturn_t denali_isr(int irq, void *dev_id)
spin_lock(&denali->irq_lock);
- /* check to see if a valid NAND chip has
- * been selected.
- */
+ /* check to see if a valid NAND chip has been selected. */
if (is_flash_bank_valid(denali->flash_bank)) {
- /* check to see if controller generated
- * the interrupt, since this is a shared interrupt */
+ /*
+ * check to see if controller generated the interrupt,
+ * since this is a shared interrupt
+ */
irq_status = denali_irq_detected(denali);
if (irq_status != 0) {
/* handle interrupt */
/* first acknowledge it */
clear_interrupt(denali, irq_status);
- /* store the status in the device context for someone
- to read */
+ /*
+ * store the status in the device context for someone
+ * to read
+ */
denali->irq_status |= irq_status;
/* notify anyone who cares that it happened */
complete(&denali->complete);
@@ -681,8 +710,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
/* our interrupt was detected */
break;
} else {
- /* these are not the interrupts you are looking for -
- * need to wait again */
+ /*
+ * these are not the interrupts you are looking for -
+ * need to wait again
+ */
spin_unlock_irq(&denali->irq_lock);
retry = true;
}
@@ -698,8 +729,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
return intr_status;
}
-/* This helper function setups the registers for ECC and whether or not
- * the spare area will be transferred. */
+/*
+ * This helper function setups the registers for ECC and whether or not
+ * the spare area will be transferred.
+ */
static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
bool transfer_spare)
{
@@ -715,7 +748,8 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
denali->flash_reg + TRANSFER_SPARE_REG);
}
-/* sends a pipeline command operation to the controller. See the Denali NAND
+/*
+ * sends a pipeline command operation to the controller. See the Denali NAND
* controller's user guide for more information (section 4.2.3.6).
*/
static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
@@ -737,7 +771,6 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
setup_ecc_for_xfer(denali, ecc_en, transfer_spare);
- /* clear interrupts */
clear_interrupts(denali);
addr = BANK(denali->flash_bank) | denali->page;
@@ -757,9 +790,10 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
cmd = MODE_10 | addr;
index_addr(denali, (uint32_t)cmd, access_type);
- /* page 33 of the NAND controller spec indicates we should not
- use the pipeline commands in Spare area only mode. So we
- don't.
+ /*
+ * page 33 of the NAND controller spec indicates we should not
+ * use the pipeline commands in Spare area only mode.
+ * So we don't.
*/
if (access_type == SPARE_ACCESS) {
cmd = MODE_01 | addr;
@@ -768,10 +802,11 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
index_addr(denali, (uint32_t)cmd,
PIPELINE_ACCESS | op | page_count);
- /* wait for command to be accepted
+ /*
+ * wait for command to be accepted
* can always use status0 bit as the
- * mask is identical for each
- * bank. */
+ * mask is identical for each bank.
+ */
irq_status = wait_for_irq(denali, irq_mask);
if (irq_status == 0) {
@@ -796,8 +831,10 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
{
uint32_t i = 0, *buf32;
- /* verify that the len is a multiple of 4. see comment in
- * read_data_from_flash_mem() */
+ /*
+ * verify that the len is a multiple of 4.
+ * see comment in read_data_from_flash_mem()
+ */
BUG_ON((len % 4) != 0);
/* write the data to the flash memory */
@@ -814,14 +851,12 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
{
uint32_t i = 0, *buf32;
- /* we assume that len will be a multiple of 4, if not
- * it would be nice to know about it ASAP rather than
- * have random failures...
- * This assumption is based on the fact that this
- * function is designed to be used to read flash pages,
- * which are typically multiples of 4...
+ /*
+ * we assume that len will be a multiple of 4, if not it would be nice
+ * to know about it ASAP rather than have random failures...
+ * This assumption is based on the fact that this function is designed
+ * to be used to read flash pages, which are typically multiples of 4.
*/
-
BUG_ON((len % 4) != 0);
/* transfer the data from the flash */
@@ -873,16 +908,19 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
DENALI_READ) == PASS) {
read_data_from_flash_mem(denali, buf, mtd->oobsize);
- /* wait for command to be accepted
- * can always use status0 bit as the mask is identical for each
- * bank. */
+ /*
+ * wait for command to be accepted
+ * can always use status0 bit as the
+ * mask is identical for each bank.
+ */
irq_status = wait_for_irq(denali, irq_mask);
if (irq_status == 0)
dev_err(denali->dev, "page on OOB timeout %d\n",
denali->page);
- /* We set the device back to MAIN_ACCESS here as I observed
+ /*
+ * We set the device back to MAIN_ACCESS here as I observed
* instability with the controller if you do a block erase
* and the last transaction was a SPARE_ACCESS. Block erase
* is reliable (according to the MTD test infrastructure)
@@ -894,7 +932,8 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
}
}
-/* this function examines buffers to see if they contain data that
+/*
+ * this function examines buffers to see if they contain data that
* indicate that the buffer is part of an erased region of flash.
*/
static bool is_erased(uint8_t *buf, int len)
@@ -940,13 +979,14 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
err_device = ECC_ERR_DEVICE(err_correction_info);
if (ECC_ERROR_CORRECTABLE(err_correction_info)) {
- /* If err_byte is larger than ECC_SECTOR_SIZE,
+ /*
+ * If err_byte is larger than ECC_SECTOR_SIZE,
* means error happened in OOB, so we ignore
* it. It's no need for us to correct it
* err_device is represented the NAND error
* bits are happened in if there are more
* than one NAND connected.
- * */
+ */
if (err_byte < ECC_SECTOR_SIZE) {
int offset;
offset = (err_sector *
@@ -960,17 +1000,19 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
bitflips++;
}
} else {
- /* if the error is not correctable, need to
+ /*
+ * if the error is not correctable, need to
* look at the page to see if it is an erased
* page. if so, then it's not a real ECC error
- * */
+ */
check_erased_page = true;
}
} while (!ECC_LAST_ERR(err_correction_info));
- /* Once handle all ecc errors, controller will triger
+ /*
+ * Once handle all ecc errors, controller will triger
* a ECC_TRANSACTION_DONE interrupt, so here just wait
* for a while for this interrupt
- * */
+ */
while (!(read_interrupt_status(denali) &
INTR_STATUS__ECC_TRANSACTION_DONE))
cpu_relax();
@@ -1013,12 +1055,14 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
/* 3. set memory low address bits 23:8 */
index_addr(denali, mode | ((uint16_t)addr << 8), 0x2300);
- /* 4. interrupt when complete, burst len = 64 bytes*/
+ /* 4. interrupt when complete, burst len = 64 bytes */
index_addr(denali, mode | 0x14000, 0x2400);
}
-/* writes a page. user specifies type, and this function handles the
- * configuration details. */
+/*
+ * writes a page. user specifies type, and this function handles the
+ * configuration details.
+ */
static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, bool raw_xfer)
{
@@ -1031,8 +1075,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
INTR_STATUS__PROGRAM_FAIL;
- /* if it is a raw xfer, we want to disable ecc, and send
- * the spare area.
+ /*
+ * if it is a raw xfer, we want to disable ecc and send the spare area.
* !raw_xfer - enable ecc
* raw_xfer - transfer spare
*/
@@ -1075,27 +1119,33 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
/* NAND core entry points */
-/* this is the callback that the NAND core calls to write a page. Since
+/*
+ * this is the callback that the NAND core calls to write a page. Since
* writing a page with ECC or without is similar, all the work is done
* by write_page above.
- * */
+ */
static int denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, int oob_required)
{
- /* for regular page writes, we let HW handle all the ECC
- * data written to the device. */
+ /*
+ * for regular page writes, we let HW handle all the ECC
+ * data written to the device.
+ */
return write_page(mtd, chip, buf, false);
}
-/* This is the callback that the NAND core calls to write a page without ECC.
+/*
+ * This is the callback that the NAND core calls to write a page without ECC.
* raw access is similar to ECC page writes, so all the work is done in the
* write_page() function above.
*/
static int denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, int oob_required)
{
- /* for raw page writes, we want to disable ECC and simply write
- whatever data is in the buffer. */
+ /*
+ * for raw page writes, we want to disable ECC and simply write
+ * whatever data is in the buffer.
+ */
return write_page(mtd, chip, buf, true);
}
@@ -1240,7 +1290,6 @@ static int denali_erase(struct mtd_info *mtd, int page)
uint32_t cmd = 0x0, irq_status = 0;
- /* clear interrupts */
clear_interrupts(denali);
/* setup page read request for access type */
@@ -1270,10 +1319,11 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
case NAND_CMD_READID:
case NAND_CMD_PARAM:
reset_buf(denali);
- /*sometimes ManufactureId read from register is not right
+ /*
+ * sometimes ManufactureId read from register is not right
* e.g. some of Micron MT29F32G08QAA MLC NAND chips
* So here we send READID cmd to NAND insteand
- * */
+ */
addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
index_addr(denali, (uint32_t)addr | 0, 0x90);
index_addr(denali, (uint32_t)addr | 1, 0);
@@ -1333,11 +1383,12 @@ static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
/* Initialization code to bring the device up to a known good state */
static void denali_hw_init(struct denali_nand_info *denali)
{
- /* tell driver how many bit controller will skip before
+ /*
+ * tell driver how many bit controller will skip before
* writing ECC code in OOB, this register may be already
* set by firmware. So we read this value out.
* if this value is 0, just let it be.
- * */
+ */
denali->bbtskipbytes = ioread32(denali->flash_reg +
SPARE_AREA_SKIP_BYTES);
detect_max_banks(denali);
@@ -1355,10 +1406,11 @@ static void denali_hw_init(struct denali_nand_info *denali)
denali_irq_init(denali);
}
-/* Althogh controller spec said SLC ECC is forceb to be 4bit,
+/*
+ * Althogh controller spec said SLC ECC is forceb to be 4bit,
* but denali controller in MRST only support 15bit and 8bit ECC
* correction
- * */
+ */
#define ECC_8BITS 14
static struct nand_ecclayout nand_8bit_oob = {
.eccbytes = 14,
@@ -1398,13 +1450,16 @@ static void denali_drv_init(struct denali_nand_info *denali)
denali->idx = 0;
/* setup interrupt handler */
- /* the completion object will be used to notify
- * the callee that the interrupt is done */
+ /*
+ * the completion object will be used to notify
+ * the callee that the interrupt is done
+ */
init_completion(&denali->complete);
- /* the spinlock will be used to synchronize the ISR
- * with any element that might be access shared
- * data (interrupt status) */
+ /*
+ * the spinlock will be used to synchronize the ISR with any
+ * element that might be access shared data (interrupt status)
+ */
spin_lock_init(&denali->irq_lock);
/* indicate that MTD has not selected a valid bank yet */
@@ -1419,7 +1474,8 @@ int denali_init(struct denali_nand_info *denali)
int ret;
if (denali->platform == INTEL_CE4100) {
- /* Due to a silicon limitation, we can only support
+ /*
+ * Due to a silicon limitation, we can only support
* ONFI timing mode 1 and below.
*/
if (onfi_timing_mode < -1 || onfi_timing_mode > 1) {
@@ -1438,8 +1494,10 @@ int denali_init(struct denali_nand_info *denali)
denali_hw_init(denali);
denali_drv_init(denali);
- /* denali_isr register is done after all the hardware
- * initilization is finished*/
+ /*
+ * denali_isr register is done after all the hardware
+ * initilization is finished
+ */
if (request_irq(denali->irq, denali_isr, IRQF_SHARED,
DENALI_NAND_NAME, denali)) {
pr_err("Spectra: Unable to allocate IRQ\n");
@@ -1458,9 +1516,11 @@ int denali_init(struct denali_nand_info *denali)
denali->nand.read_byte = denali_read_byte;
denali->nand.waitfunc = denali_waitfunc;
- /* scan for NAND devices attached to the controller
+ /*
+ * scan for NAND devices attached to the controller
* this is the first stage in a two step process to register
- * with the nand subsystem */
+ * with the nand subsystem
+ */
if (nand_scan_ident(&denali->mtd, denali->max_banks, NULL)) {
ret = -ENXIO;
goto failed_req_irq;
@@ -1492,10 +1552,10 @@ int denali_init(struct denali_nand_info *denali)
goto failed_req_irq;
}
- /* support for multi nand
- * MTD known nothing about multi nand,
- * so we should tell it the real pagesize
- * and anything necessery
+ /*
+ * support for multi nand
+ * MTD known nothing about multi nand, so we should tell it
+ * the real pagesize and anything necessery
*/
denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED);
denali->nand.chipsize <<= (denali->devnum - 1);
@@ -1511,9 +1571,11 @@ int denali_init(struct denali_nand_info *denali)
denali->mtd.size = denali->nand.numchips * denali->nand.chipsize;
denali->bbtskipbytes *= denali->devnum;
- /* second stage of the NAND scan
+ /*
+ * second stage of the NAND scan
* this stage requires information regarding ECC and
- * bad block management. */
+ * bad block management.
+ */
/* Bad block management */
denali->nand.bbt_td = &bbt_main_descr;
@@ -1524,7 +1586,8 @@ int denali_init(struct denali_nand_info *denali)
denali->nand.options |= NAND_SKIP_BBTSCAN;
denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
- /* Denali Controller only support 15bit and 8bit ECC in MRST,
+ /*
+ * Denali Controller only support 15bit and 8bit ECC in MRST,
* so just let controller do 15bit ECC for MLC and 8bit ECC for
* SLC if possible.
* */
@@ -1560,18 +1623,20 @@ int denali_init(struct denali_nand_info *denali)
denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes -
denali->bbtskipbytes;
- /* Let driver know the total blocks number and
- * how many blocks contained by each nand chip.
- * blksperchip will help driver to know how many
- * blocks is taken by FW.
- * */
+ /*
+ * Let driver know the total blocks number and how many blocks
+ * contained by each nand chip. blksperchip will help driver to
+ * know how many blocks is taken by FW.
+ */
denali->totalblks = denali->mtd.size >>
denali->nand.phys_erase_shift;
denali->blksperchip = denali->totalblks / denali->nand.numchips;
- /* These functions are required by the NAND core framework, otherwise,
+ /*
+ * These functions are required by the NAND core framework, otherwise,
* the NAND core will assert. However, we don't need them, so we'll stub
- * them out. */
+ * them out.
+ */
denali->nand.ecc.calculate = denali_ecc_calculate;
denali->nand.ecc.correct = denali_ecc_correct;
denali->nand.ecc.hwctl = denali_ecc_hwctl;
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 1/7] mtd: denali: fix the format of comment blocks
@ 2014-09-08 8:10 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Masahiro Yamada, David Woodhouse, Brian Norris, Josh Triplett,
Huang Shijie, Rashika Kheria, grmoore@altera.com, linux-kernel
We should use
/*
* Blah Blah ...
* ...
*/
for multi-line comment blocks.
In addition, refactor some comments where it seems reasonable and
remove some comments where the code is clear enough such as:
/* clear interrupts */
clear_interrupts(denali);
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 311 ++++++++++++++++++++++++++++------------------
1 file changed, 188 insertions(+), 123 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index da0fcc2..44a5f159 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -29,7 +29,8 @@
MODULE_LICENSE("GPL");
-/* We define a module parameter that allows the user to override
+/*
+ * We define a module parameter that allows the user to override
* the hardware and decide what timing mode should be used.
*/
#define NAND_DEFAULT_TIMINGS -1
@@ -41,8 +42,10 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
#define DENALI_NAND_NAME "denali-nand"
-/* We define a macro here that combines all interrupts this driver uses into
- * a single constant value, for convenience. */
+/*
+ * We define a macro here that combines all interrupts this driver uses into
+ * a single constant value, for convenience.
+ */
#define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \
INTR_STATUS__ECC_TRANSACTION_DONE | \
INTR_STATUS__ECC_ERR | \
@@ -54,23 +57,30 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
INTR_STATUS__RST_COMP | \
INTR_STATUS__ERASE_COMP)
-/* indicates whether or not the internal value for the flash bank is
- * valid or not */
+/*
+ * indicates whether or not the internal value for the flash bank is
+ * valid or not
+ */
#define CHIP_SELECT_INVALID -1
#define SUPPORT_8BITECC 1
-/* This macro divides two integers and rounds fractional values up
- * to the nearest integer value. */
+/*
+ * This macro divides two integers and rounds fractional values up
+ * to the nearest integer value.
+ */
#define CEIL_DIV(X, Y) (((X)%(Y)) ? ((X)/(Y)+1) : ((X)/(Y)))
-/* this macro allows us to convert from an MTD structure to our own
+/*
+ * this macro allows us to convert from an MTD structure to our own
* device context (denali) structure.
*/
#define mtd_to_denali(m) container_of(m, struct denali_nand_info, mtd)
-/* These constants are defined by the driver to enable common driver
- * configuration options. */
+/*
+ * These constants are defined by the driver to enable common driver
+ * configuration options.
+ */
#define SPARE_ACCESS 0x41
#define MAIN_ACCESS 0x42
#define MAIN_SPARE_ACCESS 0x43
@@ -84,8 +94,10 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
#define ADDR_CYCLE 1
#define STATUS_CYCLE 2
-/* this is a helper macro that allows us to
- * format the bank into the proper bits for the controller */
+/*
+ * this is a helper macro that allows us to
+ * format the bank into the proper bits for the controller
+ */
#define BANK(x) ((x) << 24)
/* forward declarations */
@@ -96,12 +108,12 @@ static void denali_irq_enable(struct denali_nand_info *denali,
uint32_t int_mask);
static uint32_t read_interrupt_status(struct denali_nand_info *denali);
-/* Certain operations for the denali NAND controller use
- * an indexed mode to read/write data. The operation is
- * performed by writing the address value of the command
- * to the device memory followed by the data. This function
+/*
+ * Certain operations for the denali NAND controller use an indexed mode to
+ * read/write data. The operation is performed by writing the address value
+ * of the command to the device memory followed by the data. This function
* abstracts this common operation.
-*/
+ */
static void index_addr(struct denali_nand_info *denali,
uint32_t address, uint32_t data)
{
@@ -117,8 +129,10 @@ static void index_addr_read_data(struct denali_nand_info *denali,
*pdata = ioread32(denali->flash_mem + 0x10);
}
-/* We need to buffer some data for some of the NAND core routines.
- * The operations manage buffering that data. */
+/*
+ * We need to buffer some data for some of the NAND core routines.
+ * The operations manage buffering that data.
+ */
static void reset_buf(struct denali_nand_info *denali)
{
denali->buf.head = denali->buf.tail = 0;
@@ -192,7 +206,8 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
return PASS;
}
-/* this routine calculates the ONFI timing values for a given mode and
+/*
+ * this routine calculates the ONFI timing values for a given mode and
* programs the clocking register accordingly. The mode is determined by
* the get_onfi_nand_para routine.
*/
@@ -298,9 +313,11 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
{
int i;
- /* we needn't to do a reset here because driver has already
+
+ /*
+ * we needn't to do a reset here because driver has already
* reset all the banks before
- * */
+ */
if (!(ioread32(denali->flash_reg + ONFI_TIMING_MODE) &
ONFI_TIMING_MODE__VALUE))
return FAIL;
@@ -313,8 +330,10 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
nand_onfi_timing_set(denali, i);
- /* By now, all the ONFI devices we know support the page cache */
- /* rw feature. So here we enable the pipeline_rw_ahead feature */
+ /*
+ * By now, all the ONFI devices we know support the page cache
+ * rw feature. So here we enable the pipeline_rw_ahead feature
+ */
/* iowrite32(1, denali->flash_reg + CACHE_WRITE_ENABLE); */
/* iowrite32(1, denali->flash_reg + CACHE_READ_ENABLE); */
@@ -340,8 +359,10 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
{
uint32_t tmp;
- /* Workaround to fix a controller bug which reports a wrong */
- /* spare area size for some kind of Toshiba NAND device */
+ /*
+ * Workaround to fix a controller bug which reports a wrong
+ * spare area size for some kind of Toshiba NAND device
+ */
if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
(ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) {
iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
@@ -391,7 +412,8 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
}
}
-/* determines how many NAND chips are connected to the controller. Note for
+/*
+ * determines how many NAND chips are connected to the controller. Note for
* Intel CE4100 devices we don't support more than one device.
*/
static void find_valid_banks(struct denali_nand_info *denali)
@@ -421,7 +443,8 @@ static void find_valid_banks(struct denali_nand_info *denali)
}
if (denali->platform == INTEL_CE4100) {
- /* Platform limitations of the CE4100 device limit
+ /*
+ * Platform limitations of the CE4100 device limit
* users to a single chip solution for NAND.
* Multichip support is not enabled.
*/
@@ -449,12 +472,13 @@ static void detect_max_banks(struct denali_nand_info *denali)
static void detect_partition_feature(struct denali_nand_info *denali)
{
- /* For MRST platform, denali->fwblks represent the
+ /*
+ * For MRST platform, denali->fwblks represent the
* number of blocks firmware is taken,
* FW is in protect partition and MTD driver has no
* permission to access it. So let driver know how many
* blocks it can't touch.
- * */
+ */
if (ioread32(denali->flash_reg + FEATURES) & FEATURES__PARTITION) {
if ((ioread32(denali->flash_reg + PERM_SRC_ID(1)) &
PERM_SRC_ID__SRCID) == SPECTRA_PARTITION_ID) {
@@ -481,11 +505,11 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
"%s, Line %d, Function: %s\n",
__FILE__, __LINE__, __func__);
- /* Use read id method to get device ID and other
- * params. For some NAND chips, controller can't
- * report the correct device ID by reading from
- * DEVICE_ID register
- * */
+ /*
+ * Use read id method to get device ID and other params.
+ * For some NAND chips, controller can't report the correct
+ * device ID by reading from DEVICE_ID register
+ */
addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
index_addr(denali, (uint32_t)addr | 0, 0x90);
index_addr(denali, (uint32_t)addr | 1, 0);
@@ -524,7 +548,8 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
detect_partition_feature(denali);
- /* If the user specified to override the default timings
+ /*
+ * If the user specified to override the default timings
* with a specific ONFI mode, we apply those changes here.
*/
if (onfi_timing_mode != NAND_DEFAULT_TIMINGS)
@@ -545,7 +570,8 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
iowrite32(0, denali->flash_reg + GLOBAL_INT_ENABLE);
}
-/* validation function to verify that the controlling software is making
+/*
+ * validation function to verify that the controlling software is making
* a valid request
*/
static inline bool is_flash_bank_valid(int flash_bank)
@@ -585,7 +611,8 @@ static void denali_irq_enable(struct denali_nand_info *denali,
iowrite32(int_mask, denali->flash_reg + INTR_EN(i));
}
-/* This function only returns when an interrupt that this driver cares about
+/*
+ * This function only returns when an interrupt that this driver cares about
* occurs. This is to reduce the overhead of servicing interrupts
*/
static inline uint32_t denali_irq_detected(struct denali_nand_info *denali)
@@ -625,9 +652,9 @@ static uint32_t read_interrupt_status(struct denali_nand_info *denali)
return ioread32(denali->flash_reg + intr_status_reg);
}
-/* This is the interrupt service routine. It handles all interrupts
- * sent to this device. Note that on CE4100, this is a shared
- * interrupt.
+/*
+ * This is the interrupt service routine. It handles all interrupts
+ * sent to this device. Note that on CE4100, this is a shared interrupt.
*/
static irqreturn_t denali_isr(int irq, void *dev_id)
{
@@ -637,19 +664,21 @@ static irqreturn_t denali_isr(int irq, void *dev_id)
spin_lock(&denali->irq_lock);
- /* check to see if a valid NAND chip has
- * been selected.
- */
+ /* check to see if a valid NAND chip has been selected. */
if (is_flash_bank_valid(denali->flash_bank)) {
- /* check to see if controller generated
- * the interrupt, since this is a shared interrupt */
+ /*
+ * check to see if controller generated the interrupt,
+ * since this is a shared interrupt
+ */
irq_status = denali_irq_detected(denali);
if (irq_status != 0) {
/* handle interrupt */
/* first acknowledge it */
clear_interrupt(denali, irq_status);
- /* store the status in the device context for someone
- to read */
+ /*
+ * store the status in the device context for someone
+ * to read
+ */
denali->irq_status |= irq_status;
/* notify anyone who cares that it happened */
complete(&denali->complete);
@@ -681,8 +710,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
/* our interrupt was detected */
break;
} else {
- /* these are not the interrupts you are looking for -
- * need to wait again */
+ /*
+ * these are not the interrupts you are looking for -
+ * need to wait again
+ */
spin_unlock_irq(&denali->irq_lock);
retry = true;
}
@@ -698,8 +729,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
return intr_status;
}
-/* This helper function setups the registers for ECC and whether or not
- * the spare area will be transferred. */
+/*
+ * This helper function setups the registers for ECC and whether or not
+ * the spare area will be transferred.
+ */
static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
bool transfer_spare)
{
@@ -715,7 +748,8 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
denali->flash_reg + TRANSFER_SPARE_REG);
}
-/* sends a pipeline command operation to the controller. See the Denali NAND
+/*
+ * sends a pipeline command operation to the controller. See the Denali NAND
* controller's user guide for more information (section 4.2.3.6).
*/
static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
@@ -737,7 +771,6 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
setup_ecc_for_xfer(denali, ecc_en, transfer_spare);
- /* clear interrupts */
clear_interrupts(denali);
addr = BANK(denali->flash_bank) | denali->page;
@@ -757,9 +790,10 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
cmd = MODE_10 | addr;
index_addr(denali, (uint32_t)cmd, access_type);
- /* page 33 of the NAND controller spec indicates we should not
- use the pipeline commands in Spare area only mode. So we
- don't.
+ /*
+ * page 33 of the NAND controller spec indicates we should not
+ * use the pipeline commands in Spare area only mode.
+ * So we don't.
*/
if (access_type == SPARE_ACCESS) {
cmd = MODE_01 | addr;
@@ -768,10 +802,11 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
index_addr(denali, (uint32_t)cmd,
PIPELINE_ACCESS | op | page_count);
- /* wait for command to be accepted
+ /*
+ * wait for command to be accepted
* can always use status0 bit as the
- * mask is identical for each
- * bank. */
+ * mask is identical for each bank.
+ */
irq_status = wait_for_irq(denali, irq_mask);
if (irq_status == 0) {
@@ -796,8 +831,10 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
{
uint32_t i = 0, *buf32;
- /* verify that the len is a multiple of 4. see comment in
- * read_data_from_flash_mem() */
+ /*
+ * verify that the len is a multiple of 4.
+ * see comment in read_data_from_flash_mem()
+ */
BUG_ON((len % 4) != 0);
/* write the data to the flash memory */
@@ -814,14 +851,12 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
{
uint32_t i = 0, *buf32;
- /* we assume that len will be a multiple of 4, if not
- * it would be nice to know about it ASAP rather than
- * have random failures...
- * This assumption is based on the fact that this
- * function is designed to be used to read flash pages,
- * which are typically multiples of 4...
+ /*
+ * we assume that len will be a multiple of 4, if not it would be nice
+ * to know about it ASAP rather than have random failures...
+ * This assumption is based on the fact that this function is designed
+ * to be used to read flash pages, which are typically multiples of 4.
*/
-
BUG_ON((len % 4) != 0);
/* transfer the data from the flash */
@@ -873,16 +908,19 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
DENALI_READ) == PASS) {
read_data_from_flash_mem(denali, buf, mtd->oobsize);
- /* wait for command to be accepted
- * can always use status0 bit as the mask is identical for each
- * bank. */
+ /*
+ * wait for command to be accepted
+ * can always use status0 bit as the
+ * mask is identical for each bank.
+ */
irq_status = wait_for_irq(denali, irq_mask);
if (irq_status == 0)
dev_err(denali->dev, "page on OOB timeout %d\n",
denali->page);
- /* We set the device back to MAIN_ACCESS here as I observed
+ /*
+ * We set the device back to MAIN_ACCESS here as I observed
* instability with the controller if you do a block erase
* and the last transaction was a SPARE_ACCESS. Block erase
* is reliable (according to the MTD test infrastructure)
@@ -894,7 +932,8 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
}
}
-/* this function examines buffers to see if they contain data that
+/*
+ * this function examines buffers to see if they contain data that
* indicate that the buffer is part of an erased region of flash.
*/
static bool is_erased(uint8_t *buf, int len)
@@ -940,13 +979,14 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
err_device = ECC_ERR_DEVICE(err_correction_info);
if (ECC_ERROR_CORRECTABLE(err_correction_info)) {
- /* If err_byte is larger than ECC_SECTOR_SIZE,
+ /*
+ * If err_byte is larger than ECC_SECTOR_SIZE,
* means error happened in OOB, so we ignore
* it. It's no need for us to correct it
* err_device is represented the NAND error
* bits are happened in if there are more
* than one NAND connected.
- * */
+ */
if (err_byte < ECC_SECTOR_SIZE) {
int offset;
offset = (err_sector *
@@ -960,17 +1000,19 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
bitflips++;
}
} else {
- /* if the error is not correctable, need to
+ /*
+ * if the error is not correctable, need to
* look at the page to see if it is an erased
* page. if so, then it's not a real ECC error
- * */
+ */
check_erased_page = true;
}
} while (!ECC_LAST_ERR(err_correction_info));
- /* Once handle all ecc errors, controller will triger
+ /*
+ * Once handle all ecc errors, controller will triger
* a ECC_TRANSACTION_DONE interrupt, so here just wait
* for a while for this interrupt
- * */
+ */
while (!(read_interrupt_status(denali) &
INTR_STATUS__ECC_TRANSACTION_DONE))
cpu_relax();
@@ -1013,12 +1055,14 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
/* 3. set memory low address bits 23:8 */
index_addr(denali, mode | ((uint16_t)addr << 8), 0x2300);
- /* 4. interrupt when complete, burst len = 64 bytes*/
+ /* 4. interrupt when complete, burst len = 64 bytes */
index_addr(denali, mode | 0x14000, 0x2400);
}
-/* writes a page. user specifies type, and this function handles the
- * configuration details. */
+/*
+ * writes a page. user specifies type, and this function handles the
+ * configuration details.
+ */
static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, bool raw_xfer)
{
@@ -1031,8 +1075,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
INTR_STATUS__PROGRAM_FAIL;
- /* if it is a raw xfer, we want to disable ecc, and send
- * the spare area.
+ /*
+ * if it is a raw xfer, we want to disable ecc and send the spare area.
* !raw_xfer - enable ecc
* raw_xfer - transfer spare
*/
@@ -1075,27 +1119,33 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
/* NAND core entry points */
-/* this is the callback that the NAND core calls to write a page. Since
+/*
+ * this is the callback that the NAND core calls to write a page. Since
* writing a page with ECC or without is similar, all the work is done
* by write_page above.
- * */
+ */
static int denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, int oob_required)
{
- /* for regular page writes, we let HW handle all the ECC
- * data written to the device. */
+ /*
+ * for regular page writes, we let HW handle all the ECC
+ * data written to the device.
+ */
return write_page(mtd, chip, buf, false);
}
-/* This is the callback that the NAND core calls to write a page without ECC.
+/*
+ * This is the callback that the NAND core calls to write a page without ECC.
* raw access is similar to ECC page writes, so all the work is done in the
* write_page() function above.
*/
static int denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, int oob_required)
{
- /* for raw page writes, we want to disable ECC and simply write
- whatever data is in the buffer. */
+ /*
+ * for raw page writes, we want to disable ECC and simply write
+ * whatever data is in the buffer.
+ */
return write_page(mtd, chip, buf, true);
}
@@ -1240,7 +1290,6 @@ static int denali_erase(struct mtd_info *mtd, int page)
uint32_t cmd = 0x0, irq_status = 0;
- /* clear interrupts */
clear_interrupts(denali);
/* setup page read request for access type */
@@ -1270,10 +1319,11 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
case NAND_CMD_READID:
case NAND_CMD_PARAM:
reset_buf(denali);
- /*sometimes ManufactureId read from register is not right
+ /*
+ * sometimes ManufactureId read from register is not right
* e.g. some of Micron MT29F32G08QAA MLC NAND chips
* So here we send READID cmd to NAND insteand
- * */
+ */
addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
index_addr(denali, (uint32_t)addr | 0, 0x90);
index_addr(denali, (uint32_t)addr | 1, 0);
@@ -1333,11 +1383,12 @@ static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
/* Initialization code to bring the device up to a known good state */
static void denali_hw_init(struct denali_nand_info *denali)
{
- /* tell driver how many bit controller will skip before
+ /*
+ * tell driver how many bit controller will skip before
* writing ECC code in OOB, this register may be already
* set by firmware. So we read this value out.
* if this value is 0, just let it be.
- * */
+ */
denali->bbtskipbytes = ioread32(denali->flash_reg +
SPARE_AREA_SKIP_BYTES);
detect_max_banks(denali);
@@ -1355,10 +1406,11 @@ static void denali_hw_init(struct denali_nand_info *denali)
denali_irq_init(denali);
}
-/* Althogh controller spec said SLC ECC is forceb to be 4bit,
+/*
+ * Althogh controller spec said SLC ECC is forceb to be 4bit,
* but denali controller in MRST only support 15bit and 8bit ECC
* correction
- * */
+ */
#define ECC_8BITS 14
static struct nand_ecclayout nand_8bit_oob = {
.eccbytes = 14,
@@ -1398,13 +1450,16 @@ static void denali_drv_init(struct denali_nand_info *denali)
denali->idx = 0;
/* setup interrupt handler */
- /* the completion object will be used to notify
- * the callee that the interrupt is done */
+ /*
+ * the completion object will be used to notify
+ * the callee that the interrupt is done
+ */
init_completion(&denali->complete);
- /* the spinlock will be used to synchronize the ISR
- * with any element that might be access shared
- * data (interrupt status) */
+ /*
+ * the spinlock will be used to synchronize the ISR with any
+ * element that might be access shared data (interrupt status)
+ */
spin_lock_init(&denali->irq_lock);
/* indicate that MTD has not selected a valid bank yet */
@@ -1419,7 +1474,8 @@ int denali_init(struct denali_nand_info *denali)
int ret;
if (denali->platform == INTEL_CE4100) {
- /* Due to a silicon limitation, we can only support
+ /*
+ * Due to a silicon limitation, we can only support
* ONFI timing mode 1 and below.
*/
if (onfi_timing_mode < -1 || onfi_timing_mode > 1) {
@@ -1438,8 +1494,10 @@ int denali_init(struct denali_nand_info *denali)
denali_hw_init(denali);
denali_drv_init(denali);
- /* denali_isr register is done after all the hardware
- * initilization is finished*/
+ /*
+ * denali_isr register is done after all the hardware
+ * initilization is finished
+ */
if (request_irq(denali->irq, denali_isr, IRQF_SHARED,
DENALI_NAND_NAME, denali)) {
pr_err("Spectra: Unable to allocate IRQ\n");
@@ -1458,9 +1516,11 @@ int denali_init(struct denali_nand_info *denali)
denali->nand.read_byte = denali_read_byte;
denali->nand.waitfunc = denali_waitfunc;
- /* scan for NAND devices attached to the controller
+ /*
+ * scan for NAND devices attached to the controller
* this is the first stage in a two step process to register
- * with the nand subsystem */
+ * with the nand subsystem
+ */
if (nand_scan_ident(&denali->mtd, denali->max_banks, NULL)) {
ret = -ENXIO;
goto failed_req_irq;
@@ -1492,10 +1552,10 @@ int denali_init(struct denali_nand_info *denali)
goto failed_req_irq;
}
- /* support for multi nand
- * MTD known nothing about multi nand,
- * so we should tell it the real pagesize
- * and anything necessery
+ /*
+ * support for multi nand
+ * MTD known nothing about multi nand, so we should tell it
+ * the real pagesize and anything necessery
*/
denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED);
denali->nand.chipsize <<= (denali->devnum - 1);
@@ -1511,9 +1571,11 @@ int denali_init(struct denali_nand_info *denali)
denali->mtd.size = denali->nand.numchips * denali->nand.chipsize;
denali->bbtskipbytes *= denali->devnum;
- /* second stage of the NAND scan
+ /*
+ * second stage of the NAND scan
* this stage requires information regarding ECC and
- * bad block management. */
+ * bad block management.
+ */
/* Bad block management */
denali->nand.bbt_td = &bbt_main_descr;
@@ -1524,7 +1586,8 @@ int denali_init(struct denali_nand_info *denali)
denali->nand.options |= NAND_SKIP_BBTSCAN;
denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
- /* Denali Controller only support 15bit and 8bit ECC in MRST,
+ /*
+ * Denali Controller only support 15bit and 8bit ECC in MRST,
* so just let controller do 15bit ECC for MLC and 8bit ECC for
* SLC if possible.
* */
@@ -1560,18 +1623,20 @@ int denali_init(struct denali_nand_info *denali)
denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes -
denali->bbtskipbytes;
- /* Let driver know the total blocks number and
- * how many blocks contained by each nand chip.
- * blksperchip will help driver to know how many
- * blocks is taken by FW.
- * */
+ /*
+ * Let driver know the total blocks number and how many blocks
+ * contained by each nand chip. blksperchip will help driver to
+ * know how many blocks is taken by FW.
+ */
denali->totalblks = denali->mtd.size >>
denali->nand.phys_erase_shift;
denali->blksperchip = denali->totalblks / denali->nand.numchips;
- /* These functions are required by the NAND core framework, otherwise,
+ /*
+ * These functions are required by the NAND core framework, otherwise,
* the NAND core will assert. However, we don't need them, so we'll stub
- * them out. */
+ * them out.
+ */
denali->nand.ecc.calculate = denali_ecc_calculate;
denali->nand.ecc.correct = denali_ecc_correct;
denali->nand.ecc.hwctl = denali_ecc_hwctl;
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH 1/7] mtd: denali: fix the format of comment blocks
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:29 ` Josh Triplett
-1 siblings, 0 replies; 28+ messages in thread
From: Josh Triplett @ 2014-09-08 8:29 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Huang Shijie, linux-kernel, Rashika Kheria, linux-mtd,
grmoore@altera.com, Brian Norris, David Woodhouse
On Mon, Sep 08, 2014 at 05:10:07PM +0900, Masahiro Yamada wrote:
> We should use
> /*
> * Blah Blah ...
> * ...
> */
>
> for multi-line comment blocks.
>
> In addition, refactor some comments where it seems reasonable and
> remove some comments where the code is clear enough such as:
>
> /* clear interrupts */
> clear_interrupts(denali);
>
> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
All of the cases seem to match the preferred style; seems reasonable.
And thanks for applying the additional cleanup of removing entirely
unnecessary comments.
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
>
> drivers/mtd/nand/denali.c | 311 ++++++++++++++++++++++++++++------------------
> 1 file changed, 188 insertions(+), 123 deletions(-)
>
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index da0fcc2..44a5f159 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -29,7 +29,8 @@
>
> MODULE_LICENSE("GPL");
>
> -/* We define a module parameter that allows the user to override
> +/*
> + * We define a module parameter that allows the user to override
> * the hardware and decide what timing mode should be used.
> */
> #define NAND_DEFAULT_TIMINGS -1
> @@ -41,8 +42,10 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
>
> #define DENALI_NAND_NAME "denali-nand"
>
> -/* We define a macro here that combines all interrupts this driver uses into
> - * a single constant value, for convenience. */
> +/*
> + * We define a macro here that combines all interrupts this driver uses into
> + * a single constant value, for convenience.
> + */
> #define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \
> INTR_STATUS__ECC_TRANSACTION_DONE | \
> INTR_STATUS__ECC_ERR | \
> @@ -54,23 +57,30 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
> INTR_STATUS__RST_COMP | \
> INTR_STATUS__ERASE_COMP)
>
> -/* indicates whether or not the internal value for the flash bank is
> - * valid or not */
> +/*
> + * indicates whether or not the internal value for the flash bank is
> + * valid or not
> + */
> #define CHIP_SELECT_INVALID -1
>
> #define SUPPORT_8BITECC 1
>
> -/* This macro divides two integers and rounds fractional values up
> - * to the nearest integer value. */
> +/*
> + * This macro divides two integers and rounds fractional values up
> + * to the nearest integer value.
> + */
> #define CEIL_DIV(X, Y) (((X)%(Y)) ? ((X)/(Y)+1) : ((X)/(Y)))
>
> -/* this macro allows us to convert from an MTD structure to our own
> +/*
> + * this macro allows us to convert from an MTD structure to our own
> * device context (denali) structure.
> */
> #define mtd_to_denali(m) container_of(m, struct denali_nand_info, mtd)
>
> -/* These constants are defined by the driver to enable common driver
> - * configuration options. */
> +/*
> + * These constants are defined by the driver to enable common driver
> + * configuration options.
> + */
> #define SPARE_ACCESS 0x41
> #define MAIN_ACCESS 0x42
> #define MAIN_SPARE_ACCESS 0x43
> @@ -84,8 +94,10 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
> #define ADDR_CYCLE 1
> #define STATUS_CYCLE 2
>
> -/* this is a helper macro that allows us to
> - * format the bank into the proper bits for the controller */
> +/*
> + * this is a helper macro that allows us to
> + * format the bank into the proper bits for the controller
> + */
> #define BANK(x) ((x) << 24)
>
> /* forward declarations */
> @@ -96,12 +108,12 @@ static void denali_irq_enable(struct denali_nand_info *denali,
> uint32_t int_mask);
> static uint32_t read_interrupt_status(struct denali_nand_info *denali);
>
> -/* Certain operations for the denali NAND controller use
> - * an indexed mode to read/write data. The operation is
> - * performed by writing the address value of the command
> - * to the device memory followed by the data. This function
> +/*
> + * Certain operations for the denali NAND controller use an indexed mode to
> + * read/write data. The operation is performed by writing the address value
> + * of the command to the device memory followed by the data. This function
> * abstracts this common operation.
> -*/
> + */
> static void index_addr(struct denali_nand_info *denali,
> uint32_t address, uint32_t data)
> {
> @@ -117,8 +129,10 @@ static void index_addr_read_data(struct denali_nand_info *denali,
> *pdata = ioread32(denali->flash_mem + 0x10);
> }
>
> -/* We need to buffer some data for some of the NAND core routines.
> - * The operations manage buffering that data. */
> +/*
> + * We need to buffer some data for some of the NAND core routines.
> + * The operations manage buffering that data.
> + */
> static void reset_buf(struct denali_nand_info *denali)
> {
> denali->buf.head = denali->buf.tail = 0;
> @@ -192,7 +206,8 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
> return PASS;
> }
>
> -/* this routine calculates the ONFI timing values for a given mode and
> +/*
> + * this routine calculates the ONFI timing values for a given mode and
> * programs the clocking register accordingly. The mode is determined by
> * the get_onfi_nand_para routine.
> */
> @@ -298,9 +313,11 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
> static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
> {
> int i;
> - /* we needn't to do a reset here because driver has already
> +
> + /*
> + * we needn't to do a reset here because driver has already
> * reset all the banks before
> - * */
> + */
> if (!(ioread32(denali->flash_reg + ONFI_TIMING_MODE) &
> ONFI_TIMING_MODE__VALUE))
> return FAIL;
> @@ -313,8 +330,10 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
>
> nand_onfi_timing_set(denali, i);
>
> - /* By now, all the ONFI devices we know support the page cache */
> - /* rw feature. So here we enable the pipeline_rw_ahead feature */
> + /*
> + * By now, all the ONFI devices we know support the page cache
> + * rw feature. So here we enable the pipeline_rw_ahead feature
> + */
> /* iowrite32(1, denali->flash_reg + CACHE_WRITE_ENABLE); */
> /* iowrite32(1, denali->flash_reg + CACHE_READ_ENABLE); */
>
> @@ -340,8 +359,10 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
> {
> uint32_t tmp;
>
> - /* Workaround to fix a controller bug which reports a wrong */
> - /* spare area size for some kind of Toshiba NAND device */
> + /*
> + * Workaround to fix a controller bug which reports a wrong
> + * spare area size for some kind of Toshiba NAND device
> + */
> if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
> (ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) {
> iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
> @@ -391,7 +412,8 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
> }
> }
>
> -/* determines how many NAND chips are connected to the controller. Note for
> +/*
> + * determines how many NAND chips are connected to the controller. Note for
> * Intel CE4100 devices we don't support more than one device.
> */
> static void find_valid_banks(struct denali_nand_info *denali)
> @@ -421,7 +443,8 @@ static void find_valid_banks(struct denali_nand_info *denali)
> }
>
> if (denali->platform == INTEL_CE4100) {
> - /* Platform limitations of the CE4100 device limit
> + /*
> + * Platform limitations of the CE4100 device limit
> * users to a single chip solution for NAND.
> * Multichip support is not enabled.
> */
> @@ -449,12 +472,13 @@ static void detect_max_banks(struct denali_nand_info *denali)
>
> static void detect_partition_feature(struct denali_nand_info *denali)
> {
> - /* For MRST platform, denali->fwblks represent the
> + /*
> + * For MRST platform, denali->fwblks represent the
> * number of blocks firmware is taken,
> * FW is in protect partition and MTD driver has no
> * permission to access it. So let driver know how many
> * blocks it can't touch.
> - * */
> + */
> if (ioread32(denali->flash_reg + FEATURES) & FEATURES__PARTITION) {
> if ((ioread32(denali->flash_reg + PERM_SRC_ID(1)) &
> PERM_SRC_ID__SRCID) == SPECTRA_PARTITION_ID) {
> @@ -481,11 +505,11 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
> "%s, Line %d, Function: %s\n",
> __FILE__, __LINE__, __func__);
>
> - /* Use read id method to get device ID and other
> - * params. For some NAND chips, controller can't
> - * report the correct device ID by reading from
> - * DEVICE_ID register
> - * */
> + /*
> + * Use read id method to get device ID and other params.
> + * For some NAND chips, controller can't report the correct
> + * device ID by reading from DEVICE_ID register
> + */
> addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
> index_addr(denali, (uint32_t)addr | 0, 0x90);
> index_addr(denali, (uint32_t)addr | 1, 0);
> @@ -524,7 +548,8 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
>
> detect_partition_feature(denali);
>
> - /* If the user specified to override the default timings
> + /*
> + * If the user specified to override the default timings
> * with a specific ONFI mode, we apply those changes here.
> */
> if (onfi_timing_mode != NAND_DEFAULT_TIMINGS)
> @@ -545,7 +570,8 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
> iowrite32(0, denali->flash_reg + GLOBAL_INT_ENABLE);
> }
>
> -/* validation function to verify that the controlling software is making
> +/*
> + * validation function to verify that the controlling software is making
> * a valid request
> */
> static inline bool is_flash_bank_valid(int flash_bank)
> @@ -585,7 +611,8 @@ static void denali_irq_enable(struct denali_nand_info *denali,
> iowrite32(int_mask, denali->flash_reg + INTR_EN(i));
> }
>
> -/* This function only returns when an interrupt that this driver cares about
> +/*
> + * This function only returns when an interrupt that this driver cares about
> * occurs. This is to reduce the overhead of servicing interrupts
> */
> static inline uint32_t denali_irq_detected(struct denali_nand_info *denali)
> @@ -625,9 +652,9 @@ static uint32_t read_interrupt_status(struct denali_nand_info *denali)
> return ioread32(denali->flash_reg + intr_status_reg);
> }
>
> -/* This is the interrupt service routine. It handles all interrupts
> - * sent to this device. Note that on CE4100, this is a shared
> - * interrupt.
> +/*
> + * This is the interrupt service routine. It handles all interrupts
> + * sent to this device. Note that on CE4100, this is a shared interrupt.
> */
> static irqreturn_t denali_isr(int irq, void *dev_id)
> {
> @@ -637,19 +664,21 @@ static irqreturn_t denali_isr(int irq, void *dev_id)
>
> spin_lock(&denali->irq_lock);
>
> - /* check to see if a valid NAND chip has
> - * been selected.
> - */
> + /* check to see if a valid NAND chip has been selected. */
> if (is_flash_bank_valid(denali->flash_bank)) {
> - /* check to see if controller generated
> - * the interrupt, since this is a shared interrupt */
> + /*
> + * check to see if controller generated the interrupt,
> + * since this is a shared interrupt
> + */
> irq_status = denali_irq_detected(denali);
> if (irq_status != 0) {
> /* handle interrupt */
> /* first acknowledge it */
> clear_interrupt(denali, irq_status);
> - /* store the status in the device context for someone
> - to read */
> + /*
> + * store the status in the device context for someone
> + * to read
> + */
> denali->irq_status |= irq_status;
> /* notify anyone who cares that it happened */
> complete(&denali->complete);
> @@ -681,8 +710,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
> /* our interrupt was detected */
> break;
> } else {
> - /* these are not the interrupts you are looking for -
> - * need to wait again */
> + /*
> + * these are not the interrupts you are looking for -
> + * need to wait again
> + */
> spin_unlock_irq(&denali->irq_lock);
> retry = true;
> }
> @@ -698,8 +729,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
> return intr_status;
> }
>
> -/* This helper function setups the registers for ECC and whether or not
> - * the spare area will be transferred. */
> +/*
> + * This helper function setups the registers for ECC and whether or not
> + * the spare area will be transferred.
> + */
> static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
> bool transfer_spare)
> {
> @@ -715,7 +748,8 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
> denali->flash_reg + TRANSFER_SPARE_REG);
> }
>
> -/* sends a pipeline command operation to the controller. See the Denali NAND
> +/*
> + * sends a pipeline command operation to the controller. See the Denali NAND
> * controller's user guide for more information (section 4.2.3.6).
> */
> static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
> @@ -737,7 +771,6 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
>
> setup_ecc_for_xfer(denali, ecc_en, transfer_spare);
>
> - /* clear interrupts */
> clear_interrupts(denali);
>
> addr = BANK(denali->flash_bank) | denali->page;
> @@ -757,9 +790,10 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
> cmd = MODE_10 | addr;
> index_addr(denali, (uint32_t)cmd, access_type);
>
> - /* page 33 of the NAND controller spec indicates we should not
> - use the pipeline commands in Spare area only mode. So we
> - don't.
> + /*
> + * page 33 of the NAND controller spec indicates we should not
> + * use the pipeline commands in Spare area only mode.
> + * So we don't.
> */
> if (access_type == SPARE_ACCESS) {
> cmd = MODE_01 | addr;
> @@ -768,10 +802,11 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
> index_addr(denali, (uint32_t)cmd,
> PIPELINE_ACCESS | op | page_count);
>
> - /* wait for command to be accepted
> + /*
> + * wait for command to be accepted
> * can always use status0 bit as the
> - * mask is identical for each
> - * bank. */
> + * mask is identical for each bank.
> + */
> irq_status = wait_for_irq(denali, irq_mask);
>
> if (irq_status == 0) {
> @@ -796,8 +831,10 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
> {
> uint32_t i = 0, *buf32;
>
> - /* verify that the len is a multiple of 4. see comment in
> - * read_data_from_flash_mem() */
> + /*
> + * verify that the len is a multiple of 4.
> + * see comment in read_data_from_flash_mem()
> + */
> BUG_ON((len % 4) != 0);
>
> /* write the data to the flash memory */
> @@ -814,14 +851,12 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
> {
> uint32_t i = 0, *buf32;
>
> - /* we assume that len will be a multiple of 4, if not
> - * it would be nice to know about it ASAP rather than
> - * have random failures...
> - * This assumption is based on the fact that this
> - * function is designed to be used to read flash pages,
> - * which are typically multiples of 4...
> + /*
> + * we assume that len will be a multiple of 4, if not it would be nice
> + * to know about it ASAP rather than have random failures...
> + * This assumption is based on the fact that this function is designed
> + * to be used to read flash pages, which are typically multiples of 4.
> */
> -
> BUG_ON((len % 4) != 0);
>
> /* transfer the data from the flash */
> @@ -873,16 +908,19 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
> DENALI_READ) == PASS) {
> read_data_from_flash_mem(denali, buf, mtd->oobsize);
>
> - /* wait for command to be accepted
> - * can always use status0 bit as the mask is identical for each
> - * bank. */
> + /*
> + * wait for command to be accepted
> + * can always use status0 bit as the
> + * mask is identical for each bank.
> + */
> irq_status = wait_for_irq(denali, irq_mask);
>
> if (irq_status == 0)
> dev_err(denali->dev, "page on OOB timeout %d\n",
> denali->page);
>
> - /* We set the device back to MAIN_ACCESS here as I observed
> + /*
> + * We set the device back to MAIN_ACCESS here as I observed
> * instability with the controller if you do a block erase
> * and the last transaction was a SPARE_ACCESS. Block erase
> * is reliable (according to the MTD test infrastructure)
> @@ -894,7 +932,8 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
> }
> }
>
> -/* this function examines buffers to see if they contain data that
> +/*
> + * this function examines buffers to see if they contain data that
> * indicate that the buffer is part of an erased region of flash.
> */
> static bool is_erased(uint8_t *buf, int len)
> @@ -940,13 +979,14 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
> err_device = ECC_ERR_DEVICE(err_correction_info);
>
> if (ECC_ERROR_CORRECTABLE(err_correction_info)) {
> - /* If err_byte is larger than ECC_SECTOR_SIZE,
> + /*
> + * If err_byte is larger than ECC_SECTOR_SIZE,
> * means error happened in OOB, so we ignore
> * it. It's no need for us to correct it
> * err_device is represented the NAND error
> * bits are happened in if there are more
> * than one NAND connected.
> - * */
> + */
> if (err_byte < ECC_SECTOR_SIZE) {
> int offset;
> offset = (err_sector *
> @@ -960,17 +1000,19 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
> bitflips++;
> }
> } else {
> - /* if the error is not correctable, need to
> + /*
> + * if the error is not correctable, need to
> * look at the page to see if it is an erased
> * page. if so, then it's not a real ECC error
> - * */
> + */
> check_erased_page = true;
> }
> } while (!ECC_LAST_ERR(err_correction_info));
> - /* Once handle all ecc errors, controller will triger
> + /*
> + * Once handle all ecc errors, controller will triger
> * a ECC_TRANSACTION_DONE interrupt, so here just wait
> * for a while for this interrupt
> - * */
> + */
> while (!(read_interrupt_status(denali) &
> INTR_STATUS__ECC_TRANSACTION_DONE))
> cpu_relax();
> @@ -1013,12 +1055,14 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
> /* 3. set memory low address bits 23:8 */
> index_addr(denali, mode | ((uint16_t)addr << 8), 0x2300);
>
> - /* 4. interrupt when complete, burst len = 64 bytes*/
> + /* 4. interrupt when complete, burst len = 64 bytes */
> index_addr(denali, mode | 0x14000, 0x2400);
> }
>
> -/* writes a page. user specifies type, and this function handles the
> - * configuration details. */
> +/*
> + * writes a page. user specifies type, and this function handles the
> + * configuration details.
> + */
> static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
> const uint8_t *buf, bool raw_xfer)
> {
> @@ -1031,8 +1075,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
> uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
> INTR_STATUS__PROGRAM_FAIL;
>
> - /* if it is a raw xfer, we want to disable ecc, and send
> - * the spare area.
> + /*
> + * if it is a raw xfer, we want to disable ecc and send the spare area.
> * !raw_xfer - enable ecc
> * raw_xfer - transfer spare
> */
> @@ -1075,27 +1119,33 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
>
> /* NAND core entry points */
>
> -/* this is the callback that the NAND core calls to write a page. Since
> +/*
> + * this is the callback that the NAND core calls to write a page. Since
> * writing a page with ECC or without is similar, all the work is done
> * by write_page above.
> - * */
> + */
> static int denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,
> const uint8_t *buf, int oob_required)
> {
> - /* for regular page writes, we let HW handle all the ECC
> - * data written to the device. */
> + /*
> + * for regular page writes, we let HW handle all the ECC
> + * data written to the device.
> + */
> return write_page(mtd, chip, buf, false);
> }
>
> -/* This is the callback that the NAND core calls to write a page without ECC.
> +/*
> + * This is the callback that the NAND core calls to write a page without ECC.
> * raw access is similar to ECC page writes, so all the work is done in the
> * write_page() function above.
> */
> static int denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
> const uint8_t *buf, int oob_required)
> {
> - /* for raw page writes, we want to disable ECC and simply write
> - whatever data is in the buffer. */
> + /*
> + * for raw page writes, we want to disable ECC and simply write
> + * whatever data is in the buffer.
> + */
> return write_page(mtd, chip, buf, true);
> }
>
> @@ -1240,7 +1290,6 @@ static int denali_erase(struct mtd_info *mtd, int page)
>
> uint32_t cmd = 0x0, irq_status = 0;
>
> - /* clear interrupts */
> clear_interrupts(denali);
>
> /* setup page read request for access type */
> @@ -1270,10 +1319,11 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
> case NAND_CMD_READID:
> case NAND_CMD_PARAM:
> reset_buf(denali);
> - /*sometimes ManufactureId read from register is not right
> + /*
> + * sometimes ManufactureId read from register is not right
> * e.g. some of Micron MT29F32G08QAA MLC NAND chips
> * So here we send READID cmd to NAND insteand
> - * */
> + */
> addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
> index_addr(denali, (uint32_t)addr | 0, 0x90);
> index_addr(denali, (uint32_t)addr | 1, 0);
> @@ -1333,11 +1383,12 @@ static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
> /* Initialization code to bring the device up to a known good state */
> static void denali_hw_init(struct denali_nand_info *denali)
> {
> - /* tell driver how many bit controller will skip before
> + /*
> + * tell driver how many bit controller will skip before
> * writing ECC code in OOB, this register may be already
> * set by firmware. So we read this value out.
> * if this value is 0, just let it be.
> - * */
> + */
> denali->bbtskipbytes = ioread32(denali->flash_reg +
> SPARE_AREA_SKIP_BYTES);
> detect_max_banks(denali);
> @@ -1355,10 +1406,11 @@ static void denali_hw_init(struct denali_nand_info *denali)
> denali_irq_init(denali);
> }
>
> -/* Althogh controller spec said SLC ECC is forceb to be 4bit,
> +/*
> + * Althogh controller spec said SLC ECC is forceb to be 4bit,
> * but denali controller in MRST only support 15bit and 8bit ECC
> * correction
> - * */
> + */
> #define ECC_8BITS 14
> static struct nand_ecclayout nand_8bit_oob = {
> .eccbytes = 14,
> @@ -1398,13 +1450,16 @@ static void denali_drv_init(struct denali_nand_info *denali)
> denali->idx = 0;
>
> /* setup interrupt handler */
> - /* the completion object will be used to notify
> - * the callee that the interrupt is done */
> + /*
> + * the completion object will be used to notify
> + * the callee that the interrupt is done
> + */
> init_completion(&denali->complete);
>
> - /* the spinlock will be used to synchronize the ISR
> - * with any element that might be access shared
> - * data (interrupt status) */
> + /*
> + * the spinlock will be used to synchronize the ISR with any
> + * element that might be access shared data (interrupt status)
> + */
> spin_lock_init(&denali->irq_lock);
>
> /* indicate that MTD has not selected a valid bank yet */
> @@ -1419,7 +1474,8 @@ int denali_init(struct denali_nand_info *denali)
> int ret;
>
> if (denali->platform == INTEL_CE4100) {
> - /* Due to a silicon limitation, we can only support
> + /*
> + * Due to a silicon limitation, we can only support
> * ONFI timing mode 1 and below.
> */
> if (onfi_timing_mode < -1 || onfi_timing_mode > 1) {
> @@ -1438,8 +1494,10 @@ int denali_init(struct denali_nand_info *denali)
> denali_hw_init(denali);
> denali_drv_init(denali);
>
> - /* denali_isr register is done after all the hardware
> - * initilization is finished*/
> + /*
> + * denali_isr register is done after all the hardware
> + * initilization is finished
> + */
> if (request_irq(denali->irq, denali_isr, IRQF_SHARED,
> DENALI_NAND_NAME, denali)) {
> pr_err("Spectra: Unable to allocate IRQ\n");
> @@ -1458,9 +1516,11 @@ int denali_init(struct denali_nand_info *denali)
> denali->nand.read_byte = denali_read_byte;
> denali->nand.waitfunc = denali_waitfunc;
>
> - /* scan for NAND devices attached to the controller
> + /*
> + * scan for NAND devices attached to the controller
> * this is the first stage in a two step process to register
> - * with the nand subsystem */
> + * with the nand subsystem
> + */
> if (nand_scan_ident(&denali->mtd, denali->max_banks, NULL)) {
> ret = -ENXIO;
> goto failed_req_irq;
> @@ -1492,10 +1552,10 @@ int denali_init(struct denali_nand_info *denali)
> goto failed_req_irq;
> }
>
> - /* support for multi nand
> - * MTD known nothing about multi nand,
> - * so we should tell it the real pagesize
> - * and anything necessery
> + /*
> + * support for multi nand
> + * MTD known nothing about multi nand, so we should tell it
> + * the real pagesize and anything necessery
> */
> denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED);
> denali->nand.chipsize <<= (denali->devnum - 1);
> @@ -1511,9 +1571,11 @@ int denali_init(struct denali_nand_info *denali)
> denali->mtd.size = denali->nand.numchips * denali->nand.chipsize;
> denali->bbtskipbytes *= denali->devnum;
>
> - /* second stage of the NAND scan
> + /*
> + * second stage of the NAND scan
> * this stage requires information regarding ECC and
> - * bad block management. */
> + * bad block management.
> + */
>
> /* Bad block management */
> denali->nand.bbt_td = &bbt_main_descr;
> @@ -1524,7 +1586,8 @@ int denali_init(struct denali_nand_info *denali)
> denali->nand.options |= NAND_SKIP_BBTSCAN;
> denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
>
> - /* Denali Controller only support 15bit and 8bit ECC in MRST,
> + /*
> + * Denali Controller only support 15bit and 8bit ECC in MRST,
> * so just let controller do 15bit ECC for MLC and 8bit ECC for
> * SLC if possible.
> * */
> @@ -1560,18 +1623,20 @@ int denali_init(struct denali_nand_info *denali)
> denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes -
> denali->bbtskipbytes;
>
> - /* Let driver know the total blocks number and
> - * how many blocks contained by each nand chip.
> - * blksperchip will help driver to know how many
> - * blocks is taken by FW.
> - * */
> + /*
> + * Let driver know the total blocks number and how many blocks
> + * contained by each nand chip. blksperchip will help driver to
> + * know how many blocks is taken by FW.
> + */
> denali->totalblks = denali->mtd.size >>
> denali->nand.phys_erase_shift;
> denali->blksperchip = denali->totalblks / denali->nand.numchips;
>
> - /* These functions are required by the NAND core framework, otherwise,
> + /*
> + * These functions are required by the NAND core framework, otherwise,
> * the NAND core will assert. However, we don't need them, so we'll stub
> - * them out. */
> + * them out.
> + */
> denali->nand.ecc.calculate = denali_ecc_calculate;
> denali->nand.ecc.correct = denali_ecc_correct;
> denali->nand.ecc.hwctl = denali_ecc_hwctl;
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 1/7] mtd: denali: fix the format of comment blocks
@ 2014-09-08 8:29 ` Josh Triplett
0 siblings, 0 replies; 28+ messages in thread
From: Josh Triplett @ 2014-09-08 8:29 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-mtd, David Woodhouse, Brian Norris, Huang Shijie,
Rashika Kheria, grmoore@altera.com, linux-kernel
On Mon, Sep 08, 2014 at 05:10:07PM +0900, Masahiro Yamada wrote:
> We should use
> /*
> * Blah Blah ...
> * ...
> */
>
> for multi-line comment blocks.
>
> In addition, refactor some comments where it seems reasonable and
> remove some comments where the code is clear enough such as:
>
> /* clear interrupts */
> clear_interrupts(denali);
>
> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
All of the cases seem to match the preferred style; seems reasonable.
And thanks for applying the additional cleanup of removing entirely
unnecessary comments.
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
>
> drivers/mtd/nand/denali.c | 311 ++++++++++++++++++++++++++++------------------
> 1 file changed, 188 insertions(+), 123 deletions(-)
>
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index da0fcc2..44a5f159 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -29,7 +29,8 @@
>
> MODULE_LICENSE("GPL");
>
> -/* We define a module parameter that allows the user to override
> +/*
> + * We define a module parameter that allows the user to override
> * the hardware and decide what timing mode should be used.
> */
> #define NAND_DEFAULT_TIMINGS -1
> @@ -41,8 +42,10 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
>
> #define DENALI_NAND_NAME "denali-nand"
>
> -/* We define a macro here that combines all interrupts this driver uses into
> - * a single constant value, for convenience. */
> +/*
> + * We define a macro here that combines all interrupts this driver uses into
> + * a single constant value, for convenience.
> + */
> #define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \
> INTR_STATUS__ECC_TRANSACTION_DONE | \
> INTR_STATUS__ECC_ERR | \
> @@ -54,23 +57,30 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
> INTR_STATUS__RST_COMP | \
> INTR_STATUS__ERASE_COMP)
>
> -/* indicates whether or not the internal value for the flash bank is
> - * valid or not */
> +/*
> + * indicates whether or not the internal value for the flash bank is
> + * valid or not
> + */
> #define CHIP_SELECT_INVALID -1
>
> #define SUPPORT_8BITECC 1
>
> -/* This macro divides two integers and rounds fractional values up
> - * to the nearest integer value. */
> +/*
> + * This macro divides two integers and rounds fractional values up
> + * to the nearest integer value.
> + */
> #define CEIL_DIV(X, Y) (((X)%(Y)) ? ((X)/(Y)+1) : ((X)/(Y)))
>
> -/* this macro allows us to convert from an MTD structure to our own
> +/*
> + * this macro allows us to convert from an MTD structure to our own
> * device context (denali) structure.
> */
> #define mtd_to_denali(m) container_of(m, struct denali_nand_info, mtd)
>
> -/* These constants are defined by the driver to enable common driver
> - * configuration options. */
> +/*
> + * These constants are defined by the driver to enable common driver
> + * configuration options.
> + */
> #define SPARE_ACCESS 0x41
> #define MAIN_ACCESS 0x42
> #define MAIN_SPARE_ACCESS 0x43
> @@ -84,8 +94,10 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
> #define ADDR_CYCLE 1
> #define STATUS_CYCLE 2
>
> -/* this is a helper macro that allows us to
> - * format the bank into the proper bits for the controller */
> +/*
> + * this is a helper macro that allows us to
> + * format the bank into the proper bits for the controller
> + */
> #define BANK(x) ((x) << 24)
>
> /* forward declarations */
> @@ -96,12 +108,12 @@ static void denali_irq_enable(struct denali_nand_info *denali,
> uint32_t int_mask);
> static uint32_t read_interrupt_status(struct denali_nand_info *denali);
>
> -/* Certain operations for the denali NAND controller use
> - * an indexed mode to read/write data. The operation is
> - * performed by writing the address value of the command
> - * to the device memory followed by the data. This function
> +/*
> + * Certain operations for the denali NAND controller use an indexed mode to
> + * read/write data. The operation is performed by writing the address value
> + * of the command to the device memory followed by the data. This function
> * abstracts this common operation.
> -*/
> + */
> static void index_addr(struct denali_nand_info *denali,
> uint32_t address, uint32_t data)
> {
> @@ -117,8 +129,10 @@ static void index_addr_read_data(struct denali_nand_info *denali,
> *pdata = ioread32(denali->flash_mem + 0x10);
> }
>
> -/* We need to buffer some data for some of the NAND core routines.
> - * The operations manage buffering that data. */
> +/*
> + * We need to buffer some data for some of the NAND core routines.
> + * The operations manage buffering that data.
> + */
> static void reset_buf(struct denali_nand_info *denali)
> {
> denali->buf.head = denali->buf.tail = 0;
> @@ -192,7 +206,8 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
> return PASS;
> }
>
> -/* this routine calculates the ONFI timing values for a given mode and
> +/*
> + * this routine calculates the ONFI timing values for a given mode and
> * programs the clocking register accordingly. The mode is determined by
> * the get_onfi_nand_para routine.
> */
> @@ -298,9 +313,11 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
> static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
> {
> int i;
> - /* we needn't to do a reset here because driver has already
> +
> + /*
> + * we needn't to do a reset here because driver has already
> * reset all the banks before
> - * */
> + */
> if (!(ioread32(denali->flash_reg + ONFI_TIMING_MODE) &
> ONFI_TIMING_MODE__VALUE))
> return FAIL;
> @@ -313,8 +330,10 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
>
> nand_onfi_timing_set(denali, i);
>
> - /* By now, all the ONFI devices we know support the page cache */
> - /* rw feature. So here we enable the pipeline_rw_ahead feature */
> + /*
> + * By now, all the ONFI devices we know support the page cache
> + * rw feature. So here we enable the pipeline_rw_ahead feature
> + */
> /* iowrite32(1, denali->flash_reg + CACHE_WRITE_ENABLE); */
> /* iowrite32(1, denali->flash_reg + CACHE_READ_ENABLE); */
>
> @@ -340,8 +359,10 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
> {
> uint32_t tmp;
>
> - /* Workaround to fix a controller bug which reports a wrong */
> - /* spare area size for some kind of Toshiba NAND device */
> + /*
> + * Workaround to fix a controller bug which reports a wrong
> + * spare area size for some kind of Toshiba NAND device
> + */
> if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
> (ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) {
> iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
> @@ -391,7 +412,8 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
> }
> }
>
> -/* determines how many NAND chips are connected to the controller. Note for
> +/*
> + * determines how many NAND chips are connected to the controller. Note for
> * Intel CE4100 devices we don't support more than one device.
> */
> static void find_valid_banks(struct denali_nand_info *denali)
> @@ -421,7 +443,8 @@ static void find_valid_banks(struct denali_nand_info *denali)
> }
>
> if (denali->platform == INTEL_CE4100) {
> - /* Platform limitations of the CE4100 device limit
> + /*
> + * Platform limitations of the CE4100 device limit
> * users to a single chip solution for NAND.
> * Multichip support is not enabled.
> */
> @@ -449,12 +472,13 @@ static void detect_max_banks(struct denali_nand_info *denali)
>
> static void detect_partition_feature(struct denali_nand_info *denali)
> {
> - /* For MRST platform, denali->fwblks represent the
> + /*
> + * For MRST platform, denali->fwblks represent the
> * number of blocks firmware is taken,
> * FW is in protect partition and MTD driver has no
> * permission to access it. So let driver know how many
> * blocks it can't touch.
> - * */
> + */
> if (ioread32(denali->flash_reg + FEATURES) & FEATURES__PARTITION) {
> if ((ioread32(denali->flash_reg + PERM_SRC_ID(1)) &
> PERM_SRC_ID__SRCID) == SPECTRA_PARTITION_ID) {
> @@ -481,11 +505,11 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
> "%s, Line %d, Function: %s\n",
> __FILE__, __LINE__, __func__);
>
> - /* Use read id method to get device ID and other
> - * params. For some NAND chips, controller can't
> - * report the correct device ID by reading from
> - * DEVICE_ID register
> - * */
> + /*
> + * Use read id method to get device ID and other params.
> + * For some NAND chips, controller can't report the correct
> + * device ID by reading from DEVICE_ID register
> + */
> addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
> index_addr(denali, (uint32_t)addr | 0, 0x90);
> index_addr(denali, (uint32_t)addr | 1, 0);
> @@ -524,7 +548,8 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
>
> detect_partition_feature(denali);
>
> - /* If the user specified to override the default timings
> + /*
> + * If the user specified to override the default timings
> * with a specific ONFI mode, we apply those changes here.
> */
> if (onfi_timing_mode != NAND_DEFAULT_TIMINGS)
> @@ -545,7 +570,8 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
> iowrite32(0, denali->flash_reg + GLOBAL_INT_ENABLE);
> }
>
> -/* validation function to verify that the controlling software is making
> +/*
> + * validation function to verify that the controlling software is making
> * a valid request
> */
> static inline bool is_flash_bank_valid(int flash_bank)
> @@ -585,7 +611,8 @@ static void denali_irq_enable(struct denali_nand_info *denali,
> iowrite32(int_mask, denali->flash_reg + INTR_EN(i));
> }
>
> -/* This function only returns when an interrupt that this driver cares about
> +/*
> + * This function only returns when an interrupt that this driver cares about
> * occurs. This is to reduce the overhead of servicing interrupts
> */
> static inline uint32_t denali_irq_detected(struct denali_nand_info *denali)
> @@ -625,9 +652,9 @@ static uint32_t read_interrupt_status(struct denali_nand_info *denali)
> return ioread32(denali->flash_reg + intr_status_reg);
> }
>
> -/* This is the interrupt service routine. It handles all interrupts
> - * sent to this device. Note that on CE4100, this is a shared
> - * interrupt.
> +/*
> + * This is the interrupt service routine. It handles all interrupts
> + * sent to this device. Note that on CE4100, this is a shared interrupt.
> */
> static irqreturn_t denali_isr(int irq, void *dev_id)
> {
> @@ -637,19 +664,21 @@ static irqreturn_t denali_isr(int irq, void *dev_id)
>
> spin_lock(&denali->irq_lock);
>
> - /* check to see if a valid NAND chip has
> - * been selected.
> - */
> + /* check to see if a valid NAND chip has been selected. */
> if (is_flash_bank_valid(denali->flash_bank)) {
> - /* check to see if controller generated
> - * the interrupt, since this is a shared interrupt */
> + /*
> + * check to see if controller generated the interrupt,
> + * since this is a shared interrupt
> + */
> irq_status = denali_irq_detected(denali);
> if (irq_status != 0) {
> /* handle interrupt */
> /* first acknowledge it */
> clear_interrupt(denali, irq_status);
> - /* store the status in the device context for someone
> - to read */
> + /*
> + * store the status in the device context for someone
> + * to read
> + */
> denali->irq_status |= irq_status;
> /* notify anyone who cares that it happened */
> complete(&denali->complete);
> @@ -681,8 +710,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
> /* our interrupt was detected */
> break;
> } else {
> - /* these are not the interrupts you are looking for -
> - * need to wait again */
> + /*
> + * these are not the interrupts you are looking for -
> + * need to wait again
> + */
> spin_unlock_irq(&denali->irq_lock);
> retry = true;
> }
> @@ -698,8 +729,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
> return intr_status;
> }
>
> -/* This helper function setups the registers for ECC and whether or not
> - * the spare area will be transferred. */
> +/*
> + * This helper function setups the registers for ECC and whether or not
> + * the spare area will be transferred.
> + */
> static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
> bool transfer_spare)
> {
> @@ -715,7 +748,8 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
> denali->flash_reg + TRANSFER_SPARE_REG);
> }
>
> -/* sends a pipeline command operation to the controller. See the Denali NAND
> +/*
> + * sends a pipeline command operation to the controller. See the Denali NAND
> * controller's user guide for more information (section 4.2.3.6).
> */
> static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
> @@ -737,7 +771,6 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
>
> setup_ecc_for_xfer(denali, ecc_en, transfer_spare);
>
> - /* clear interrupts */
> clear_interrupts(denali);
>
> addr = BANK(denali->flash_bank) | denali->page;
> @@ -757,9 +790,10 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
> cmd = MODE_10 | addr;
> index_addr(denali, (uint32_t)cmd, access_type);
>
> - /* page 33 of the NAND controller spec indicates we should not
> - use the pipeline commands in Spare area only mode. So we
> - don't.
> + /*
> + * page 33 of the NAND controller spec indicates we should not
> + * use the pipeline commands in Spare area only mode.
> + * So we don't.
> */
> if (access_type == SPARE_ACCESS) {
> cmd = MODE_01 | addr;
> @@ -768,10 +802,11 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
> index_addr(denali, (uint32_t)cmd,
> PIPELINE_ACCESS | op | page_count);
>
> - /* wait for command to be accepted
> + /*
> + * wait for command to be accepted
> * can always use status0 bit as the
> - * mask is identical for each
> - * bank. */
> + * mask is identical for each bank.
> + */
> irq_status = wait_for_irq(denali, irq_mask);
>
> if (irq_status == 0) {
> @@ -796,8 +831,10 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
> {
> uint32_t i = 0, *buf32;
>
> - /* verify that the len is a multiple of 4. see comment in
> - * read_data_from_flash_mem() */
> + /*
> + * verify that the len is a multiple of 4.
> + * see comment in read_data_from_flash_mem()
> + */
> BUG_ON((len % 4) != 0);
>
> /* write the data to the flash memory */
> @@ -814,14 +851,12 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
> {
> uint32_t i = 0, *buf32;
>
> - /* we assume that len will be a multiple of 4, if not
> - * it would be nice to know about it ASAP rather than
> - * have random failures...
> - * This assumption is based on the fact that this
> - * function is designed to be used to read flash pages,
> - * which are typically multiples of 4...
> + /*
> + * we assume that len will be a multiple of 4, if not it would be nice
> + * to know about it ASAP rather than have random failures...
> + * This assumption is based on the fact that this function is designed
> + * to be used to read flash pages, which are typically multiples of 4.
> */
> -
> BUG_ON((len % 4) != 0);
>
> /* transfer the data from the flash */
> @@ -873,16 +908,19 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
> DENALI_READ) == PASS) {
> read_data_from_flash_mem(denali, buf, mtd->oobsize);
>
> - /* wait for command to be accepted
> - * can always use status0 bit as the mask is identical for each
> - * bank. */
> + /*
> + * wait for command to be accepted
> + * can always use status0 bit as the
> + * mask is identical for each bank.
> + */
> irq_status = wait_for_irq(denali, irq_mask);
>
> if (irq_status == 0)
> dev_err(denali->dev, "page on OOB timeout %d\n",
> denali->page);
>
> - /* We set the device back to MAIN_ACCESS here as I observed
> + /*
> + * We set the device back to MAIN_ACCESS here as I observed
> * instability with the controller if you do a block erase
> * and the last transaction was a SPARE_ACCESS. Block erase
> * is reliable (according to the MTD test infrastructure)
> @@ -894,7 +932,8 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
> }
> }
>
> -/* this function examines buffers to see if they contain data that
> +/*
> + * this function examines buffers to see if they contain data that
> * indicate that the buffer is part of an erased region of flash.
> */
> static bool is_erased(uint8_t *buf, int len)
> @@ -940,13 +979,14 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
> err_device = ECC_ERR_DEVICE(err_correction_info);
>
> if (ECC_ERROR_CORRECTABLE(err_correction_info)) {
> - /* If err_byte is larger than ECC_SECTOR_SIZE,
> + /*
> + * If err_byte is larger than ECC_SECTOR_SIZE,
> * means error happened in OOB, so we ignore
> * it. It's no need for us to correct it
> * err_device is represented the NAND error
> * bits are happened in if there are more
> * than one NAND connected.
> - * */
> + */
> if (err_byte < ECC_SECTOR_SIZE) {
> int offset;
> offset = (err_sector *
> @@ -960,17 +1000,19 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
> bitflips++;
> }
> } else {
> - /* if the error is not correctable, need to
> + /*
> + * if the error is not correctable, need to
> * look at the page to see if it is an erased
> * page. if so, then it's not a real ECC error
> - * */
> + */
> check_erased_page = true;
> }
> } while (!ECC_LAST_ERR(err_correction_info));
> - /* Once handle all ecc errors, controller will triger
> + /*
> + * Once handle all ecc errors, controller will triger
> * a ECC_TRANSACTION_DONE interrupt, so here just wait
> * for a while for this interrupt
> - * */
> + */
> while (!(read_interrupt_status(denali) &
> INTR_STATUS__ECC_TRANSACTION_DONE))
> cpu_relax();
> @@ -1013,12 +1055,14 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
> /* 3. set memory low address bits 23:8 */
> index_addr(denali, mode | ((uint16_t)addr << 8), 0x2300);
>
> - /* 4. interrupt when complete, burst len = 64 bytes*/
> + /* 4. interrupt when complete, burst len = 64 bytes */
> index_addr(denali, mode | 0x14000, 0x2400);
> }
>
> -/* writes a page. user specifies type, and this function handles the
> - * configuration details. */
> +/*
> + * writes a page. user specifies type, and this function handles the
> + * configuration details.
> + */
> static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
> const uint8_t *buf, bool raw_xfer)
> {
> @@ -1031,8 +1075,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
> uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
> INTR_STATUS__PROGRAM_FAIL;
>
> - /* if it is a raw xfer, we want to disable ecc, and send
> - * the spare area.
> + /*
> + * if it is a raw xfer, we want to disable ecc and send the spare area.
> * !raw_xfer - enable ecc
> * raw_xfer - transfer spare
> */
> @@ -1075,27 +1119,33 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
>
> /* NAND core entry points */
>
> -/* this is the callback that the NAND core calls to write a page. Since
> +/*
> + * this is the callback that the NAND core calls to write a page. Since
> * writing a page with ECC or without is similar, all the work is done
> * by write_page above.
> - * */
> + */
> static int denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,
> const uint8_t *buf, int oob_required)
> {
> - /* for regular page writes, we let HW handle all the ECC
> - * data written to the device. */
> + /*
> + * for regular page writes, we let HW handle all the ECC
> + * data written to the device.
> + */
> return write_page(mtd, chip, buf, false);
> }
>
> -/* This is the callback that the NAND core calls to write a page without ECC.
> +/*
> + * This is the callback that the NAND core calls to write a page without ECC.
> * raw access is similar to ECC page writes, so all the work is done in the
> * write_page() function above.
> */
> static int denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
> const uint8_t *buf, int oob_required)
> {
> - /* for raw page writes, we want to disable ECC and simply write
> - whatever data is in the buffer. */
> + /*
> + * for raw page writes, we want to disable ECC and simply write
> + * whatever data is in the buffer.
> + */
> return write_page(mtd, chip, buf, true);
> }
>
> @@ -1240,7 +1290,6 @@ static int denali_erase(struct mtd_info *mtd, int page)
>
> uint32_t cmd = 0x0, irq_status = 0;
>
> - /* clear interrupts */
> clear_interrupts(denali);
>
> /* setup page read request for access type */
> @@ -1270,10 +1319,11 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
> case NAND_CMD_READID:
> case NAND_CMD_PARAM:
> reset_buf(denali);
> - /*sometimes ManufactureId read from register is not right
> + /*
> + * sometimes ManufactureId read from register is not right
> * e.g. some of Micron MT29F32G08QAA MLC NAND chips
> * So here we send READID cmd to NAND insteand
> - * */
> + */
> addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
> index_addr(denali, (uint32_t)addr | 0, 0x90);
> index_addr(denali, (uint32_t)addr | 1, 0);
> @@ -1333,11 +1383,12 @@ static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
> /* Initialization code to bring the device up to a known good state */
> static void denali_hw_init(struct denali_nand_info *denali)
> {
> - /* tell driver how many bit controller will skip before
> + /*
> + * tell driver how many bit controller will skip before
> * writing ECC code in OOB, this register may be already
> * set by firmware. So we read this value out.
> * if this value is 0, just let it be.
> - * */
> + */
> denali->bbtskipbytes = ioread32(denali->flash_reg +
> SPARE_AREA_SKIP_BYTES);
> detect_max_banks(denali);
> @@ -1355,10 +1406,11 @@ static void denali_hw_init(struct denali_nand_info *denali)
> denali_irq_init(denali);
> }
>
> -/* Althogh controller spec said SLC ECC is forceb to be 4bit,
> +/*
> + * Althogh controller spec said SLC ECC is forceb to be 4bit,
> * but denali controller in MRST only support 15bit and 8bit ECC
> * correction
> - * */
> + */
> #define ECC_8BITS 14
> static struct nand_ecclayout nand_8bit_oob = {
> .eccbytes = 14,
> @@ -1398,13 +1450,16 @@ static void denali_drv_init(struct denali_nand_info *denali)
> denali->idx = 0;
>
> /* setup interrupt handler */
> - /* the completion object will be used to notify
> - * the callee that the interrupt is done */
> + /*
> + * the completion object will be used to notify
> + * the callee that the interrupt is done
> + */
> init_completion(&denali->complete);
>
> - /* the spinlock will be used to synchronize the ISR
> - * with any element that might be access shared
> - * data (interrupt status) */
> + /*
> + * the spinlock will be used to synchronize the ISR with any
> + * element that might be access shared data (interrupt status)
> + */
> spin_lock_init(&denali->irq_lock);
>
> /* indicate that MTD has not selected a valid bank yet */
> @@ -1419,7 +1474,8 @@ int denali_init(struct denali_nand_info *denali)
> int ret;
>
> if (denali->platform == INTEL_CE4100) {
> - /* Due to a silicon limitation, we can only support
> + /*
> + * Due to a silicon limitation, we can only support
> * ONFI timing mode 1 and below.
> */
> if (onfi_timing_mode < -1 || onfi_timing_mode > 1) {
> @@ -1438,8 +1494,10 @@ int denali_init(struct denali_nand_info *denali)
> denali_hw_init(denali);
> denali_drv_init(denali);
>
> - /* denali_isr register is done after all the hardware
> - * initilization is finished*/
> + /*
> + * denali_isr register is done after all the hardware
> + * initilization is finished
> + */
> if (request_irq(denali->irq, denali_isr, IRQF_SHARED,
> DENALI_NAND_NAME, denali)) {
> pr_err("Spectra: Unable to allocate IRQ\n");
> @@ -1458,9 +1516,11 @@ int denali_init(struct denali_nand_info *denali)
> denali->nand.read_byte = denali_read_byte;
> denali->nand.waitfunc = denali_waitfunc;
>
> - /* scan for NAND devices attached to the controller
> + /*
> + * scan for NAND devices attached to the controller
> * this is the first stage in a two step process to register
> - * with the nand subsystem */
> + * with the nand subsystem
> + */
> if (nand_scan_ident(&denali->mtd, denali->max_banks, NULL)) {
> ret = -ENXIO;
> goto failed_req_irq;
> @@ -1492,10 +1552,10 @@ int denali_init(struct denali_nand_info *denali)
> goto failed_req_irq;
> }
>
> - /* support for multi nand
> - * MTD known nothing about multi nand,
> - * so we should tell it the real pagesize
> - * and anything necessery
> + /*
> + * support for multi nand
> + * MTD known nothing about multi nand, so we should tell it
> + * the real pagesize and anything necessery
> */
> denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED);
> denali->nand.chipsize <<= (denali->devnum - 1);
> @@ -1511,9 +1571,11 @@ int denali_init(struct denali_nand_info *denali)
> denali->mtd.size = denali->nand.numchips * denali->nand.chipsize;
> denali->bbtskipbytes *= denali->devnum;
>
> - /* second stage of the NAND scan
> + /*
> + * second stage of the NAND scan
> * this stage requires information regarding ECC and
> - * bad block management. */
> + * bad block management.
> + */
>
> /* Bad block management */
> denali->nand.bbt_td = &bbt_main_descr;
> @@ -1524,7 +1586,8 @@ int denali_init(struct denali_nand_info *denali)
> denali->nand.options |= NAND_SKIP_BBTSCAN;
> denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
>
> - /* Denali Controller only support 15bit and 8bit ECC in MRST,
> + /*
> + * Denali Controller only support 15bit and 8bit ECC in MRST,
> * so just let controller do 15bit ECC for MLC and 8bit ECC for
> * SLC if possible.
> * */
> @@ -1560,18 +1623,20 @@ int denali_init(struct denali_nand_info *denali)
> denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes -
> denali->bbtskipbytes;
>
> - /* Let driver know the total blocks number and
> - * how many blocks contained by each nand chip.
> - * blksperchip will help driver to know how many
> - * blocks is taken by FW.
> - * */
> + /*
> + * Let driver know the total blocks number and how many blocks
> + * contained by each nand chip. blksperchip will help driver to
> + * know how many blocks is taken by FW.
> + */
> denali->totalblks = denali->mtd.size >>
> denali->nand.phys_erase_shift;
> denali->blksperchip = denali->totalblks / denali->nand.numchips;
>
> - /* These functions are required by the NAND core framework, otherwise,
> + /*
> + * These functions are required by the NAND core framework, otherwise,
> * the NAND core will assert. However, we don't need them, so we'll stub
> - * them out. */
> + * them out.
> + */
> denali->nand.ecc.calculate = denali_ecc_calculate;
> denali->nand.ecc.correct = denali_ecc_correct;
> denali->nand.ecc.hwctl = denali_ecc_hwctl;
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 2/7] mtd: denali: remove unnecessary variable initializations
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:10 ` Masahiro Yamada
-1 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: David Woodhouse, Josh Triplett, linux-kernel, Masahiro Yamada,
Rashika Kheria, grmoore@altera.com, Brian Norris, Huang Shijie
All of these variables are initialized to zero and then
set to a different value below.
Zero-initializing is redundant.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 59 ++++++++++++++++++++++-------------------------
1 file changed, 27 insertions(+), 32 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 44a5f159..3836828 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -146,7 +146,7 @@ static void write_byte_to_buf(struct denali_nand_info *denali, uint8_t byte)
/* reads the status of the device */
static void read_status(struct denali_nand_info *denali)
{
- uint32_t cmd = 0x0;
+ uint32_t cmd;
/* initialize the data buffer to store status */
reset_buf(denali);
@@ -161,7 +161,7 @@ static void read_status(struct denali_nand_info *denali)
/* resets a specific device connected to the core */
static void reset_bank(struct denali_nand_info *denali)
{
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__RST_COMP |
INTR_STATUS__TIME_OUT;
@@ -581,7 +581,7 @@ static inline bool is_flash_bank_valid(int flash_bank)
static void denali_irq_init(struct denali_nand_info *denali)
{
- uint32_t int_mask = 0;
+ uint32_t int_mask;
int i;
/* Disable global interrupts */
@@ -624,7 +624,7 @@ static inline uint32_t denali_irq_detected(struct denali_nand_info *denali)
static inline void clear_interrupt(struct denali_nand_info *denali,
uint32_t irq_mask)
{
- uint32_t intr_status_reg = 0;
+ uint32_t intr_status_reg;
intr_status_reg = INTR_STATUS(denali->flash_bank);
@@ -633,7 +633,8 @@ static inline void clear_interrupt(struct denali_nand_info *denali,
static void clear_interrupts(struct denali_nand_info *denali)
{
- uint32_t status = 0x0;
+ uint32_t status;
+
spin_lock_irq(&denali->irq_lock);
status = read_interrupt_status(denali);
@@ -645,7 +646,7 @@ static void clear_interrupts(struct denali_nand_info *denali)
static uint32_t read_interrupt_status(struct denali_nand_info *denali)
{
- uint32_t intr_status_reg = 0;
+ uint32_t intr_status_reg;
intr_status_reg = INTR_STATUS(denali->flash_bank);
@@ -659,7 +660,7 @@ static uint32_t read_interrupt_status(struct denali_nand_info *denali)
static irqreturn_t denali_isr(int irq, void *dev_id)
{
struct denali_nand_info *denali = dev_id;
- uint32_t irq_status = 0x0;
+ uint32_t irq_status;
irqreturn_t result = IRQ_NONE;
spin_lock(&denali->irq_lock);
@@ -693,8 +694,8 @@ static irqreturn_t denali_isr(int irq, void *dev_id)
static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
{
- unsigned long comp_res = 0;
- uint32_t intr_status = 0;
+ unsigned long comp_res;
+ uint32_t intr_status;
bool retry = false;
unsigned long timeout = msecs_to_jiffies(1000);
@@ -736,7 +737,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
bool transfer_spare)
{
- int ecc_en_flag = 0, transfer_spare_flag = 0;
+ int ecc_en_flag, transfer_spare_flag;
/* set ECC, transfer spare bits if needed */
ecc_en_flag = ecc_en ? ECC_ENABLE__FLAG : 0;
@@ -759,8 +760,8 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
int op)
{
int status = PASS;
- uint32_t addr = 0x0, cmd = 0x0, page_count = 1, irq_status = 0,
- irq_mask = 0;
+ uint32_t page_count = 1;
+ uint32_t addr, cmd, irq_status, irq_mask;
if (op == DENALI_READ)
irq_mask = INTR_STATUS__LOAD_COMP;
@@ -829,7 +830,7 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
const uint8_t *buf,
int len)
{
- uint32_t i = 0, *buf32;
+ uint32_t i, *buf32;
/*
* verify that the len is a multiple of 4.
@@ -849,7 +850,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
uint8_t *buf,
int len)
{
- uint32_t i = 0, *buf32;
+ uint32_t i, *buf32;
/*
* we assume that len will be a multiple of 4, if not it would be nice
@@ -870,7 +871,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__PROGRAM_COMP |
INTR_STATUS__PROGRAM_FAIL;
int status = 0;
@@ -899,8 +900,8 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- uint32_t irq_mask = INTR_STATUS__LOAD_COMP,
- irq_status = 0, addr = 0x0, cmd = 0x0;
+ uint32_t irq_mask = INTR_STATUS__LOAD_COMP;
+ uint32_t irq_status, addr, cmd;
denali->page = page;
@@ -938,7 +939,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
*/
static bool is_erased(uint8_t *buf, int len)
{
- int i = 0;
+ int i;
for (i = 0; i < len; i++)
if (buf[i] != 0xFF)
return false;
@@ -961,9 +962,8 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
if (irq_status & INTR_STATUS__ECC_ERR) {
/* read the ECC errors. we'll ignore them for now */
- uint32_t err_address = 0, err_correction_info = 0;
- uint32_t err_byte = 0, err_sector = 0, err_device = 0;
- uint32_t err_correction_value = 0;
+ uint32_t err_address, err_correction_info, err_byte,
+ err_sector, err_device, err_correction_value;
denali_set_intr_modes(denali, false);
do {
@@ -1026,19 +1026,14 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
/* programs the controller to either enable/disable DMA transfers */
static void denali_enable_dma(struct denali_nand_info *denali, bool en)
{
- uint32_t reg_val = 0x0;
-
- if (en)
- reg_val = DMA_ENABLE__FLAG;
-
- iowrite32(reg_val, denali->flash_reg + DMA_ENABLE);
+ iowrite32(en ? DMA_ENABLE__FLAG : 0, denali->flash_reg + DMA_ENABLE);
ioread32(denali->flash_reg + DMA_ENABLE);
}
/* setups the HW to perform the data DMA */
static void denali_setup_dma(struct denali_nand_info *denali, int op)
{
- uint32_t mode = 0x0;
+ uint32_t mode;
const int page_count = 1;
dma_addr_t addr = denali->buf.dma_buf;
@@ -1071,7 +1066,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
INTR_STATUS__PROGRAM_FAIL;
@@ -1172,7 +1167,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__ECC_TRANSACTION_DONE |
INTR_STATUS__ECC_ERR;
bool check_erased_page = false;
@@ -1224,7 +1219,7 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP;
if (page != denali->page) {
@@ -1288,7 +1283,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- uint32_t cmd = 0x0, irq_status = 0;
+ uint32_t cmd, irq_status;
clear_interrupts(denali);
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 2/7] mtd: denali: remove unnecessary variable initializations
@ 2014-09-08 8:10 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Masahiro Yamada, David Woodhouse, Brian Norris, Josh Triplett,
Huang Shijie, Rashika Kheria, grmoore@altera.com, linux-kernel
All of these variables are initialized to zero and then
set to a different value below.
Zero-initializing is redundant.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 59 ++++++++++++++++++++++-------------------------
1 file changed, 27 insertions(+), 32 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 44a5f159..3836828 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -146,7 +146,7 @@ static void write_byte_to_buf(struct denali_nand_info *denali, uint8_t byte)
/* reads the status of the device */
static void read_status(struct denali_nand_info *denali)
{
- uint32_t cmd = 0x0;
+ uint32_t cmd;
/* initialize the data buffer to store status */
reset_buf(denali);
@@ -161,7 +161,7 @@ static void read_status(struct denali_nand_info *denali)
/* resets a specific device connected to the core */
static void reset_bank(struct denali_nand_info *denali)
{
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__RST_COMP |
INTR_STATUS__TIME_OUT;
@@ -581,7 +581,7 @@ static inline bool is_flash_bank_valid(int flash_bank)
static void denali_irq_init(struct denali_nand_info *denali)
{
- uint32_t int_mask = 0;
+ uint32_t int_mask;
int i;
/* Disable global interrupts */
@@ -624,7 +624,7 @@ static inline uint32_t denali_irq_detected(struct denali_nand_info *denali)
static inline void clear_interrupt(struct denali_nand_info *denali,
uint32_t irq_mask)
{
- uint32_t intr_status_reg = 0;
+ uint32_t intr_status_reg;
intr_status_reg = INTR_STATUS(denali->flash_bank);
@@ -633,7 +633,8 @@ static inline void clear_interrupt(struct denali_nand_info *denali,
static void clear_interrupts(struct denali_nand_info *denali)
{
- uint32_t status = 0x0;
+ uint32_t status;
+
spin_lock_irq(&denali->irq_lock);
status = read_interrupt_status(denali);
@@ -645,7 +646,7 @@ static void clear_interrupts(struct denali_nand_info *denali)
static uint32_t read_interrupt_status(struct denali_nand_info *denali)
{
- uint32_t intr_status_reg = 0;
+ uint32_t intr_status_reg;
intr_status_reg = INTR_STATUS(denali->flash_bank);
@@ -659,7 +660,7 @@ static uint32_t read_interrupt_status(struct denali_nand_info *denali)
static irqreturn_t denali_isr(int irq, void *dev_id)
{
struct denali_nand_info *denali = dev_id;
- uint32_t irq_status = 0x0;
+ uint32_t irq_status;
irqreturn_t result = IRQ_NONE;
spin_lock(&denali->irq_lock);
@@ -693,8 +694,8 @@ static irqreturn_t denali_isr(int irq, void *dev_id)
static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
{
- unsigned long comp_res = 0;
- uint32_t intr_status = 0;
+ unsigned long comp_res;
+ uint32_t intr_status;
bool retry = false;
unsigned long timeout = msecs_to_jiffies(1000);
@@ -736,7 +737,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
bool transfer_spare)
{
- int ecc_en_flag = 0, transfer_spare_flag = 0;
+ int ecc_en_flag, transfer_spare_flag;
/* set ECC, transfer spare bits if needed */
ecc_en_flag = ecc_en ? ECC_ENABLE__FLAG : 0;
@@ -759,8 +760,8 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
int op)
{
int status = PASS;
- uint32_t addr = 0x0, cmd = 0x0, page_count = 1, irq_status = 0,
- irq_mask = 0;
+ uint32_t page_count = 1;
+ uint32_t addr, cmd, irq_status, irq_mask;
if (op == DENALI_READ)
irq_mask = INTR_STATUS__LOAD_COMP;
@@ -829,7 +830,7 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
const uint8_t *buf,
int len)
{
- uint32_t i = 0, *buf32;
+ uint32_t i, *buf32;
/*
* verify that the len is a multiple of 4.
@@ -849,7 +850,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
uint8_t *buf,
int len)
{
- uint32_t i = 0, *buf32;
+ uint32_t i, *buf32;
/*
* we assume that len will be a multiple of 4, if not it would be nice
@@ -870,7 +871,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__PROGRAM_COMP |
INTR_STATUS__PROGRAM_FAIL;
int status = 0;
@@ -899,8 +900,8 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- uint32_t irq_mask = INTR_STATUS__LOAD_COMP,
- irq_status = 0, addr = 0x0, cmd = 0x0;
+ uint32_t irq_mask = INTR_STATUS__LOAD_COMP;
+ uint32_t irq_status, addr, cmd;
denali->page = page;
@@ -938,7 +939,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
*/
static bool is_erased(uint8_t *buf, int len)
{
- int i = 0;
+ int i;
for (i = 0; i < len; i++)
if (buf[i] != 0xFF)
return false;
@@ -961,9 +962,8 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
if (irq_status & INTR_STATUS__ECC_ERR) {
/* read the ECC errors. we'll ignore them for now */
- uint32_t err_address = 0, err_correction_info = 0;
- uint32_t err_byte = 0, err_sector = 0, err_device = 0;
- uint32_t err_correction_value = 0;
+ uint32_t err_address, err_correction_info, err_byte,
+ err_sector, err_device, err_correction_value;
denali_set_intr_modes(denali, false);
do {
@@ -1026,19 +1026,14 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
/* programs the controller to either enable/disable DMA transfers */
static void denali_enable_dma(struct denali_nand_info *denali, bool en)
{
- uint32_t reg_val = 0x0;
-
- if (en)
- reg_val = DMA_ENABLE__FLAG;
-
- iowrite32(reg_val, denali->flash_reg + DMA_ENABLE);
+ iowrite32(en ? DMA_ENABLE__FLAG : 0, denali->flash_reg + DMA_ENABLE);
ioread32(denali->flash_reg + DMA_ENABLE);
}
/* setups the HW to perform the data DMA */
static void denali_setup_dma(struct denali_nand_info *denali, int op)
{
- uint32_t mode = 0x0;
+ uint32_t mode;
const int page_count = 1;
dma_addr_t addr = denali->buf.dma_buf;
@@ -1071,7 +1066,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
INTR_STATUS__PROGRAM_FAIL;
@@ -1172,7 +1167,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__ECC_TRANSACTION_DONE |
INTR_STATUS__ECC_ERR;
bool check_erased_page = false;
@@ -1224,7 +1219,7 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
- uint32_t irq_status = 0;
+ uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP;
if (page != denali->page) {
@@ -1288,7 +1283,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- uint32_t cmd = 0x0, irq_status = 0;
+ uint32_t cmd, irq_status;
clear_interrupts(denali);
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 3/7] mtd: denali: remove unnecessary casts
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:10 ` Masahiro Yamada
-1 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: David Woodhouse, Josh Triplett, linux-kernel, Masahiro Yamada,
Rashika Kheria, grmoore@altera.com, Brian Norris, Huang Shijie
Useless casts result in unreadable source code.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 36 ++++++++++++++++++------------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 3836828..dcd6771 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -423,10 +423,10 @@ static void find_valid_banks(struct denali_nand_info *denali)
denali->total_used_banks = 1;
for (i = 0; i < denali->max_banks; i++) {
- index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 0), 0x90);
- index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 1), 0);
+ index_addr(denali, MODE_11 | (i << 24) | 0, 0x90);
+ index_addr(denali, MODE_11 | (i << 24) | 1, 0);
index_addr_read_data(denali,
- (uint32_t)(MODE_11 | (i << 24) | 2), &id[i]);
+ MODE_11 | (i << 24) | 2, &id[i]);
dev_dbg(denali->dev,
"Return 1st ID for bank[%d]: %x\n", i, id[i]);
@@ -510,9 +510,9 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
* For some NAND chips, controller can't report the correct
* device ID by reading from DEVICE_ID register
*/
- addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
- index_addr(denali, (uint32_t)addr | 0, 0x90);
- index_addr(denali, (uint32_t)addr | 1, 0);
+ addr = MODE_11 | BANK(denali->flash_bank);
+ index_addr(denali, addr | 0, 0x90);
+ index_addr(denali, addr | 1, 0);
for (i = 0; i < 8; i++)
index_addr_read_data(denali, addr | 2, &id_bytes[i]);
maf_id = id_bytes[0];
@@ -782,14 +782,14 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
} else if (op == DENALI_WRITE && access_type == SPARE_ACCESS) {
/* read spare area */
cmd = MODE_10 | addr;
- index_addr(denali, (uint32_t)cmd, access_type);
+ index_addr(denali, cmd, access_type);
cmd = MODE_01 | addr;
iowrite32(cmd, denali->flash_mem);
} else if (op == DENALI_READ) {
/* setup page read request for access type */
cmd = MODE_10 | addr;
- index_addr(denali, (uint32_t)cmd, access_type);
+ index_addr(denali, cmd, access_type);
/*
* page 33 of the NAND controller spec indicates we should not
@@ -800,7 +800,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
cmd = MODE_01 | addr;
iowrite32(cmd, denali->flash_mem);
} else {
- index_addr(denali, (uint32_t)cmd,
+ index_addr(denali, cmd,
PIPELINE_ACCESS | op | page_count);
/*
@@ -929,7 +929,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
*/
addr = BANK(denali->flash_bank) | denali->page;
cmd = MODE_10 | addr;
- index_addr(denali, (uint32_t)cmd, MAIN_ACCESS);
+ index_addr(denali, cmd, MAIN_ACCESS);
}
}
@@ -1035,7 +1035,7 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
{
uint32_t mode;
const int page_count = 1;
- dma_addr_t addr = denali->buf.dma_buf;
+ uint32_t addr = denali->buf.dma_buf;
mode = MODE_10 | BANK(denali->flash_bank);
@@ -1045,10 +1045,10 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
index_addr(denali, mode | denali->page, 0x2000 | op | page_count);
/* 2. set memory high address bits 23:8 */
- index_addr(denali, mode | ((uint16_t)(addr >> 16) << 8), 0x2200);
+ index_addr(denali, mode | ((addr >> 16) << 8), 0x2200);
/* 3. set memory low address bits 23:8 */
- index_addr(denali, mode | ((uint16_t)addr << 8), 0x2300);
+ index_addr(denali, mode | ((addr & 0xff) << 8), 0x2300);
/* 4. interrupt when complete, burst len = 64 bytes */
index_addr(denali, mode | 0x14000, 0x2400);
@@ -1289,7 +1289,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
/* setup page read request for access type */
cmd = MODE_10 | BANK(denali->flash_bank) | page;
- index_addr(denali, (uint32_t)cmd, 0x1);
+ index_addr(denali, cmd, 0x1);
/* wait for erase to complete or failure to occur */
irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
@@ -1319,12 +1319,12 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
* e.g. some of Micron MT29F32G08QAA MLC NAND chips
* So here we send READID cmd to NAND insteand
*/
- addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
- index_addr(denali, (uint32_t)addr | 0, 0x90);
- index_addr(denali, (uint32_t)addr | 1, 0);
+ addr = MODE_11 | BANK(denali->flash_bank);
+ index_addr(denali, addr | 0, 0x90);
+ index_addr(denali, addr | 1, 0);
for (i = 0; i < 8; i++) {
index_addr_read_data(denali,
- (uint32_t)addr | 2,
+ addr | 2,
&id);
write_byte_to_buf(denali, id);
}
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 3/7] mtd: denali: remove unnecessary casts
@ 2014-09-08 8:10 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Masahiro Yamada, David Woodhouse, Brian Norris, Josh Triplett,
Huang Shijie, grmoore@altera.com, Rashika Kheria, linux-kernel
Useless casts result in unreadable source code.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 36 ++++++++++++++++++------------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 3836828..dcd6771 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -423,10 +423,10 @@ static void find_valid_banks(struct denali_nand_info *denali)
denali->total_used_banks = 1;
for (i = 0; i < denali->max_banks; i++) {
- index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 0), 0x90);
- index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 1), 0);
+ index_addr(denali, MODE_11 | (i << 24) | 0, 0x90);
+ index_addr(denali, MODE_11 | (i << 24) | 1, 0);
index_addr_read_data(denali,
- (uint32_t)(MODE_11 | (i << 24) | 2), &id[i]);
+ MODE_11 | (i << 24) | 2, &id[i]);
dev_dbg(denali->dev,
"Return 1st ID for bank[%d]: %x\n", i, id[i]);
@@ -510,9 +510,9 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
* For some NAND chips, controller can't report the correct
* device ID by reading from DEVICE_ID register
*/
- addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
- index_addr(denali, (uint32_t)addr | 0, 0x90);
- index_addr(denali, (uint32_t)addr | 1, 0);
+ addr = MODE_11 | BANK(denali->flash_bank);
+ index_addr(denali, addr | 0, 0x90);
+ index_addr(denali, addr | 1, 0);
for (i = 0; i < 8; i++)
index_addr_read_data(denali, addr | 2, &id_bytes[i]);
maf_id = id_bytes[0];
@@ -782,14 +782,14 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
} else if (op == DENALI_WRITE && access_type == SPARE_ACCESS) {
/* read spare area */
cmd = MODE_10 | addr;
- index_addr(denali, (uint32_t)cmd, access_type);
+ index_addr(denali, cmd, access_type);
cmd = MODE_01 | addr;
iowrite32(cmd, denali->flash_mem);
} else if (op == DENALI_READ) {
/* setup page read request for access type */
cmd = MODE_10 | addr;
- index_addr(denali, (uint32_t)cmd, access_type);
+ index_addr(denali, cmd, access_type);
/*
* page 33 of the NAND controller spec indicates we should not
@@ -800,7 +800,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
cmd = MODE_01 | addr;
iowrite32(cmd, denali->flash_mem);
} else {
- index_addr(denali, (uint32_t)cmd,
+ index_addr(denali, cmd,
PIPELINE_ACCESS | op | page_count);
/*
@@ -929,7 +929,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
*/
addr = BANK(denali->flash_bank) | denali->page;
cmd = MODE_10 | addr;
- index_addr(denali, (uint32_t)cmd, MAIN_ACCESS);
+ index_addr(denali, cmd, MAIN_ACCESS);
}
}
@@ -1035,7 +1035,7 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
{
uint32_t mode;
const int page_count = 1;
- dma_addr_t addr = denali->buf.dma_buf;
+ uint32_t addr = denali->buf.dma_buf;
mode = MODE_10 | BANK(denali->flash_bank);
@@ -1045,10 +1045,10 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
index_addr(denali, mode | denali->page, 0x2000 | op | page_count);
/* 2. set memory high address bits 23:8 */
- index_addr(denali, mode | ((uint16_t)(addr >> 16) << 8), 0x2200);
+ index_addr(denali, mode | ((addr >> 16) << 8), 0x2200);
/* 3. set memory low address bits 23:8 */
- index_addr(denali, mode | ((uint16_t)addr << 8), 0x2300);
+ index_addr(denali, mode | ((addr & 0xff) << 8), 0x2300);
/* 4. interrupt when complete, burst len = 64 bytes */
index_addr(denali, mode | 0x14000, 0x2400);
@@ -1289,7 +1289,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
/* setup page read request for access type */
cmd = MODE_10 | BANK(denali->flash_bank) | page;
- index_addr(denali, (uint32_t)cmd, 0x1);
+ index_addr(denali, cmd, 0x1);
/* wait for erase to complete or failure to occur */
irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
@@ -1319,12 +1319,12 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
* e.g. some of Micron MT29F32G08QAA MLC NAND chips
* So here we send READID cmd to NAND insteand
*/
- addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
- index_addr(denali, (uint32_t)addr | 0, 0x90);
- index_addr(denali, (uint32_t)addr | 1, 0);
+ addr = MODE_11 | BANK(denali->flash_bank);
+ index_addr(denali, addr | 0, 0x90);
+ index_addr(denali, addr | 1, 0);
for (i = 0; i < 8; i++) {
index_addr_read_data(denali,
- (uint32_t)addr | 2,
+ addr | 2,
&id);
write_byte_to_buf(denali, id);
}
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 4/7] mtd: denali: change the type of iterators to int
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:10 ` Masahiro Yamada
-1 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: David Woodhouse, Josh Triplett, linux-kernel, Masahiro Yamada,
Rashika Kheria, grmoore@altera.com, Brian Norris, Huang Shijie
We should rathar use "int" type for loop iterators.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index dcd6771..259ca0ba 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -178,7 +178,7 @@ static void reset_bank(struct denali_nand_info *denali)
/* Reset the flash controller */
static uint16_t denali_nand_reset(struct denali_nand_info *denali)
{
- uint32_t i;
+ int i;
dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
__FILE__, __LINE__, __func__);
@@ -499,7 +499,8 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
{
uint16_t status = PASS;
uint32_t id_bytes[8], addr;
- uint8_t i, maf_id, device_id;
+ uint8_t maf_id, device_id;
+ int i;
dev_dbg(denali->dev,
"%s, Line %d, Function: %s\n",
@@ -830,7 +831,8 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
const uint8_t *buf,
int len)
{
- uint32_t i, *buf32;
+ uint32_t *buf32;
+ int i;
/*
* verify that the len is a multiple of 4.
@@ -850,7 +852,8 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
uint8_t *buf,
int len)
{
- uint32_t i, *buf32;
+ uint32_t *buf32;
+ int i;
/*
* we assume that len will be a multiple of 4, if not it would be nice
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 4/7] mtd: denali: change the type of iterators to int
@ 2014-09-08 8:10 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Masahiro Yamada, David Woodhouse, Brian Norris, Josh Triplett,
Huang Shijie, Rashika Kheria, grmoore@altera.com, linux-kernel
We should rathar use "int" type for loop iterators.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index dcd6771..259ca0ba 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -178,7 +178,7 @@ static void reset_bank(struct denali_nand_info *denali)
/* Reset the flash controller */
static uint16_t denali_nand_reset(struct denali_nand_info *denali)
{
- uint32_t i;
+ int i;
dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
__FILE__, __LINE__, __func__);
@@ -499,7 +499,8 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
{
uint16_t status = PASS;
uint32_t id_bytes[8], addr;
- uint8_t i, maf_id, device_id;
+ uint8_t maf_id, device_id;
+ int i;
dev_dbg(denali->dev,
"%s, Line %d, Function: %s\n",
@@ -830,7 +831,8 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
const uint8_t *buf,
int len)
{
- uint32_t i, *buf32;
+ uint32_t *buf32;
+ int i;
/*
* verify that the len is a multiple of 4.
@@ -850,7 +852,8 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
uint8_t *buf,
int len)
{
- uint32_t i, *buf32;
+ uint32_t *buf32;
+ int i;
/*
* we assume that len will be a multiple of 4, if not it would be nice
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 5/7] mtd: denali: remove a set-but-unused variable
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:10 ` Masahiro Yamada
-1 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: David Woodhouse, Josh Triplett, linux-kernel, Masahiro Yamada,
Rashika Kheria, grmoore@altera.com, Brian Norris, Huang Shijie
The variable "retry" in wait_for_irq() is set, but not referenced.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 259ca0ba..d37c2e1 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -697,7 +697,6 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
{
unsigned long comp_res;
uint32_t intr_status;
- bool retry = false;
unsigned long timeout = msecs_to_jiffies(1000);
do {
@@ -717,7 +716,6 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
* need to wait again
*/
spin_unlock_irq(&denali->irq_lock);
- retry = true;
}
} while (comp_res != 0);
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 5/7] mtd: denali: remove a set-but-unused variable
@ 2014-09-08 8:10 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Masahiro Yamada, David Woodhouse, Brian Norris, Josh Triplett,
Huang Shijie, Rashika Kheria, grmoore@altera.com, linux-kernel
The variable "retry" in wait_for_irq() is set, but not referenced.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 259ca0ba..d37c2e1 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -697,7 +697,6 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
{
unsigned long comp_res;
uint32_t intr_status;
- bool retry = false;
unsigned long timeout = msecs_to_jiffies(1000);
do {
@@ -717,7 +716,6 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
* need to wait again
*/
spin_unlock_irq(&denali->irq_lock);
- retry = true;
}
} while (comp_res != 0);
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH 5/7] mtd: denali: remove a set-but-unused variable
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:30 ` Josh Triplett
-1 siblings, 0 replies; 28+ messages in thread
From: Josh Triplett @ 2014-09-08 8:30 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Huang Shijie, linux-kernel, Rashika Kheria, linux-mtd,
grmoore@altera.com, Brian Norris, David Woodhouse
On Mon, Sep 08, 2014 at 05:10:11PM +0900, Masahiro Yamada wrote:
> The variable "retry" in wait_for_irq() is set, but not referenced.
>
> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Sure enough.
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
>
> drivers/mtd/nand/denali.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index 259ca0ba..d37c2e1 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -697,7 +697,6 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
> {
> unsigned long comp_res;
> uint32_t intr_status;
> - bool retry = false;
> unsigned long timeout = msecs_to_jiffies(1000);
>
> do {
> @@ -717,7 +716,6 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
> * need to wait again
> */
> spin_unlock_irq(&denali->irq_lock);
> - retry = true;
> }
> } while (comp_res != 0);
>
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 5/7] mtd: denali: remove a set-but-unused variable
@ 2014-09-08 8:30 ` Josh Triplett
0 siblings, 0 replies; 28+ messages in thread
From: Josh Triplett @ 2014-09-08 8:30 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-mtd, David Woodhouse, Brian Norris, Huang Shijie,
Rashika Kheria, grmoore@altera.com, linux-kernel
On Mon, Sep 08, 2014 at 05:10:11PM +0900, Masahiro Yamada wrote:
> The variable "retry" in wait_for_irq() is set, but not referenced.
>
> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Sure enough.
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
>
> drivers/mtd/nand/denali.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index 259ca0ba..d37c2e1 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -697,7 +697,6 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
> {
> unsigned long comp_res;
> uint32_t intr_status;
> - bool retry = false;
> unsigned long timeout = msecs_to_jiffies(1000);
>
> do {
> @@ -717,7 +716,6 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
> * need to wait again
> */
> spin_unlock_irq(&denali->irq_lock);
> - retry = true;
> }
> } while (comp_res != 0);
>
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 6/7] mtd: denali: remove unnecessary parentheses
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:10 ` Masahiro Yamada
-1 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: David Woodhouse, Josh Triplett, linux-kernel, Masahiro Yamada,
Rashika Kheria, grmoore@altera.com, Brian Norris, Huang Shijie
We should use parentheses only when they are necessary
or they really improve the readability.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index d37c2e1..ed37b76 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -267,10 +267,10 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
acc_clks = CEIL_DIV(Trea[mode], CLK_X);
- while (((acc_clks * CLK_X) - Trea[mode]) < 3)
+ while (acc_clks * CLK_X - Trea[mode] < 3)
acc_clks++;
- if ((data_invalid - acc_clks * CLK_X) < 2)
+ if (data_invalid - acc_clks * CLK_X < 2)
dev_warn(denali->dev, "%s, Line %d: Warning!\n",
__FILE__, __LINE__);
@@ -285,7 +285,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
cs_cnt = 1;
if (Tcea[mode]) {
- while (((cs_cnt * CLK_X) + Trea[mode]) < Tcea[mode])
+ while (cs_cnt * CLK_X + Trea[mode] < Tcea[mode])
cs_cnt++;
}
@@ -295,8 +295,8 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
#endif
/* Sighting 3462430: Temporary hack for MT29F128G08CJABAWP:B */
- if ((ioread32(denali->flash_reg + MANUFACTURER_ID) == 0) &&
- (ioread32(denali->flash_reg + DEVICE_ID) == 0x88))
+ if (ioread32(denali->flash_reg + MANUFACTURER_ID) == 0 &&
+ ioread32(denali->flash_reg + DEVICE_ID) == 0x88)
acc_clks = 6;
iowrite32(acc_clks, denali->flash_reg + ACC_CLKS);
@@ -577,7 +577,7 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
*/
static inline bool is_flash_bank_valid(int flash_bank)
{
- return (flash_bank >= 0 && flash_bank < 4);
+ return flash_bank >= 0 && flash_bank < 4;
}
static void denali_irq_init(struct denali_nand_info *denali)
@@ -1103,7 +1103,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
"timeout on write_page (type = %d)\n",
raw_xfer);
denali->status =
- (irq_status & INTR_STATUS__PROGRAM_FAIL) ?
+ irq_status & INTR_STATUS__PROGRAM_FAIL ?
NAND_STATUS_FAIL : PASS;
}
@@ -1296,7 +1296,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
INTR_STATUS__ERASE_FAIL);
- return (irq_status & INTR_STATUS__ERASE_FAIL) ? NAND_STATUS_FAIL : PASS;
+ return irq_status & INTR_STATUS__ERASE_FAIL ? NAND_STATUS_FAIL : PASS;
}
static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 6/7] mtd: denali: remove unnecessary parentheses
@ 2014-09-08 8:10 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Masahiro Yamada, David Woodhouse, Brian Norris, Huang Shijie,
Josh Triplett, grmoore@altera.com, Rashika Kheria, linux-kernel
We should use parentheses only when they are necessary
or they really improve the readability.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index d37c2e1..ed37b76 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -267,10 +267,10 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
acc_clks = CEIL_DIV(Trea[mode], CLK_X);
- while (((acc_clks * CLK_X) - Trea[mode]) < 3)
+ while (acc_clks * CLK_X - Trea[mode] < 3)
acc_clks++;
- if ((data_invalid - acc_clks * CLK_X) < 2)
+ if (data_invalid - acc_clks * CLK_X < 2)
dev_warn(denali->dev, "%s, Line %d: Warning!\n",
__FILE__, __LINE__);
@@ -285,7 +285,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
cs_cnt = 1;
if (Tcea[mode]) {
- while (((cs_cnt * CLK_X) + Trea[mode]) < Tcea[mode])
+ while (cs_cnt * CLK_X + Trea[mode] < Tcea[mode])
cs_cnt++;
}
@@ -295,8 +295,8 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
#endif
/* Sighting 3462430: Temporary hack for MT29F128G08CJABAWP:B */
- if ((ioread32(denali->flash_reg + MANUFACTURER_ID) == 0) &&
- (ioread32(denali->flash_reg + DEVICE_ID) == 0x88))
+ if (ioread32(denali->flash_reg + MANUFACTURER_ID) == 0 &&
+ ioread32(denali->flash_reg + DEVICE_ID) == 0x88)
acc_clks = 6;
iowrite32(acc_clks, denali->flash_reg + ACC_CLKS);
@@ -577,7 +577,7 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
*/
static inline bool is_flash_bank_valid(int flash_bank)
{
- return (flash_bank >= 0 && flash_bank < 4);
+ return flash_bank >= 0 && flash_bank < 4;
}
static void denali_irq_init(struct denali_nand_info *denali)
@@ -1103,7 +1103,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
"timeout on write_page (type = %d)\n",
raw_xfer);
denali->status =
- (irq_status & INTR_STATUS__PROGRAM_FAIL) ?
+ irq_status & INTR_STATUS__PROGRAM_FAIL ?
NAND_STATUS_FAIL : PASS;
}
@@ -1296,7 +1296,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
INTR_STATUS__ERASE_FAIL);
- return (irq_status & INTR_STATUS__ERASE_FAIL) ? NAND_STATUS_FAIL : PASS;
+ return irq_status & INTR_STATUS__ERASE_FAIL ? NAND_STATUS_FAIL : PASS;
}
static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH 6/7] mtd: denali: remove unnecessary parentheses
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:34 ` Josh Triplett
-1 siblings, 0 replies; 28+ messages in thread
From: Josh Triplett @ 2014-09-08 8:34 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Huang Shijie, linux-kernel, Rashika Kheria, linux-mtd,
grmoore@altera.com, Brian Norris, David Woodhouse
On Mon, Sep 08, 2014 at 05:10:12PM +0900, Masahiro Yamada wrote:
> We should use parentheses only when they are necessary
> or they really improve the readability.
>
> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This seems fine; none of these parentheses are needed, since the
relative precedence of the relevant operators is always clear.
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
>
> drivers/mtd/nand/denali.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index d37c2e1..ed37b76 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -267,10 +267,10 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
>
> acc_clks = CEIL_DIV(Trea[mode], CLK_X);
>
> - while (((acc_clks * CLK_X) - Trea[mode]) < 3)
> + while (acc_clks * CLK_X - Trea[mode] < 3)
> acc_clks++;
>
> - if ((data_invalid - acc_clks * CLK_X) < 2)
> + if (data_invalid - acc_clks * CLK_X < 2)
> dev_warn(denali->dev, "%s, Line %d: Warning!\n",
> __FILE__, __LINE__);
>
> @@ -285,7 +285,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
> cs_cnt = 1;
>
> if (Tcea[mode]) {
> - while (((cs_cnt * CLK_X) + Trea[mode]) < Tcea[mode])
> + while (cs_cnt * CLK_X + Trea[mode] < Tcea[mode])
> cs_cnt++;
> }
>
> @@ -295,8 +295,8 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
> #endif
>
> /* Sighting 3462430: Temporary hack for MT29F128G08CJABAWP:B */
> - if ((ioread32(denali->flash_reg + MANUFACTURER_ID) == 0) &&
> - (ioread32(denali->flash_reg + DEVICE_ID) == 0x88))
> + if (ioread32(denali->flash_reg + MANUFACTURER_ID) == 0 &&
> + ioread32(denali->flash_reg + DEVICE_ID) == 0x88)
> acc_clks = 6;
>
> iowrite32(acc_clks, denali->flash_reg + ACC_CLKS);
> @@ -577,7 +577,7 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
> */
> static inline bool is_flash_bank_valid(int flash_bank)
> {
> - return (flash_bank >= 0 && flash_bank < 4);
> + return flash_bank >= 0 && flash_bank < 4;
> }
>
> static void denali_irq_init(struct denali_nand_info *denali)
> @@ -1103,7 +1103,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
> "timeout on write_page (type = %d)\n",
> raw_xfer);
> denali->status =
> - (irq_status & INTR_STATUS__PROGRAM_FAIL) ?
> + irq_status & INTR_STATUS__PROGRAM_FAIL ?
> NAND_STATUS_FAIL : PASS;
> }
>
> @@ -1296,7 +1296,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
> irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
> INTR_STATUS__ERASE_FAIL);
>
> - return (irq_status & INTR_STATUS__ERASE_FAIL) ? NAND_STATUS_FAIL : PASS;
> + return irq_status & INTR_STATUS__ERASE_FAIL ? NAND_STATUS_FAIL : PASS;
> }
>
> static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 6/7] mtd: denali: remove unnecessary parentheses
@ 2014-09-08 8:34 ` Josh Triplett
0 siblings, 0 replies; 28+ messages in thread
From: Josh Triplett @ 2014-09-08 8:34 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-mtd, David Woodhouse, Brian Norris, Huang Shijie,
grmoore@altera.com, Rashika Kheria, linux-kernel
On Mon, Sep 08, 2014 at 05:10:12PM +0900, Masahiro Yamada wrote:
> We should use parentheses only when they are necessary
> or they really improve the readability.
>
> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This seems fine; none of these parentheses are needed, since the
relative precedence of the relevant operators is always clear.
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
>
> drivers/mtd/nand/denali.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index d37c2e1..ed37b76 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -267,10 +267,10 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
>
> acc_clks = CEIL_DIV(Trea[mode], CLK_X);
>
> - while (((acc_clks * CLK_X) - Trea[mode]) < 3)
> + while (acc_clks * CLK_X - Trea[mode] < 3)
> acc_clks++;
>
> - if ((data_invalid - acc_clks * CLK_X) < 2)
> + if (data_invalid - acc_clks * CLK_X < 2)
> dev_warn(denali->dev, "%s, Line %d: Warning!\n",
> __FILE__, __LINE__);
>
> @@ -285,7 +285,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
> cs_cnt = 1;
>
> if (Tcea[mode]) {
> - while (((cs_cnt * CLK_X) + Trea[mode]) < Tcea[mode])
> + while (cs_cnt * CLK_X + Trea[mode] < Tcea[mode])
> cs_cnt++;
> }
>
> @@ -295,8 +295,8 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
> #endif
>
> /* Sighting 3462430: Temporary hack for MT29F128G08CJABAWP:B */
> - if ((ioread32(denali->flash_reg + MANUFACTURER_ID) == 0) &&
> - (ioread32(denali->flash_reg + DEVICE_ID) == 0x88))
> + if (ioread32(denali->flash_reg + MANUFACTURER_ID) == 0 &&
> + ioread32(denali->flash_reg + DEVICE_ID) == 0x88)
> acc_clks = 6;
>
> iowrite32(acc_clks, denali->flash_reg + ACC_CLKS);
> @@ -577,7 +577,7 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
> */
> static inline bool is_flash_bank_valid(int flash_bank)
> {
> - return (flash_bank >= 0 && flash_bank < 4);
> + return flash_bank >= 0 && flash_bank < 4;
> }
>
> static void denali_irq_init(struct denali_nand_info *denali)
> @@ -1103,7 +1103,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
> "timeout on write_page (type = %d)\n",
> raw_xfer);
> denali->status =
> - (irq_status & INTR_STATUS__PROGRAM_FAIL) ?
> + irq_status & INTR_STATUS__PROGRAM_FAIL ?
> NAND_STATUS_FAIL : PASS;
> }
>
> @@ -1296,7 +1296,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
> irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
> INTR_STATUS__ERASE_FAIL);
>
> - return (irq_status & INTR_STATUS__ERASE_FAIL) ? NAND_STATUS_FAIL : PASS;
> + return irq_status & INTR_STATUS__ERASE_FAIL ? NAND_STATUS_FAIL : PASS;
> }
>
> static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 7/7] mtd: denali: fix indentations and other trivial things
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:10 ` Masahiro Yamada
-1 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Jiri Kosina, Huang Shijie, Josh Triplett, linux-kernel,
Masahiro Yamada, Rashika Kheria, grmoore@altera.com, Brian Norris,
David Woodhouse
- Fix indentations
- Do not break a line unless it is longer than 80 columns
- Do not insert a whitespace before ';'
- Use braces for a "else" block where the "if" block uses ones.
Additionally, fix the following "checkpatch.pl" warnings:
- WARNING: else is not generally useful after a break or return
- WARNING: Missing a blank line after declarations
- WARNING: Avoid line continuations in quoted strings
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 113 ++++++++++++++++++++--------------------------
1 file changed, 50 insertions(+), 63 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index ed37b76..4d26e11 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -162,8 +162,7 @@ static void read_status(struct denali_nand_info *denali)
static void reset_bank(struct denali_nand_info *denali)
{
uint32_t irq_status;
- uint32_t irq_mask = INTR_STATUS__RST_COMP |
- INTR_STATUS__TIME_OUT;
+ uint32_t irq_mask = INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT;
clear_interrupts(denali);
@@ -181,16 +180,15 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
int i;
dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
- __FILE__, __LINE__, __func__);
+ __FILE__, __LINE__, __func__);
- for (i = 0 ; i < denali->max_banks; i++)
+ for (i = 0; i < denali->max_banks; i++)
iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
denali->flash_reg + INTR_STATUS(i));
- for (i = 0 ; i < denali->max_banks; i++) {
+ for (i = 0; i < denali->max_banks; i++) {
iowrite32(1 << i, denali->flash_reg + DEVICE_RESET);
- while (!(ioread32(denali->flash_reg +
- INTR_STATUS(i)) &
+ while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) &
(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT)))
cpu_relax();
if (ioread32(denali->flash_reg + INTR_STATUS(i)) &
@@ -201,7 +199,7 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
for (i = 0; i < denali->max_banks; i++)
iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
- denali->flash_reg + INTR_STATUS(i));
+ denali->flash_reg + INTR_STATUS(i));
return PASS;
}
@@ -235,7 +233,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt;
dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
- __FILE__, __LINE__, __func__);
+ __FILE__, __LINE__, __func__);
en_lo = CEIL_DIV(Trp[mode], CLK_X);
en_hi = CEIL_DIV(Treh[mode], CLK_X);
@@ -272,7 +270,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
if (data_invalid - acc_clks * CLK_X < 2)
dev_warn(denali->dev, "%s, Line %d: Warning!\n",
- __FILE__, __LINE__);
+ __FILE__, __LINE__);
addr_2_data = CEIL_DIV(Tadl[mode], CLK_X);
re_2_we = CEIL_DIV(Trhw[mode], CLK_X);
@@ -406,9 +404,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
break;
default:
dev_warn(denali->dev,
- "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
- "Will use default parameter values instead.\n",
- device_id);
+ "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
+ "Will use default parameter values instead.\n",
+ device_id);
}
}
@@ -425,8 +423,7 @@ static void find_valid_banks(struct denali_nand_info *denali)
for (i = 0; i < denali->max_banks; i++) {
index_addr(denali, MODE_11 | (i << 24) | 0, 0x90);
index_addr(denali, MODE_11 | (i << 24) | 1, 0);
- index_addr_read_data(denali,
- MODE_11 | (i << 24) | 2, &id[i]);
+ index_addr_read_data(denali, MODE_11 | (i << 24) | 2, &id[i]);
dev_dbg(denali->dev,
"Return 1st ID for bank[%d]: %x\n", i, id[i]);
@@ -489,10 +486,12 @@ static void detect_partition_feature(struct denali_nand_info *denali)
+
(ioread32(denali->flash_reg + MIN_BLK_ADDR(1)) &
MIN_BLK_ADDR__VALUE);
- } else
+ } else {
denali->fwblks = SPECTRA_START_BLOCK;
- } else
+ }
+ } else {
denali->fwblks = SPECTRA_START_BLOCK;
+ }
}
static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
@@ -502,8 +501,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
uint8_t maf_id, device_id;
int i;
- dev_dbg(denali->dev,
- "%s, Line %d, Function: %s\n",
+ dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
__FILE__, __LINE__, __func__);
/*
@@ -563,7 +561,7 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
uint16_t INT_ENABLE)
{
dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
- __FILE__, __LINE__, __func__);
+ __FILE__, __LINE__, __func__);
if (INT_ENABLE)
iowrite32(1, denali->flash_reg + GLOBAL_INT_ENABLE);
@@ -710,13 +708,13 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
spin_unlock_irq(&denali->irq_lock);
/* our interrupt was detected */
break;
- } else {
- /*
- * these are not the interrupts you are looking for -
- * need to wait again
- */
- spin_unlock_irq(&denali->irq_lock);
}
+
+ /*
+ * these are not the interrupts you are looking for -
+ * need to wait again
+ */
+ spin_unlock_irq(&denali->irq_lock);
} while (comp_res != 0);
if (comp_res == 0) {
@@ -744,8 +742,7 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
/* Enable spare area/ECC per user's request. */
iowrite32(ecc_en_flag, denali->flash_reg + ECC_ENABLE);
- iowrite32(transfer_spare_flag,
- denali->flash_reg + TRANSFER_SPARE_REG);
+ iowrite32(transfer_spare_flag, denali->flash_reg + TRANSFER_SPARE_REG);
}
/*
@@ -753,10 +750,8 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
* controller's user guide for more information (section 4.2.3.6).
*/
static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
- bool ecc_en,
- bool transfer_spare,
- int access_type,
- int op)
+ bool ecc_en, bool transfer_spare,
+ int access_type, int op)
{
int status = PASS;
uint32_t page_count = 1;
@@ -826,8 +821,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
/* helper function that simply writes a buffer to the flash */
static int write_data_to_flash_mem(struct denali_nand_info *denali,
- const uint8_t *buf,
- int len)
+ const uint8_t *buf, int len)
{
uint32_t *buf32;
int i;
@@ -842,13 +836,12 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
buf32 = (uint32_t *)buf;
for (i = 0; i < len / 4; i++)
iowrite32(*buf32++, denali->flash_mem + 0x10);
- return i*4; /* intent is to return the number of bytes read */
+ return i * 4; /* intent is to return the number of bytes read */
}
/* helper function that simply reads a buffer from the flash */
static int read_data_from_flash_mem(struct denali_nand_info *denali,
- uint8_t *buf,
- int len)
+ uint8_t *buf, int len)
{
uint32_t *buf32;
int i;
@@ -865,7 +858,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
buf32 = (uint32_t *)buf;
for (i = 0; i < len / 4; i++)
*buf32++ = ioread32(denali->flash_mem + 0x10);
- return i*4; /* intent is to return the number of bytes read */
+ return i * 4; /* intent is to return the number of bytes read */
}
/* writes OOB data to the device */
@@ -941,6 +934,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
static bool is_erased(uint8_t *buf, int len)
{
int i;
+
for (i = 0; i < len; i++)
if (buf[i] != 0xFF)
return false;
@@ -990,6 +984,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
*/
if (err_byte < ECC_SECTOR_SIZE) {
int offset;
+
offset = (err_sector *
ECC_SECTOR_SIZE +
err_byte) *
@@ -1063,10 +1058,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, bool raw_xfer)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
-
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
-
uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
INTR_STATUS__PROGRAM_FAIL;
@@ -1099,12 +1092,10 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
irq_status = wait_for_irq(denali, irq_mask);
if (irq_status == 0) {
- dev_err(denali->dev,
- "timeout on write_page (type = %d)\n",
- raw_xfer);
- denali->status =
- irq_status & INTR_STATUS__PROGRAM_FAIL ?
- NAND_STATUS_FAIL : PASS;
+ dev_err(denali->dev, "timeout on write_page (type = %d)\n",
+ raw_xfer);
+ denali->status = irq_status & INTR_STATUS__PROGRAM_FAIL ?
+ NAND_STATUS_FAIL : PASS;
}
denali_enable_dma(denali, false);
@@ -1216,10 +1207,8 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
uint8_t *buf, int oob_required, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
-
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
-
uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP;
@@ -1275,6 +1264,7 @@ static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
int status = denali->status;
+
denali->status = 0;
return status;
@@ -1324,9 +1314,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
index_addr(denali, addr | 0, 0x90);
index_addr(denali, addr | 1, 0);
for (i = 0; i < 8; i++) {
- index_addr_read_data(denali,
- addr | 2,
- &id);
+ index_addr_read_data(denali, addr | 2, &id);
write_byte_to_buf(denali, id);
}
break;
@@ -1351,8 +1339,8 @@ static int denali_ecc_calculate(struct mtd_info *mtd, const uint8_t *data,
uint8_t *ecc_code)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- dev_err(denali->dev,
- "denali_ecc_calculate called unexpectedly\n");
+
+ dev_err(denali->dev, "denali_ecc_calculate called unexpectedly\n");
BUG();
return -EIO;
}
@@ -1361,8 +1349,8 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data,
uint8_t *read_ecc, uint8_t *calc_ecc)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- dev_err(denali->dev,
- "denali_ecc_correct called unexpectedly\n");
+
+ dev_err(denali->dev, "denali_ecc_correct called unexpectedly\n");
BUG();
return -EIO;
}
@@ -1370,8 +1358,8 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data,
static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- dev_err(denali->dev,
- "denali_ecc_hwctl called unexpectedly\n");
+
+ dev_err(denali->dev, "denali_ecc_hwctl called unexpectedly\n");
BUG();
}
/* end NAND core entry points */
@@ -1599,8 +1587,8 @@ int denali_init(struct denali_nand_info *denali)
} else if (denali->mtd.oobsize < (denali->bbtskipbytes +
ECC_8BITS * (denali->mtd.writesize /
ECC_SECTOR_SIZE))) {
- pr_err("Your NAND chip OOB is not large enough to \
- contain 8bit ECC correction codes");
+ pr_err("Your NAND chip OOB is not large enough to "
+ "contain 8bit ECC correction codes");
goto failed_req_irq;
} else {
denali->nand.ecc.strength = 8;
@@ -1624,8 +1612,7 @@ int denali_init(struct denali_nand_info *denali)
* contained by each nand chip. blksperchip will help driver to
* know how many blocks is taken by FW.
*/
- denali->totalblks = denali->mtd.size >>
- denali->nand.phys_erase_shift;
+ denali->totalblks = denali->mtd.size >> denali->nand.phys_erase_shift;
denali->blksperchip = denali->totalblks / denali->nand.numchips;
/*
@@ -1672,7 +1659,7 @@ void denali_remove(struct denali_nand_info *denali)
{
denali_irq_cleanup(denali->irq, denali);
dma_unmap_single(denali->dev, denali->buf.dma_buf,
- denali->mtd.writesize + denali->mtd.oobsize,
- DMA_BIDIRECTIONAL);
+ denali->mtd.writesize + denali->mtd.oobsize,
+ DMA_BIDIRECTIONAL);
}
EXPORT_SYMBOL(denali_remove);
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 7/7] mtd: denali: fix indentations and other trivial things
@ 2014-09-08 8:10 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 8:10 UTC (permalink / raw)
To: linux-mtd
Cc: Masahiro Yamada, David Woodhouse, Brian Norris, Jiri Kosina,
Huang Shijie, Josh Triplett, Rashika Kheria, grmoore@altera.com,
linux-kernel
- Fix indentations
- Do not break a line unless it is longer than 80 columns
- Do not insert a whitespace before ';'
- Use braces for a "else" block where the "if" block uses ones.
Additionally, fix the following "checkpatch.pl" warnings:
- WARNING: else is not generally useful after a break or return
- WARNING: Missing a blank line after declarations
- WARNING: Avoid line continuations in quoted strings
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
drivers/mtd/nand/denali.c | 113 ++++++++++++++++++++--------------------------
1 file changed, 50 insertions(+), 63 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index ed37b76..4d26e11 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -162,8 +162,7 @@ static void read_status(struct denali_nand_info *denali)
static void reset_bank(struct denali_nand_info *denali)
{
uint32_t irq_status;
- uint32_t irq_mask = INTR_STATUS__RST_COMP |
- INTR_STATUS__TIME_OUT;
+ uint32_t irq_mask = INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT;
clear_interrupts(denali);
@@ -181,16 +180,15 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
int i;
dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
- __FILE__, __LINE__, __func__);
+ __FILE__, __LINE__, __func__);
- for (i = 0 ; i < denali->max_banks; i++)
+ for (i = 0; i < denali->max_banks; i++)
iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
denali->flash_reg + INTR_STATUS(i));
- for (i = 0 ; i < denali->max_banks; i++) {
+ for (i = 0; i < denali->max_banks; i++) {
iowrite32(1 << i, denali->flash_reg + DEVICE_RESET);
- while (!(ioread32(denali->flash_reg +
- INTR_STATUS(i)) &
+ while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) &
(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT)))
cpu_relax();
if (ioread32(denali->flash_reg + INTR_STATUS(i)) &
@@ -201,7 +199,7 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
for (i = 0; i < denali->max_banks; i++)
iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
- denali->flash_reg + INTR_STATUS(i));
+ denali->flash_reg + INTR_STATUS(i));
return PASS;
}
@@ -235,7 +233,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt;
dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
- __FILE__, __LINE__, __func__);
+ __FILE__, __LINE__, __func__);
en_lo = CEIL_DIV(Trp[mode], CLK_X);
en_hi = CEIL_DIV(Treh[mode], CLK_X);
@@ -272,7 +270,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
if (data_invalid - acc_clks * CLK_X < 2)
dev_warn(denali->dev, "%s, Line %d: Warning!\n",
- __FILE__, __LINE__);
+ __FILE__, __LINE__);
addr_2_data = CEIL_DIV(Tadl[mode], CLK_X);
re_2_we = CEIL_DIV(Trhw[mode], CLK_X);
@@ -406,9 +404,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
break;
default:
dev_warn(denali->dev,
- "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
- "Will use default parameter values instead.\n",
- device_id);
+ "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
+ "Will use default parameter values instead.\n",
+ device_id);
}
}
@@ -425,8 +423,7 @@ static void find_valid_banks(struct denali_nand_info *denali)
for (i = 0; i < denali->max_banks; i++) {
index_addr(denali, MODE_11 | (i << 24) | 0, 0x90);
index_addr(denali, MODE_11 | (i << 24) | 1, 0);
- index_addr_read_data(denali,
- MODE_11 | (i << 24) | 2, &id[i]);
+ index_addr_read_data(denali, MODE_11 | (i << 24) | 2, &id[i]);
dev_dbg(denali->dev,
"Return 1st ID for bank[%d]: %x\n", i, id[i]);
@@ -489,10 +486,12 @@ static void detect_partition_feature(struct denali_nand_info *denali)
+
(ioread32(denali->flash_reg + MIN_BLK_ADDR(1)) &
MIN_BLK_ADDR__VALUE);
- } else
+ } else {
denali->fwblks = SPECTRA_START_BLOCK;
- } else
+ }
+ } else {
denali->fwblks = SPECTRA_START_BLOCK;
+ }
}
static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
@@ -502,8 +501,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
uint8_t maf_id, device_id;
int i;
- dev_dbg(denali->dev,
- "%s, Line %d, Function: %s\n",
+ dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
__FILE__, __LINE__, __func__);
/*
@@ -563,7 +561,7 @@ static void denali_set_intr_modes(struct denali_nand_info *denali,
uint16_t INT_ENABLE)
{
dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
- __FILE__, __LINE__, __func__);
+ __FILE__, __LINE__, __func__);
if (INT_ENABLE)
iowrite32(1, denali->flash_reg + GLOBAL_INT_ENABLE);
@@ -710,13 +708,13 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
spin_unlock_irq(&denali->irq_lock);
/* our interrupt was detected */
break;
- } else {
- /*
- * these are not the interrupts you are looking for -
- * need to wait again
- */
- spin_unlock_irq(&denali->irq_lock);
}
+
+ /*
+ * these are not the interrupts you are looking for -
+ * need to wait again
+ */
+ spin_unlock_irq(&denali->irq_lock);
} while (comp_res != 0);
if (comp_res == 0) {
@@ -744,8 +742,7 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
/* Enable spare area/ECC per user's request. */
iowrite32(ecc_en_flag, denali->flash_reg + ECC_ENABLE);
- iowrite32(transfer_spare_flag,
- denali->flash_reg + TRANSFER_SPARE_REG);
+ iowrite32(transfer_spare_flag, denali->flash_reg + TRANSFER_SPARE_REG);
}
/*
@@ -753,10 +750,8 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
* controller's user guide for more information (section 4.2.3.6).
*/
static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
- bool ecc_en,
- bool transfer_spare,
- int access_type,
- int op)
+ bool ecc_en, bool transfer_spare,
+ int access_type, int op)
{
int status = PASS;
uint32_t page_count = 1;
@@ -826,8 +821,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
/* helper function that simply writes a buffer to the flash */
static int write_data_to_flash_mem(struct denali_nand_info *denali,
- const uint8_t *buf,
- int len)
+ const uint8_t *buf, int len)
{
uint32_t *buf32;
int i;
@@ -842,13 +836,12 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali,
buf32 = (uint32_t *)buf;
for (i = 0; i < len / 4; i++)
iowrite32(*buf32++, denali->flash_mem + 0x10);
- return i*4; /* intent is to return the number of bytes read */
+ return i * 4; /* intent is to return the number of bytes read */
}
/* helper function that simply reads a buffer from the flash */
static int read_data_from_flash_mem(struct denali_nand_info *denali,
- uint8_t *buf,
- int len)
+ uint8_t *buf, int len)
{
uint32_t *buf32;
int i;
@@ -865,7 +858,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali,
buf32 = (uint32_t *)buf;
for (i = 0; i < len / 4; i++)
*buf32++ = ioread32(denali->flash_mem + 0x10);
- return i*4; /* intent is to return the number of bytes read */
+ return i * 4; /* intent is to return the number of bytes read */
}
/* writes OOB data to the device */
@@ -941,6 +934,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
static bool is_erased(uint8_t *buf, int len)
{
int i;
+
for (i = 0; i < len; i++)
if (buf[i] != 0xFF)
return false;
@@ -990,6 +984,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
*/
if (err_byte < ECC_SECTOR_SIZE) {
int offset;
+
offset = (err_sector *
ECC_SECTOR_SIZE +
err_byte) *
@@ -1063,10 +1058,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, bool raw_xfer)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
-
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
-
uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
INTR_STATUS__PROGRAM_FAIL;
@@ -1099,12 +1092,10 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
irq_status = wait_for_irq(denali, irq_mask);
if (irq_status == 0) {
- dev_err(denali->dev,
- "timeout on write_page (type = %d)\n",
- raw_xfer);
- denali->status =
- irq_status & INTR_STATUS__PROGRAM_FAIL ?
- NAND_STATUS_FAIL : PASS;
+ dev_err(denali->dev, "timeout on write_page (type = %d)\n",
+ raw_xfer);
+ denali->status = irq_status & INTR_STATUS__PROGRAM_FAIL ?
+ NAND_STATUS_FAIL : PASS;
}
denali_enable_dma(denali, false);
@@ -1216,10 +1207,8 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
uint8_t *buf, int oob_required, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
-
dma_addr_t addr = denali->buf.dma_buf;
size_t size = denali->mtd.writesize + denali->mtd.oobsize;
-
uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP;
@@ -1275,6 +1264,7 @@ static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
int status = denali->status;
+
denali->status = 0;
return status;
@@ -1324,9 +1314,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
index_addr(denali, addr | 0, 0x90);
index_addr(denali, addr | 1, 0);
for (i = 0; i < 8; i++) {
- index_addr_read_data(denali,
- addr | 2,
- &id);
+ index_addr_read_data(denali, addr | 2, &id);
write_byte_to_buf(denali, id);
}
break;
@@ -1351,8 +1339,8 @@ static int denali_ecc_calculate(struct mtd_info *mtd, const uint8_t *data,
uint8_t *ecc_code)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- dev_err(denali->dev,
- "denali_ecc_calculate called unexpectedly\n");
+
+ dev_err(denali->dev, "denali_ecc_calculate called unexpectedly\n");
BUG();
return -EIO;
}
@@ -1361,8 +1349,8 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data,
uint8_t *read_ecc, uint8_t *calc_ecc)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- dev_err(denali->dev,
- "denali_ecc_correct called unexpectedly\n");
+
+ dev_err(denali->dev, "denali_ecc_correct called unexpectedly\n");
BUG();
return -EIO;
}
@@ -1370,8 +1358,8 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data,
static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- dev_err(denali->dev,
- "denali_ecc_hwctl called unexpectedly\n");
+
+ dev_err(denali->dev, "denali_ecc_hwctl called unexpectedly\n");
BUG();
}
/* end NAND core entry points */
@@ -1599,8 +1587,8 @@ int denali_init(struct denali_nand_info *denali)
} else if (denali->mtd.oobsize < (denali->bbtskipbytes +
ECC_8BITS * (denali->mtd.writesize /
ECC_SECTOR_SIZE))) {
- pr_err("Your NAND chip OOB is not large enough to \
- contain 8bit ECC correction codes");
+ pr_err("Your NAND chip OOB is not large enough to "
+ "contain 8bit ECC correction codes");
goto failed_req_irq;
} else {
denali->nand.ecc.strength = 8;
@@ -1624,8 +1612,7 @@ int denali_init(struct denali_nand_info *denali)
* contained by each nand chip. blksperchip will help driver to
* know how many blocks is taken by FW.
*/
- denali->totalblks = denali->mtd.size >>
- denali->nand.phys_erase_shift;
+ denali->totalblks = denali->mtd.size >> denali->nand.phys_erase_shift;
denali->blksperchip = denali->totalblks / denali->nand.numchips;
/*
@@ -1672,7 +1659,7 @@ void denali_remove(struct denali_nand_info *denali)
{
denali_irq_cleanup(denali->irq, denali);
dma_unmap_single(denali->dev, denali->buf.dma_buf,
- denali->mtd.writesize + denali->mtd.oobsize,
- DMA_BIDIRECTIONAL);
+ denali->mtd.writesize + denali->mtd.oobsize,
+ DMA_BIDIRECTIONAL);
}
EXPORT_SYMBOL(denali_remove);
--
1.9.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH 7/7] mtd: denali: fix indentations and other trivial things
2014-09-08 8:10 ` Masahiro Yamada
@ 2014-09-08 8:39 ` Josh Triplett
-1 siblings, 0 replies; 28+ messages in thread
From: Josh Triplett @ 2014-09-08 8:39 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Jiri Kosina, Huang Shijie, linux-kernel, Rashika Kheria,
linux-mtd, grmoore@altera.com, Brian Norris, David Woodhouse
On Mon, Sep 08, 2014 at 05:10:13PM +0900, Masahiro Yamada wrote:
> @@ -406,9 +404,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
> break;
> default:
> dev_warn(denali->dev,
> - "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> - "Will use default parameter values instead.\n",
> - device_id);
> + "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> + "Will use default parameter values instead.\n",
> + device_id);
Please join quoted strings into a single line.
> - pr_err("Your NAND chip OOB is not large enough to \
> - contain 8bit ECC correction codes");
> + pr_err("Your NAND chip OOB is not large enough to "
> + "contain 8bit ECC correction codes");
Likewise.
- Josh Triplett
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 7/7] mtd: denali: fix indentations and other trivial things
@ 2014-09-08 8:39 ` Josh Triplett
0 siblings, 0 replies; 28+ messages in thread
From: Josh Triplett @ 2014-09-08 8:39 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-mtd, David Woodhouse, Brian Norris, Jiri Kosina,
Huang Shijie, Rashika Kheria, grmoore@altera.com, linux-kernel
On Mon, Sep 08, 2014 at 05:10:13PM +0900, Masahiro Yamada wrote:
> @@ -406,9 +404,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
> break;
> default:
> dev_warn(denali->dev,
> - "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> - "Will use default parameter values instead.\n",
> - device_id);
> + "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> + "Will use default parameter values instead.\n",
> + device_id);
Please join quoted strings into a single line.
> - pr_err("Your NAND chip OOB is not large enough to \
> - contain 8bit ECC correction codes");
> + pr_err("Your NAND chip OOB is not large enough to "
> + "contain 8bit ECC correction codes");
Likewise.
- Josh Triplett
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 7/7] mtd: denali: fix indentations and other trivial things
2014-09-08 8:39 ` Josh Triplett
@ 2014-09-08 9:14 ` Masahiro Yamada
-1 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 9:14 UTC (permalink / raw)
To: Josh Triplett
Cc: Jiri Kosina, Huang Shijie, linux-kernel, Rashika Kheria,
linux-mtd, grmoore@altera.com, Brian Norris, David Woodhouse
Hi Josh,
On Mon, 8 Sep 2014 01:39:20 -0700
Josh Triplett <josh@joshtriplett.org> wrote:
> On Mon, Sep 08, 2014 at 05:10:13PM +0900, Masahiro Yamada wrote:
> > @@ -406,9 +404,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
> > break;
> > default:
> > dev_warn(denali->dev,
> > - "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> > - "Will use default parameter values instead.\n",
> > - device_id);
> > + "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> > + "Will use default parameter values instead.\n",
> > + device_id);
>
> Please join quoted strings into a single line.
>
> > - pr_err("Your NAND chip OOB is not large enough to \
> > - contain 8bit ECC correction codes");
> > + pr_err("Your NAND chip OOB is not large enough to "
> > + "contain 8bit ECC correction codes");
>
> Likewise.
>
Thanks for your review, but
the quoted strings are too long to be joined into a single line.
(exceed 80 columns)
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 7/7] mtd: denali: fix indentations and other trivial things
@ 2014-09-08 9:14 ` Masahiro Yamada
0 siblings, 0 replies; 28+ messages in thread
From: Masahiro Yamada @ 2014-09-08 9:14 UTC (permalink / raw)
To: Josh Triplett
Cc: linux-mtd, David Woodhouse, Brian Norris, Jiri Kosina,
Huang Shijie, Rashika Kheria, grmoore@altera.com, linux-kernel
Hi Josh,
On Mon, 8 Sep 2014 01:39:20 -0700
Josh Triplett <josh@joshtriplett.org> wrote:
> On Mon, Sep 08, 2014 at 05:10:13PM +0900, Masahiro Yamada wrote:
> > @@ -406,9 +404,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
> > break;
> > default:
> > dev_warn(denali->dev,
> > - "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> > - "Will use default parameter values instead.\n",
> > - device_id);
> > + "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> > + "Will use default parameter values instead.\n",
> > + device_id);
>
> Please join quoted strings into a single line.
>
> > - pr_err("Your NAND chip OOB is not large enough to \
> > - contain 8bit ECC correction codes");
> > + pr_err("Your NAND chip OOB is not large enough to "
> > + "contain 8bit ECC correction codes");
>
> Likewise.
>
Thanks for your review, but
the quoted strings are too long to be joined into a single line.
(exceed 80 columns)
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 7/7] mtd: denali: fix indentations and other trivial things
2014-09-08 9:14 ` Masahiro Yamada
@ 2014-09-08 10:00 ` Sudip Mukherjee
-1 siblings, 0 replies; 28+ messages in thread
From: Sudip Mukherjee @ 2014-09-08 10:00 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Jiri Kosina, Huang Shijie, Josh Triplett, linux-kernel,
Rashika Kheria, linux-mtd, grmoore@altera.com, Brian Norris,
David Woodhouse
On Mon, Sep 08, 2014 at 06:14:48PM +0900, Masahiro Yamada wrote:
> Hi Josh,
>
>
> On Mon, 8 Sep 2014 01:39:20 -0700
> Josh Triplett <josh@joshtriplett.org> wrote:
>
> > On Mon, Sep 08, 2014 at 05:10:13PM +0900, Masahiro Yamada wrote:
> > > @@ -406,9 +404,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
> > > break;
> > > default:
> > > dev_warn(denali->dev,
> > > - "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> > > - "Will use default parameter values instead.\n",
> > > - device_id);
> > > + "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> > > + "Will use default parameter values instead.\n",
> > > + device_id);
> >
> > Please join quoted strings into a single line.
> >
> > > - pr_err("Your NAND chip OOB is not large enough to \
> > > - contain 8bit ECC correction codes");
> > > + pr_err("Your NAND chip OOB is not large enough to "
> > > + "contain 8bit ECC correction codes");
> >
> > Likewise.
> >
>
> Thanks for your review, but
> the quoted strings are too long to be joined into a single line.
> (exceed 80 columns)
>
These are user-visible strings and they can be more than 80 char.
If you see CodingStyle document , it is mentioned that :
However, never break user-visible strings such as printk messages, because that breaks the ability to grep for them.
thanks
sudip
>
> Best Regards
> Masahiro Yamada
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 7/7] mtd: denali: fix indentations and other trivial things
@ 2014-09-08 10:00 ` Sudip Mukherjee
0 siblings, 0 replies; 28+ messages in thread
From: Sudip Mukherjee @ 2014-09-08 10:00 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Josh Triplett, linux-mtd, David Woodhouse, Brian Norris,
Jiri Kosina, Huang Shijie, Rashika Kheria, grmoore@altera.com,
linux-kernel
On Mon, Sep 08, 2014 at 06:14:48PM +0900, Masahiro Yamada wrote:
> Hi Josh,
>
>
> On Mon, 8 Sep 2014 01:39:20 -0700
> Josh Triplett <josh@joshtriplett.org> wrote:
>
> > On Mon, Sep 08, 2014 at 05:10:13PM +0900, Masahiro Yamada wrote:
> > > @@ -406,9 +404,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
> > > break;
> > > default:
> > > dev_warn(denali->dev,
> > > - "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> > > - "Will use default parameter values instead.\n",
> > > - device_id);
> > > + "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
> > > + "Will use default parameter values instead.\n",
> > > + device_id);
> >
> > Please join quoted strings into a single line.
> >
> > > - pr_err("Your NAND chip OOB is not large enough to \
> > > - contain 8bit ECC correction codes");
> > > + pr_err("Your NAND chip OOB is not large enough to "
> > > + "contain 8bit ECC correction codes");
> >
> > Likewise.
> >
>
> Thanks for your review, but
> the quoted strings are too long to be joined into a single line.
> (exceed 80 columns)
>
These are user-visible strings and they can be more than 80 char.
If you see CodingStyle document , it is mentioned that :
However, never break user-visible strings such as printk messages, because that breaks the ability to grep for them.
thanks
sudip
>
> Best Regards
> Masahiro Yamada
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 28+ messages in thread