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From: Daniel Vetter <daniel@ffwll.ch>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 2/5] drm/i915/bdw: WaDisableFenceDestinationToSLM
Date: Mon, 29 Sep 2014 14:32:18 +0200	[thread overview]
Message-ID: <20140929123218.GI4109@phenom.ffwll.local> (raw)
In-Reply-To: <874mvvnaem.fsf@gaia.fi.intel.com>

On Thu, Sep 25, 2014 at 03:37:37PM +0300, Mika Kuoppala wrote:
> Rodrigo Vivi <rodrigo.vivi@intel.com> writes:
> 
> > This WA affect BDW GT3 E and F steppings.

Thou shalt not mention steppings in public. Fixed here and in the comment
below while applying.

> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

Queued for -next, thanks for the patch.
-Daniel
> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h         | 1 +
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 6 +++++-
> >  2 files changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index ad8179b..124ea60 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4836,6 +4836,7 @@ enum punit_power_well {
> >  /* GEN8 chicken */
> >  #define HDC_CHICKEN0				0x7300
> >  #define  HDC_FORCE_NON_COHERENT			(1<<4)
> > +#define  HDC_FENCE_DEST_SLM_DISABLE		(1<<14)
> >  
> >  /* WaCatErrorRejectionIssue */
> >  #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG		0x9030
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 681ea86..7c3d17a 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -740,8 +740,12 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
> >  	 * workaround for for a possible hang in the unlikely event a TLB
> >  	 * invalidation occurs during a PSD flush.
> >  	 */
> > +	/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production E/F) */
> >  	intel_ring_emit_wa(ring, HDC_CHICKEN0,
> > -			   _MASKED_BIT_ENABLE(HDC_FORCE_NON_COHERENT));
> > +			   _MASKED_BIT_ENABLE(HDC_FORCE_NON_COHERENT |
> > +					      (IS_BDW_GT3(dev) ?
> > +					       HDC_FENCE_DEST_SLM_DISABLE : 0)
> > +				   ));
> >  
> >  	/* Wa4x4STCOptimizationDisable:bdw */
> >  	intel_ring_emit_wa(ring, CACHE_MODE_1,
> > -- 
> > 1.9.3
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-09-29 12:32 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-20  0:16 [PATCH 1/5] drm/i915: Add IS_BDW_GT3 macro Rodrigo Vivi
2014-09-20  0:16 ` [PATCH 2/5] drm/i915/bdw: WaDisableFenceDestinationToSLM Rodrigo Vivi
2014-09-25 12:37   ` Mika Kuoppala
2014-09-29 12:32     ` Daniel Vetter [this message]
2014-09-29 12:49       ` Daniel Vetter
2014-09-30 15:02         ` Mika Kuoppala
2014-09-30 16:27           ` Daniel Vetter
2014-09-20  0:16 ` [PATCH 3/5] drm/i915/bdw: WaProgramL3SqcReg1Default Rodrigo Vivi
2014-09-26 12:03   ` Mika Kuoppala
2014-09-26 18:32     ` Rodrigo Vivi
2014-09-26 19:06     ` Ville Syrjälä
2014-09-30 15:11       ` [PATCH] " Rodrigo Vivi
2014-10-01 13:46         ` Mika Kuoppala
2014-09-20  0:16 ` [PATCH 4/5] drm/i915: Let number of workarounds more clear Rodrigo Vivi
2014-09-24 22:44   ` [PATCH] " Rodrigo Vivi
2014-09-26 12:22   ` [PATCH 4/5] " Mika Kuoppala
2014-09-26 12:56     ` Jani Nikula
2014-09-26 12:58       ` Chris Wilson
2014-09-26 13:02         ` Damien Lespiau
2014-09-26 14:16       ` Mika Kuoppala
2014-09-26 14:56         ` Chris Wilson
2014-09-30 22:13           ` Rodrigo Vivi
2014-09-20  0:16 ` [PATCH 5/5] drm/i915/bdw: Remove BDW preproduction W/As until C stepping Rodrigo Vivi
2014-09-24 22:46   ` [PATCH] " Rodrigo Vivi
2014-09-30 22:14     ` Rodrigo Vivi
2014-10-01 14:11     ` Mika Kuoppala
2014-10-09 14:11       ` Rodrigo Vivi
2014-10-19 12:14         ` Daniel Vetter
2014-09-29 19:58 ` [PATCH 1/5] drm/i915: Add IS_BDW_GT3 macro Jesse Barnes

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