Re: [PATCH 2/5] drm/i915/bdw: WaDisableFenceDestinationToSLM

[Mika Kuoppala <mika.kuoppala@linux.intel.com>]

Rodrigo Vivi <rodrigo.vivi@intel.com> writes:

> This WA affect BDW GT3 E and F steppings.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h         | 1 +
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 6 +++++-
>  2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ad8179b..124ea60 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4836,6 +4836,7 @@ enum punit_power_well {
>  /* GEN8 chicken */
>  #define HDC_CHICKEN0				0x7300
>  #define  HDC_FORCE_NON_COHERENT			(1<<4)
> +#define  HDC_FENCE_DEST_SLM_DISABLE		(1<<14)
>  
>  /* WaCatErrorRejectionIssue */
>  #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG		0x9030
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 681ea86..7c3d17a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -740,8 +740,12 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
>  	 * workaround for for a possible hang in the unlikely event a TLB
>  	 * invalidation occurs during a PSD flush.
>  	 */
> +	/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production E/F) */
>  	intel_ring_emit_wa(ring, HDC_CHICKEN0,
> -			   _MASKED_BIT_ENABLE(HDC_FORCE_NON_COHERENT));
> +			   _MASKED_BIT_ENABLE(HDC_FORCE_NON_COHERENT |
> +					      (IS_BDW_GT3(dev) ?
> +					       HDC_FENCE_DEST_SLM_DISABLE : 0)
> +				   ));
>  
>  	/* Wa4x4STCOptimizationDisable:bdw */
>  	intel_ring_emit_wa(ring, CACHE_MODE_1,
> -- 
> 1.9.3
>
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