* [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver
@ 2014-10-13 13:06 Antonios Motakis
[not found] ` <1413205579-6124-1-git-send-email-a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>
0 siblings, 1 reply; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: will.deacon-5wv7dgnIgG8, kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
jroedel-l3A5Bk7waGM
Cc: eric.auger-QSEj5FYQhm4dnm+yROfE0A, marc.zyngier-5wv7dgnIgG8,
Antonios Motakis, tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J,
christoffer.dall-QSEj5FYQhm4dnm+yROfE0A
This patch series applies to Joerg Roedel's iommu/next branch, commit 09b5269a.
It replaces the IOMMU_EXEC flag used by the ARM SMMU driver to IOMMU_NOEXEC.
This is more enforceable, since the lack of the flag on hardware that doesn't
support it implies that the target memory will be executable.
Antonios Motakis (3):
iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC
iommu: add capability IOMMU_CAP_NOEXEC
iommu/arm-smmu: add IOMMU_CAP_NOEXEC to the ARM SMMU driver
drivers/iommu/arm-smmu.c | 11 +++++++----
include/linux/iommu.h | 3 ++-
2 files changed, 9 insertions(+), 5 deletions(-)
--
2.1.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/3] iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC
2014-10-13 13:06 [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver Antonios Motakis
[not found] ` <1413205579-6124-1-git-send-email-a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>
@ 2014-10-13 13:06 ` Antonios Motakis
0 siblings, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: will.deacon-5wv7dgnIgG8, kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
jroedel-l3A5Bk7waGM
Cc: Thierry Reding, eric.auger-QSEj5FYQhm4dnm+yROfE0A,
marc.zyngier-5wv7dgnIgG8, open list, Alexey Kardashevskiy,
moderated list:ARM SMMU DRIVER, Antonios Motakis,
tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J,
christoffer.dall-QSEj5FYQhm4dnm+yROfE0A
Exposing the XN flag of the SMMU driver as IOMMU_NOEXEC instead of
IOMMU_EXEC makes it enforceable, since for IOMMUs that don't support
the XN flag pages will always be executable.
Signed-off-by: Antonios Motakis <a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>
Acked-by: Joerg Roedel <jroedel-l3A5Bk7waGM@public.gmane.org>
---
drivers/iommu/arm-smmu.c | 9 +++++----
include/linux/iommu.h | 2 +-
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 60558f7..566c176 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1281,7 +1281,7 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_device *smmu, pmd_t *pmd,
unsigned long pfn, int prot, int stage)
{
pte_t *pte, *start;
- pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF | ARM_SMMU_PTE_XN;
+ pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF;
if (pmd_none(*pmd)) {
/* Allocate a new set of tables */
@@ -1315,10 +1315,11 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_device *smmu, pmd_t *pmd,
pteval |= ARM_SMMU_PTE_MEMATTR_NC;
}
+ if (prot & IOMMU_NOEXEC)
+ pteval |= ARM_SMMU_PTE_XN;
+
/* If no access, create a faulting entry to avoid TLB fills */
- if (prot & IOMMU_EXEC)
- pteval &= ~ARM_SMMU_PTE_XN;
- else if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
+ if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
pteval &= ~ARM_SMMU_PTE_PAGE;
pteval |= ARM_SMMU_PTE_SH_IS;
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 379a617..5f6f71c 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -27,7 +27,7 @@
#define IOMMU_READ (1 << 0)
#define IOMMU_WRITE (1 << 1)
#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
-#define IOMMU_EXEC (1 << 3)
+#define IOMMU_NOEXEC (1 << 3)
struct iommu_ops;
struct iommu_group;
--
2.1.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 1/3] iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC
@ 2014-10-13 13:06 ` Antonios Motakis
0 siblings, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: linux-arm-kernel
Exposing the XN flag of the SMMU driver as IOMMU_NOEXEC instead of
IOMMU_EXEC makes it enforceable, since for IOMMUs that don't support
the XN flag pages will always be executable.
Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
---
drivers/iommu/arm-smmu.c | 9 +++++----
include/linux/iommu.h | 2 +-
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 60558f7..566c176 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1281,7 +1281,7 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_device *smmu, pmd_t *pmd,
unsigned long pfn, int prot, int stage)
{
pte_t *pte, *start;
- pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF | ARM_SMMU_PTE_XN;
+ pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF;
if (pmd_none(*pmd)) {
/* Allocate a new set of tables */
@@ -1315,10 +1315,11 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_device *smmu, pmd_t *pmd,
pteval |= ARM_SMMU_PTE_MEMATTR_NC;
}
+ if (prot & IOMMU_NOEXEC)
+ pteval |= ARM_SMMU_PTE_XN;
+
/* If no access, create a faulting entry to avoid TLB fills */
- if (prot & IOMMU_EXEC)
- pteval &= ~ARM_SMMU_PTE_XN;
- else if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
+ if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
pteval &= ~ARM_SMMU_PTE_PAGE;
pteval |= ARM_SMMU_PTE_SH_IS;
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 379a617..5f6f71c 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -27,7 +27,7 @@
#define IOMMU_READ (1 << 0)
#define IOMMU_WRITE (1 << 1)
#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
-#define IOMMU_EXEC (1 << 3)
+#define IOMMU_NOEXEC (1 << 3)
struct iommu_ops;
struct iommu_group;
--
2.1.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 1/3] iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC
@ 2014-10-13 13:06 ` Antonios Motakis
0 siblings, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: will.deacon, kvmarm, iommu, jroedel
Cc: alex.williamson, tech, christoffer.dall, eric.auger, kim.phillips,
marc.zyngier, Antonios Motakis, Joerg Roedel,
Alexey Kardashevskiy, Upinder Malhi (umalhi), Thierry Reding,
moderated list:ARM SMMU DRIVER, open list
Exposing the XN flag of the SMMU driver as IOMMU_NOEXEC instead of
IOMMU_EXEC makes it enforceable, since for IOMMUs that don't support
the XN flag pages will always be executable.
Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
---
drivers/iommu/arm-smmu.c | 9 +++++----
include/linux/iommu.h | 2 +-
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 60558f7..566c176 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1281,7 +1281,7 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_device *smmu, pmd_t *pmd,
unsigned long pfn, int prot, int stage)
{
pte_t *pte, *start;
- pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF | ARM_SMMU_PTE_XN;
+ pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF;
if (pmd_none(*pmd)) {
/* Allocate a new set of tables */
@@ -1315,10 +1315,11 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_device *smmu, pmd_t *pmd,
pteval |= ARM_SMMU_PTE_MEMATTR_NC;
}
+ if (prot & IOMMU_NOEXEC)
+ pteval |= ARM_SMMU_PTE_XN;
+
/* If no access, create a faulting entry to avoid TLB fills */
- if (prot & IOMMU_EXEC)
- pteval &= ~ARM_SMMU_PTE_XN;
- else if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
+ if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
pteval &= ~ARM_SMMU_PTE_PAGE;
pteval |= ARM_SMMU_PTE_SH_IS;
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 379a617..5f6f71c 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -27,7 +27,7 @@
#define IOMMU_READ (1 << 0)
#define IOMMU_WRITE (1 << 1)
#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
-#define IOMMU_EXEC (1 << 3)
+#define IOMMU_NOEXEC (1 << 3)
struct iommu_ops;
struct iommu_group;
--
2.1.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/3] iommu: add capability IOMMU_CAP_NOEXEC
2014-10-13 13:06 [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver Antonios Motakis
@ 2014-10-13 13:06 ` Antonios Motakis
0 siblings, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: will.deacon-5wv7dgnIgG8, kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
jroedel-l3A5Bk7waGM
Cc: Thierry Reding, eric.auger-QSEj5FYQhm4dnm+yROfE0A,
marc.zyngier-5wv7dgnIgG8, Greg Kroah-Hartman, open list,
Alexey Kardashevskiy, Antonios Motakis,
tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J,
christoffer.dall-QSEj5FYQhm4dnm+yROfE0A
Some IOMMUs accept an IOMMU_NOEXEC protection flag in addition to
IOMMU_READ and IOMMU_WRITE. Expose this as an IOMMU capability.
Signed-off-by: Antonios Motakis <a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>
Acked-by: Joerg Roedel <jroedel-l3A5Bk7waGM@public.gmane.org>
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 5f6f71c..ba026f1 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -61,6 +61,7 @@ enum iommu_cap {
IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
transactions */
IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
+ IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
};
/*
--
2.1.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/3] iommu: add capability IOMMU_CAP_NOEXEC
@ 2014-10-13 13:06 ` Antonios Motakis
0 siblings, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: will.deacon, kvmarm, iommu, jroedel
Cc: alex.williamson, tech, christoffer.dall, eric.auger, kim.phillips,
marc.zyngier, Antonios Motakis, Greg Kroah-Hartman,
Thierry Reding, Alexey Kardashevskiy, Upinder Malhi (umalhi),
open list
Some IOMMUs accept an IOMMU_NOEXEC protection flag in addition to
IOMMU_READ and IOMMU_WRITE. Expose this as an IOMMU capability.
Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 5f6f71c..ba026f1 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -61,6 +61,7 @@ enum iommu_cap {
IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
transactions */
IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
+ IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
};
/*
--
2.1.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/3] iommu/arm-smmu: add IOMMU_CAP_NOEXEC to the ARM SMMU driver
2014-10-13 13:06 [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver Antonios Motakis
[not found] ` <1413205579-6124-1-git-send-email-a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>
@ 2014-10-13 13:06 ` Antonios Motakis
0 siblings, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: will.deacon-5wv7dgnIgG8, kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
jroedel-l3A5Bk7waGM
Cc: eric.auger-QSEj5FYQhm4dnm+yROfE0A, marc.zyngier-5wv7dgnIgG8,
open list, moderated list:ARM SMMU DRIVER, Antonios Motakis,
tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J,
christoffer.dall-QSEj5FYQhm4dnm+yROfE0A
The ARM SMMU supports the IOMMU_NOEXEC protection flag. Add the
corresponding IOMMU capability.
Signed-off-by: Antonios Motakis <a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>
---
drivers/iommu/arm-smmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 566c176..c8fc02f 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1569,6 +1569,8 @@ static bool arm_smmu_capable(enum iommu_cap cap)
return true;
case IOMMU_CAP_INTR_REMAP:
return true; /* MSIs are just memory writes */
+ case IOMMU_CAP_NOEXEC:
+ return true;
default:
return false;
}
--
2.1.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/3] iommu/arm-smmu: add IOMMU_CAP_NOEXEC to the ARM SMMU driver
@ 2014-10-13 13:06 ` Antonios Motakis
0 siblings, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: linux-arm-kernel
The ARM SMMU supports the IOMMU_NOEXEC protection flag. Add the
corresponding IOMMU capability.
Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com>
---
drivers/iommu/arm-smmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 566c176..c8fc02f 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1569,6 +1569,8 @@ static bool arm_smmu_capable(enum iommu_cap cap)
return true;
case IOMMU_CAP_INTR_REMAP:
return true; /* MSIs are just memory writes */
+ case IOMMU_CAP_NOEXEC:
+ return true;
default:
return false;
}
--
2.1.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/3] iommu/arm-smmu: add IOMMU_CAP_NOEXEC to the ARM SMMU driver
@ 2014-10-13 13:06 ` Antonios Motakis
0 siblings, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-13 13:06 UTC (permalink / raw)
To: will.deacon, kvmarm, iommu, jroedel
Cc: alex.williamson, tech, christoffer.dall, eric.auger, kim.phillips,
marc.zyngier, Antonios Motakis, Joerg Roedel,
moderated list:ARM SMMU DRIVER, open list
The ARM SMMU supports the IOMMU_NOEXEC protection flag. Add the
corresponding IOMMU capability.
Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com>
---
drivers/iommu/arm-smmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 566c176..c8fc02f 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1569,6 +1569,8 @@ static bool arm_smmu_capable(enum iommu_cap cap)
return true;
case IOMMU_CAP_INTR_REMAP:
return true; /* MSIs are just memory writes */
+ case IOMMU_CAP_NOEXEC:
+ return true;
default:
return false;
}
--
2.1.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver
[not found] ` <1413205579-6124-1-git-send-email-a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>
` (2 preceding siblings ...)
2014-10-13 13:06 ` Antonios Motakis
@ 2014-10-20 15:39 ` Will Deacon
[not found] ` <20141020153915.GH20301-5wv7dgnIgG8@public.gmane.org>
3 siblings, 1 reply; 13+ messages in thread
From: Will Deacon @ 2014-10-20 15:39 UTC (permalink / raw)
To: Antonios Motakis
Cc: jroedel-l3A5Bk7waGM@public.gmane.org,
eric.auger-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, Marc Zyngier,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org,
kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg@public.gmane.org,
christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
Hi Antonios,
On Mon, Oct 13, 2014 at 02:06:15PM +0100, Antonios Motakis wrote:
> This patch series applies to Joerg Roedel's iommu/next branch, commit 09b5269a.
> It replaces the IOMMU_EXEC flag used by the ARM SMMU driver to IOMMU_NOEXEC.
> This is more enforceable, since the lack of the flag on hardware that doesn't
> support it implies that the target memory will be executable.
Looks good to me; I'll take this via the arm-smmu tree and send it to Joerg
along with anything else that gets queued for 3.19.
Thanks,
Will
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver
[not found] ` <20141020153915.GH20301-5wv7dgnIgG8@public.gmane.org>
@ 2014-10-20 18:42 ` Will Deacon
[not found] ` <20141020184201.GA1455-5wv7dgnIgG8@public.gmane.org>
0 siblings, 1 reply; 13+ messages in thread
From: Will Deacon @ 2014-10-20 18:42 UTC (permalink / raw)
To: Antonios Motakis
Cc: jroedel-l3A5Bk7waGM@public.gmane.org,
eric.auger-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, Marc Zyngier,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org,
kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg@public.gmane.org,
christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
On Mon, Oct 20, 2014 at 04:39:15PM +0100, Will Deacon wrote:
> On Mon, Oct 13, 2014 at 02:06:15PM +0100, Antonios Motakis wrote:
> > This patch series applies to Joerg Roedel's iommu/next branch, commit 09b5269a.
> > It replaces the IOMMU_EXEC flag used by the ARM SMMU driver to IOMMU_NOEXEC.
> > This is more enforceable, since the lack of the flag on hardware that doesn't
> > support it implies that the target memory will be executable.
>
> Looks good to me; I'll take this via the arm-smmu tree and send it to Joerg
> along with anything else that gets queued for 3.19.
The 0-day builder spotted a new warning from this series:
drivers/iommu/amd_iommu.c: In function 'amd_iommu_capable':
>> drivers/iommu/amd_iommu.c:3409:2: warning: enumeration value 'IOMMU_CAP_NOEXEC' not handled in switch [-Wswitch]
switch (cap) {
^
I fixed it with the patch below, but I'd appreciate you and Joerg taking
a look too.
Cheers,
Will
--->8
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 505a9adac2d5..3d78a8fb5a6a 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -3411,6 +3411,8 @@ static bool amd_iommu_capable(enum iommu_cap cap)
return true;
case IOMMU_CAP_INTR_REMAP:
return (irq_remapping_enabled == 1);
+ case IOMMU_CAP_NOEXEC:
+ return false;
}
return false;
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver
[not found] ` <20141020184201.GA1455-5wv7dgnIgG8@public.gmane.org>
@ 2014-10-21 12:03 ` Antonios Motakis
2014-10-22 15:25 ` jroedel-l3A5Bk7waGM
1 sibling, 0 replies; 13+ messages in thread
From: Antonios Motakis @ 2014-10-21 12:03 UTC (permalink / raw)
To: Will Deacon
Cc: jroedel-l3A5Bk7waGM@public.gmane.org,
eric.auger-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, Marc Zyngier,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org,
kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg@public.gmane.org,
christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
On Mon, Oct 20, 2014 at 8:42 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote:
> On Mon, Oct 20, 2014 at 04:39:15PM +0100, Will Deacon wrote:
>> On Mon, Oct 13, 2014 at 02:06:15PM +0100, Antonios Motakis wrote:
>> > This patch series applies to Joerg Roedel's iommu/next branch, commit 09b5269a.
>> > It replaces the IOMMU_EXEC flag used by the ARM SMMU driver to IOMMU_NOEXEC.
>> > This is more enforceable, since the lack of the flag on hardware that doesn't
>> > support it implies that the target memory will be executable.
>>
>> Looks good to me; I'll take this via the arm-smmu tree and send it to Joerg
>> along with anything else that gets queued for 3.19.
>
> The 0-day builder spotted a new warning from this series:
>
> drivers/iommu/amd_iommu.c: In function 'amd_iommu_capable':
>>> drivers/iommu/amd_iommu.c:3409:2: warning: enumeration value 'IOMMU_CAP_NOEXEC' not handled in switch [-Wswitch]
> switch (cap) {
> ^
>
> I fixed it with the patch below, but I'd appreciate you and Joerg taking
> a look too.
>
Maybe a "default:" case would be more appropriate, in order to avoid a
similar situation in the future?
> Cheers,
>
> Will
>
> --->8
>
> diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
> index 505a9adac2d5..3d78a8fb5a6a 100644
> --- a/drivers/iommu/amd_iommu.c
> +++ b/drivers/iommu/amd_iommu.c
> @@ -3411,6 +3411,8 @@ static bool amd_iommu_capable(enum iommu_cap cap)
> return true;
> case IOMMU_CAP_INTR_REMAP:
> return (irq_remapping_enabled == 1);
> + case IOMMU_CAP_NOEXEC:
> + return false;
> }
>
> return false;
--
Antonios Motakis
Virtual Open Systems
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver
[not found] ` <20141020184201.GA1455-5wv7dgnIgG8@public.gmane.org>
2014-10-21 12:03 ` Antonios Motakis
@ 2014-10-22 15:25 ` jroedel-l3A5Bk7waGM
1 sibling, 0 replies; 13+ messages in thread
From: jroedel-l3A5Bk7waGM @ 2014-10-22 15:25 UTC (permalink / raw)
To: Will Deacon
Cc: eric.auger-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, Marc Zyngier,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
Antonios Motakis,
tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org,
kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg@public.gmane.org,
christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
On Mon, Oct 20, 2014 at 07:42:01PM +0100, Will Deacon wrote:
> On Mon, Oct 20, 2014 at 04:39:15PM +0100, Will Deacon wrote:
> > On Mon, Oct 13, 2014 at 02:06:15PM +0100, Antonios Motakis wrote:
> > > This patch series applies to Joerg Roedel's iommu/next branch, commit 09b5269a.
> > > It replaces the IOMMU_EXEC flag used by the ARM SMMU driver to IOMMU_NOEXEC.
> > > This is more enforceable, since the lack of the flag on hardware that doesn't
> > > support it implies that the target memory will be executable.
> >
> > Looks good to me; I'll take this via the arm-smmu tree and send it to Joerg
> > along with anything else that gets queued for 3.19.
>
> The 0-day builder spotted a new warning from this series:
>
> drivers/iommu/amd_iommu.c: In function 'amd_iommu_capable':
> >> drivers/iommu/amd_iommu.c:3409:2: warning: enumeration value 'IOMMU_CAP_NOEXEC' not handled in switch [-Wswitch]
> switch (cap) {
> ^
>
> I fixed it with the patch below, but I'd appreciate you and Joerg taking
> a look too.
>
> Cheers,
>
> Will
>
> --->8
>
> diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
> index 505a9adac2d5..3d78a8fb5a6a 100644
> --- a/drivers/iommu/amd_iommu.c
> +++ b/drivers/iommu/amd_iommu.c
> @@ -3411,6 +3411,8 @@ static bool amd_iommu_capable(enum iommu_cap cap)
> return true;
> case IOMMU_CAP_INTR_REMAP:
> return (irq_remapping_enabled == 1);
> + case IOMMU_CAP_NOEXEC:
> + return false;
> }
Looks good to me.
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2014-10-22 15:25 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-10-13 13:06 [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update ARM SMMU driver Antonios Motakis
[not found] ` <1413205579-6124-1-git-send-email-a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>
2014-10-13 13:06 ` [PATCH 1/3] iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC Antonios Motakis
2014-10-13 13:06 ` Antonios Motakis
2014-10-13 13:06 ` Antonios Motakis
2014-10-13 13:06 ` [PATCH 2/3] iommu: add capability IOMMU_CAP_NOEXEC Antonios Motakis
2014-10-13 13:06 ` Antonios Motakis
2014-10-13 13:06 ` [PATCH 3/3] iommu/arm-smmu: add IOMMU_CAP_NOEXEC to the ARM SMMU driver Antonios Motakis
2014-10-13 13:06 ` Antonios Motakis
2014-10-13 13:06 ` Antonios Motakis
2014-10-20 15:39 ` [PATCH 0/3] iommu: replace IOMMU_EXEC with IOMMU_EXEC and update " Will Deacon
[not found] ` <20141020153915.GH20301-5wv7dgnIgG8@public.gmane.org>
2014-10-20 18:42 ` Will Deacon
[not found] ` <20141020184201.GA1455-5wv7dgnIgG8@public.gmane.org>
2014-10-21 12:03 ` Antonios Motakis
2014-10-22 15:25 ` jroedel-l3A5Bk7waGM
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