All of lore.kernel.org
 help / color / mirror / Atom feed
From: jszhang@marvell.com (Jisheng Zhang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/3] irqchip: dw-apb-ictl: IRQ_GC_MASK_CACHE_PER_TYPE and PM support
Date: Tue, 11 Nov 2014 13:59:47 +0800	[thread overview]
Message-ID: <20141111135947.393a6d78@xhacker> (raw)
In-Reply-To: <1411454100-6814-1-git-send-email-jszhang@marvell.com>

Dear Thomas, Jason,

Is there any potential issue with this patch serials I need to resolve?

Thanks in advance,
Jisheng

On Mon, 22 Sep 2014 23:34:57 -0700
Jisheng Zhang <jszhang@marvell.com> wrote:

> These patches try to improve dw-apb-ictl irqchip driver a bit.
> 
> The first patch does a bit clean up work -- unify the register access usage.
> 
> The two dw-apb-ictl's irq_chip_type instances have separate mask registers,
> so the second patch enables IRQ_GC_MASK_CACHE_PER_TYPE.
> 
> The last patch adds suspend/resume support to the driver.
> 
> Tested on Marvell BG2Q-DMP board.
> 
> Jisheng Zhang (3):
>   irqchip: dw-apb-ictl: always use use {readl|writel}_relaxed
>   irqchip: dw-apb-ictl: enable IRQ_GC_MASK_CACHE_PER_TYPE
>   irqchip: dw-apb-ictl: add PM support
> 
>  drivers/irqchip/irq-dw-apb-ictl.c | 32 ++++++++++++++++++++++++++------
>  1 file changed, 26 insertions(+), 6 deletions(-)
> 

WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@marvell.com>
To: "tglx@linutronix.de" <tglx@linutronix.de>,
	"jason@lakedaemon.net" <jason@lakedaemon.net>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 0/3] irqchip: dw-apb-ictl: IRQ_GC_MASK_CACHE_PER_TYPE and PM support
Date: Tue, 11 Nov 2014 13:59:47 +0800	[thread overview]
Message-ID: <20141111135947.393a6d78@xhacker> (raw)
In-Reply-To: <1411454100-6814-1-git-send-email-jszhang@marvell.com>

Dear Thomas, Jason,

Is there any potential issue with this patch serials I need to resolve?

Thanks in advance,
Jisheng

On Mon, 22 Sep 2014 23:34:57 -0700
Jisheng Zhang <jszhang@marvell.com> wrote:

> These patches try to improve dw-apb-ictl irqchip driver a bit.
> 
> The first patch does a bit clean up work -- unify the register access usage.
> 
> The two dw-apb-ictl's irq_chip_type instances have separate mask registers,
> so the second patch enables IRQ_GC_MASK_CACHE_PER_TYPE.
> 
> The last patch adds suspend/resume support to the driver.
> 
> Tested on Marvell BG2Q-DMP board.
> 
> Jisheng Zhang (3):
>   irqchip: dw-apb-ictl: always use use {readl|writel}_relaxed
>   irqchip: dw-apb-ictl: enable IRQ_GC_MASK_CACHE_PER_TYPE
>   irqchip: dw-apb-ictl: add PM support
> 
>  drivers/irqchip/irq-dw-apb-ictl.c | 32 ++++++++++++++++++++++++++------
>  1 file changed, 26 insertions(+), 6 deletions(-)
> 


  parent reply	other threads:[~2014-11-11  5:59 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-23  6:34 [PATCH 0/3] irqchip: dw-apb-ictl: IRQ_GC_MASK_CACHE_PER_TYPE and PM support Jisheng Zhang
2014-09-23  6:34 ` Jisheng Zhang
2014-09-23  6:34 ` [PATCH 1/3] irqchip: dw-apb-ictl: always use use {readl|writel}_relaxed Jisheng Zhang
2014-09-23  6:34   ` Jisheng Zhang
2014-09-30 12:25   ` Sebastian Hesselbarth
2014-09-30 12:25     ` Sebastian Hesselbarth
2014-09-30 21:50     ` Thomas Gleixner
2014-09-30 21:50       ` Thomas Gleixner
2014-09-23  6:34 ` [PATCH 2/3] irqchip: dw-apb-ictl: enable IRQ_GC_MASK_CACHE_PER_TYPE Jisheng Zhang
2014-09-23  6:34   ` Jisheng Zhang
2014-09-30 12:28   ` Sebastian Hesselbarth
2014-09-30 12:28     ` Sebastian Hesselbarth
2014-09-23  6:35 ` [PATCH 3/3] irqchip: dw-apb-ictl: add PM support Jisheng Zhang
2014-09-23  6:35   ` Jisheng Zhang
2014-09-30 12:33   ` Sebastian Hesselbarth
2014-09-30 12:33     ` Sebastian Hesselbarth
2014-09-30 21:52     ` Thomas Gleixner
2014-09-30 21:52       ` Thomas Gleixner
2014-10-08 11:31       ` Jisheng Zhang
2014-10-08 11:31         ` Jisheng Zhang
2014-10-08 11:44         ` Sebastian Hesselbarth
2014-10-08 11:44           ` Sebastian Hesselbarth
2014-10-08 11:50           ` Jisheng Zhang
2014-10-08 11:50             ` Jisheng Zhang
2014-10-08 11:58             ` Jisheng Zhang
2014-10-08 11:58               ` Jisheng Zhang
2014-10-08 18:19               ` Sebastian Hesselbarth
2014-10-08 18:19                 ` Sebastian Hesselbarth
2014-11-11  5:59 ` Jisheng Zhang [this message]
2014-11-11  5:59   ` [PATCH 0/3] irqchip: dw-apb-ictl: IRQ_GC_MASK_CACHE_PER_TYPE and " Jisheng Zhang
2014-11-11 13:45   ` Jason Cooper
2014-11-11 13:45     ` Jason Cooper

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20141111135947.393a6d78@xhacker \
    --to=jszhang@marvell.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.