From: sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] irqchip: dw-apb-ictl: enable IRQ_GC_MASK_CACHE_PER_TYPE
Date: Tue, 30 Sep 2014 14:28:14 +0200 [thread overview]
Message-ID: <542AA1DE.4020606@gmail.com> (raw)
In-Reply-To: <1411454100-6814-3-git-send-email-jszhang@marvell.com>
On 09/23/2014 08:34 AM, Jisheng Zhang wrote:
> The irq_chip_type instances have separate mask registers, so we need to
> enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> drivers/irqchip/irq-dw-apb-ictl.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
> index fcc3385..c136b67 100644
> --- a/drivers/irqchip/irq-dw-apb-ictl.c
> +++ b/drivers/irqchip/irq-dw-apb-ictl.c
> @@ -115,6 +115,7 @@ static int __init dw_apb_ictl_init(struct device_node *np,
>
> ret = irq_alloc_domain_generic_chips(domain, 32, (nrirqs > 32) ? 2 : 1,
> np->name, handle_level_irq, clr, 0,
> + IRQ_GC_MASK_CACHE_PER_TYPE |
> IRQ_GC_INIT_MASK_CACHE);
> if (ret) {
> pr_err("%s: unable to alloc irq domain gc\n", np->full_name);
>
WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Jisheng Zhang <jszhang@marvell.com>,
tglx@linutronix.de, jason@lakedaemon.net
Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] irqchip: dw-apb-ictl: enable IRQ_GC_MASK_CACHE_PER_TYPE
Date: Tue, 30 Sep 2014 14:28:14 +0200 [thread overview]
Message-ID: <542AA1DE.4020606@gmail.com> (raw)
In-Reply-To: <1411454100-6814-3-git-send-email-jszhang@marvell.com>
On 09/23/2014 08:34 AM, Jisheng Zhang wrote:
> The irq_chip_type instances have separate mask registers, so we need to
> enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> drivers/irqchip/irq-dw-apb-ictl.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
> index fcc3385..c136b67 100644
> --- a/drivers/irqchip/irq-dw-apb-ictl.c
> +++ b/drivers/irqchip/irq-dw-apb-ictl.c
> @@ -115,6 +115,7 @@ static int __init dw_apb_ictl_init(struct device_node *np,
>
> ret = irq_alloc_domain_generic_chips(domain, 32, (nrirqs > 32) ? 2 : 1,
> np->name, handle_level_irq, clr, 0,
> + IRQ_GC_MASK_CACHE_PER_TYPE |
> IRQ_GC_INIT_MASK_CACHE);
> if (ret) {
> pr_err("%s: unable to alloc irq domain gc\n", np->full_name);
>
next prev parent reply other threads:[~2014-09-30 12:28 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-23 6:34 [PATCH 0/3] irqchip: dw-apb-ictl: IRQ_GC_MASK_CACHE_PER_TYPE and PM support Jisheng Zhang
2014-09-23 6:34 ` Jisheng Zhang
2014-09-23 6:34 ` [PATCH 1/3] irqchip: dw-apb-ictl: always use use {readl|writel}_relaxed Jisheng Zhang
2014-09-23 6:34 ` Jisheng Zhang
2014-09-30 12:25 ` Sebastian Hesselbarth
2014-09-30 12:25 ` Sebastian Hesselbarth
2014-09-30 21:50 ` Thomas Gleixner
2014-09-30 21:50 ` Thomas Gleixner
2014-09-23 6:34 ` [PATCH 2/3] irqchip: dw-apb-ictl: enable IRQ_GC_MASK_CACHE_PER_TYPE Jisheng Zhang
2014-09-23 6:34 ` Jisheng Zhang
2014-09-30 12:28 ` Sebastian Hesselbarth [this message]
2014-09-30 12:28 ` Sebastian Hesselbarth
2014-09-23 6:35 ` [PATCH 3/3] irqchip: dw-apb-ictl: add PM support Jisheng Zhang
2014-09-23 6:35 ` Jisheng Zhang
2014-09-30 12:33 ` Sebastian Hesselbarth
2014-09-30 12:33 ` Sebastian Hesselbarth
2014-09-30 21:52 ` Thomas Gleixner
2014-09-30 21:52 ` Thomas Gleixner
2014-10-08 11:31 ` Jisheng Zhang
2014-10-08 11:31 ` Jisheng Zhang
2014-10-08 11:44 ` Sebastian Hesselbarth
2014-10-08 11:44 ` Sebastian Hesselbarth
2014-10-08 11:50 ` Jisheng Zhang
2014-10-08 11:50 ` Jisheng Zhang
2014-10-08 11:58 ` Jisheng Zhang
2014-10-08 11:58 ` Jisheng Zhang
2014-10-08 18:19 ` Sebastian Hesselbarth
2014-10-08 18:19 ` Sebastian Hesselbarth
2014-11-11 5:59 ` [PATCH 0/3] irqchip: dw-apb-ictl: IRQ_GC_MASK_CACHE_PER_TYPE and " Jisheng Zhang
2014-11-11 5:59 ` Jisheng Zhang
2014-11-11 13:45 ` Jason Cooper
2014-11-11 13:45 ` Jason Cooper
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