* [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information
@ 2014-11-13 21:36 Andreas Herrmann
2014-11-13 21:36 ` [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers Andreas Herrmann
` (3 more replies)
0 siblings, 4 replies; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-13 21:36 UTC (permalink / raw)
To: Alan Stern
Cc: Andreas Herrmann, David Daney, Alex Smith, Linux-MIPS, linux-usb
Hi Alan,
With following patches I want to base octeon ehci/ohci device
configuration on device tree information.
I picked up patches that were submitted in May. See
http://marc.info/?l=linux-usb&m=140135823325811&w=2
and http://marc.info/?l=linux-mips&m=140139694721623&w=2
Patch #1 is your "untested preliminary pass" to remove
[oe]hci-octeon drivers.
Patch #2 is the removal of hard-coded platform information (but now
rebased on your patch)
Patch #3 adapts dma_mask for ehci (as used in ehci-octeon)
Overall diffstat is
arch/mips/cavium-octeon/octeon-platform.c | 380 +++++++++++++++++++++++------
arch/mips/configs/cavium_octeon_defconfig | 3 +
drivers/usb/host/Kconfig | 18 +-
drivers/usb/host/Makefile | 1 -
drivers/usb/host/ehci-hcd.c | 5 -
drivers/usb/host/ehci-octeon.c | 188 --------------
drivers/usb/host/ehci-platform.c | 4 +-
drivers/usb/host/octeon2-common.c | 200 ---------------
drivers/usb/host/ohci-hcd.c | 5 -
drivers/usb/host/ohci-octeon.c | 202 ---------------
drivers/usb/host/ohci-platform.c | 1 +
include/linux/usb/ehci_pdriver.h | 1 +
12 files changed, 330 insertions(+), 678 deletions(-)
Patches are based on v3.18-rc4-65-g2c54396
Comments welcome.
Thanks,
Andreas
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers
2014-11-13 21:36 [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Andreas Herrmann
@ 2014-11-13 21:36 ` Andreas Herrmann
2014-11-14 9:31 ` Ralf Baechle
2014-11-25 1:21 ` Greg KH
2014-11-13 21:36 ` [PATCH 2/3] USB: host: Remove hard-coded octeon platform information for ehci/ohci Andreas Herrmann
` (2 subsequent siblings)
3 siblings, 2 replies; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-13 21:36 UTC (permalink / raw)
To: Alan Stern
Cc: Andreas Herrmann, David Daney, Alex Smith, Linux-MIPS, linux-usb
From: Alan Stern <stern@rowland.harvard.edu>
From: Alan Stern <stern@rowland.harvard.edu>
Remove special-purpose octeon drivers and instead use ehci-platform
and ohci-platform as suggested with
http://marc.info/?l=linux-mips&m=140139694721623&w=2
[andreas.herrmann:
fixed compile error]
Cc: David Daney <david.daney@cavium.com>
Cc: Alex Smith <alex.smith@imgtec.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
---
arch/mips/cavium-octeon/octeon-platform.c | 274 ++++++++++++++++++++++++++++-
arch/mips/configs/cavium_octeon_defconfig | 3 +
drivers/usb/host/Kconfig | 18 +-
drivers/usb/host/Makefile | 1 -
drivers/usb/host/ehci-hcd.c | 5 -
drivers/usb/host/ehci-octeon.c | 188 --------------------
drivers/usb/host/octeon2-common.c | 200 ---------------------
drivers/usb/host/ohci-hcd.c | 5 -
drivers/usb/host/ohci-octeon.c | 202 ---------------------
9 files changed, 285 insertions(+), 611 deletions(-)
delete mode 100644 drivers/usb/host/ehci-octeon.c
delete mode 100644 drivers/usb/host/octeon2-common.c
delete mode 100644 drivers/usb/host/ohci-octeon.c
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index 6df0f4d..b67ddf0 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -7,22 +7,27 @@
* Copyright (C) 2008 Wind River Systems
*/
+#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/usb.h>
#include <linux/dma-mapping.h>
#include <linux/module.h>
+#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/of_platform.h>
#include <linux/of_fdt.h>
#include <linux/libfdt.h>
+#include <linux/usb/ehci_pdriver.h>
+#include <linux/usb/ohci_pdriver.h>
#include <asm/octeon/octeon.h>
#include <asm/octeon/cvmx-rnm-defs.h>
#include <asm/octeon/cvmx-helper.h>
#include <asm/octeon/cvmx-helper-board.h>
+#include <asm/octeon/cvmx-uctlx-defs.h>
/* Octeon Random Number Generator. */
static int __init octeon_rng_device_init(void)
@@ -68,6 +73,229 @@ device_initcall(octeon_rng_device_init);
#ifdef CONFIG_USB
+static DEFINE_MUTEX(octeon2_usb_clocks_mutex);
+
+static int octeon2_usb_clock_start_cnt;
+
+static void octeon2_usb_clocks_start(void)
+{
+ u64 div;
+ union cvmx_uctlx_if_ena if_ena;
+ union cvmx_uctlx_clk_rst_ctl clk_rst_ctl;
+ union cvmx_uctlx_uphy_ctl_status uphy_ctl_status;
+ union cvmx_uctlx_uphy_portx_ctl_status port_ctl_status;
+ int i;
+ unsigned long io_clk_64_to_ns;
+
+
+ mutex_lock(&octeon2_usb_clocks_mutex);
+
+ octeon2_usb_clock_start_cnt++;
+ if (octeon2_usb_clock_start_cnt != 1)
+ goto exit;
+
+ io_clk_64_to_ns = 64000000000ull / octeon_get_io_clock_rate();
+
+ /*
+ * Step 1: Wait for voltages stable. That surely happened
+ * before starting the kernel.
+ *
+ * Step 2: Enable SCLK of UCTL by writing UCTL0_IF_ENA[EN] = 1
+ */
+ if_ena.u64 = 0;
+ if_ena.s.en = 1;
+ cvmx_write_csr(CVMX_UCTLX_IF_ENA(0), if_ena.u64);
+
+ /* Step 3: Configure the reference clock, PHY, and HCLK */
+ clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
+
+ /*
+ * If the UCTL looks like it has already been started, skip
+ * the initialization, otherwise bus errors are obtained.
+ */
+ if (clk_rst_ctl.s.hrst)
+ goto end_clock;
+ /* 3a */
+ clk_rst_ctl.s.p_por = 1;
+ clk_rst_ctl.s.hrst = 0;
+ clk_rst_ctl.s.p_prst = 0;
+ clk_rst_ctl.s.h_clkdiv_rst = 0;
+ clk_rst_ctl.s.o_clkdiv_rst = 0;
+ clk_rst_ctl.s.h_clkdiv_en = 0;
+ clk_rst_ctl.s.o_clkdiv_en = 0;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 3b */
+ /* 12MHz crystal. */
+ clk_rst_ctl.s.p_refclk_sel = 0;
+ clk_rst_ctl.s.p_refclk_div = 0;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 3c */
+ div = octeon_get_io_clock_rate() / 130000000ull;
+
+ switch (div) {
+ case 0:
+ div = 1;
+ break;
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ break;
+ case 5:
+ div = 4;
+ break;
+ case 6:
+ case 7:
+ div = 6;
+ break;
+ case 8:
+ case 9:
+ case 10:
+ case 11:
+ div = 8;
+ break;
+ default:
+ div = 12;
+ break;
+ }
+ clk_rst_ctl.s.h_div = div;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+ /* Read it back, */
+ clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
+ clk_rst_ctl.s.h_clkdiv_en = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+ /* 3d */
+ clk_rst_ctl.s.h_clkdiv_rst = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 3e: delay 64 io clocks */
+ ndelay(io_clk_64_to_ns);
+
+ /*
+ * Step 4: Program the power-on reset field in the UCTL
+ * clock-reset-control register.
+ */
+ clk_rst_ctl.s.p_por = 0;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* Step 5: Wait 1 ms for the PHY clock to start. */
+ mdelay(1);
+
+ /*
+ * Step 6: Program the reset input from automatic test
+ * equipment field in the UPHY CSR
+ */
+ uphy_ctl_status.u64 = cvmx_read_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0));
+ uphy_ctl_status.s.ate_reset = 1;
+ cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64);
+
+ /* Step 7: Wait for at least 10ns. */
+ ndelay(10);
+
+ /* Step 8: Clear the ATE_RESET field in the UPHY CSR. */
+ uphy_ctl_status.s.ate_reset = 0;
+ cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64);
+
+ /*
+ * Step 9: Wait for at least 20ns for UPHY to output PHY clock
+ * signals and OHCI_CLK48
+ */
+ ndelay(20);
+
+ /* Step 10: Configure the OHCI_CLK48 and OHCI_CLK12 clocks. */
+ /* 10a */
+ clk_rst_ctl.s.o_clkdiv_rst = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 10b */
+ clk_rst_ctl.s.o_clkdiv_en = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 10c */
+ ndelay(io_clk_64_to_ns);
+
+ /*
+ * Step 11: Program the PHY reset field:
+ * UCTL0_CLK_RST_CTL[P_PRST] = 1
+ */
+ clk_rst_ctl.s.p_prst = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* Step 12: Wait 1 uS. */
+ udelay(1);
+
+ /* Step 13: Program the HRESET_N field: UCTL0_CLK_RST_CTL[HRST] = 1 */
+ clk_rst_ctl.s.hrst = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+end_clock:
+ /* Now we can set some other registers. */
+
+ for (i = 0; i <= 1; i++) {
+ port_ctl_status.u64 =
+ cvmx_read_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0));
+ /* Set txvreftune to 15 to obtain compliant 'eye' diagram. */
+ port_ctl_status.s.txvreftune = 15;
+ port_ctl_status.s.txrisetune = 1;
+ port_ctl_status.s.txpreemphasistune = 1;
+ cvmx_write_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0),
+ port_ctl_status.u64);
+ }
+
+ /* Set uSOF cycle period to 60,000 bits. */
+ cvmx_write_csr(CVMX_UCTLX_EHCI_FLA(0), 0x20ull);
+exit:
+ mutex_unlock(&octeon2_usb_clocks_mutex);
+}
+
+static void octeon2_usb_clocks_stop(void)
+{
+ mutex_lock(&octeon2_usb_clocks_mutex);
+ octeon2_usb_clock_start_cnt--;
+ mutex_unlock(&octeon2_usb_clocks_mutex);
+}
+
+static int octeon_ehci_power_on(struct platform_device *pdev)
+{
+ octeon2_usb_clocks_start();
+ return 0;
+}
+
+static void octeon_ehci_power_off(struct platform_device *pdev)
+{
+ octeon2_usb_clocks_stop();
+}
+
+static struct usb_ehci_pdata octeon_ehci_pdata = {
+ /* Octeon EHCI matches CPU endianness. */
+#ifdef __BIG_ENDIAN
+ .big_endian_mmio = 1,
+#endif
+ .power_on = octeon_ehci_power_on,
+ .power_off = octeon_ehci_power_off,
+};
+
+static void __init octeon_ehci_hw_start(void)
+{
+ union cvmx_uctlx_ehci_ctl ehci_ctl;
+
+ octeon2_usb_clocks_start();
+
+ ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
+ /* Use 64-bit addressing. */
+ ehci_ctl.s.ehci_64b_addr_en = 1;
+ ehci_ctl.s.l2c_addr_msb = 0;
+ ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
+ ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
+ cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
+
+ octeon2_usb_clocks_stop();
+}
+
+static u64 octeon_ehci_dma_mask = DMA_BIT_MASK(64);
+
static int __init octeon_ehci_device_init(void)
{
struct platform_device *pd;
@@ -88,7 +316,7 @@ static int __init octeon_ehci_device_init(void)
if (octeon_is_simulation() || usb_disabled())
return 0; /* No USB in the simulator. */
- pd = platform_device_alloc("octeon-ehci", 0);
+ pd = platform_device_alloc("ehci-platform", 0);
if (!pd) {
ret = -ENOMEM;
goto out;
@@ -105,6 +333,10 @@ static int __init octeon_ehci_device_init(void)
if (ret)
goto fail;
+ pd->dev.dma_mask = &octeon_ehci_dma_mask;
+ pd->dev.platform_data = &octeon_ehci_pdata;
+ octeon_ehci_hw_start();
+
ret = platform_device_add(pd);
if (ret)
goto fail;
@@ -117,6 +349,41 @@ out:
}
device_initcall(octeon_ehci_device_init);
+static int octeon_ohci_power_on(struct platform_device *pdev)
+{
+ octeon2_usb_clocks_start();
+ return 0;
+}
+
+static void octeon_ohci_power_off(struct platform_device *pdev)
+{
+ octeon2_usb_clocks_stop();
+}
+
+static struct usb_ohci_pdata octeon_ohci_pdata = {
+ /* Octeon OHCI matches CPU endianness. */
+#ifdef __BIG_ENDIAN
+ .big_endian_mmio = 1,
+#endif
+ .power_on = octeon_ohci_power_on,
+ .power_off = octeon_ohci_power_off,
+};
+
+static void __init octeon_ohci_hw_start(void)
+{
+ union cvmx_uctlx_ohci_ctl ohci_ctl;
+
+ octeon2_usb_clocks_start();
+
+ ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0));
+ ohci_ctl.s.l2c_addr_msb = 0;
+ ohci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
+ ohci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
+ cvmx_write_csr(CVMX_UCTLX_OHCI_CTL(0), ohci_ctl.u64);
+
+ octeon2_usb_clocks_stop();
+}
+
static int __init octeon_ohci_device_init(void)
{
struct platform_device *pd;
@@ -137,7 +404,7 @@ static int __init octeon_ohci_device_init(void)
if (octeon_is_simulation() || usb_disabled())
return 0; /* No USB in the simulator. */
- pd = platform_device_alloc("octeon-ohci", 0);
+ pd = platform_device_alloc("ohci-platform", 0);
if (!pd) {
ret = -ENOMEM;
goto out;
@@ -154,6 +421,9 @@ static int __init octeon_ohci_device_init(void)
if (ret)
goto fail;
+ pd->dev.platform_data = &octeon_ohci_pdata;
+ octeon_ohci_hw_start();
+
ret = platform_device_add(pd);
if (ret)
goto fail;
diff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig
index b2476a1..e57058d 100644
--- a/arch/mips/configs/cavium_octeon_defconfig
+++ b/arch/mips/configs/cavium_octeon_defconfig
@@ -120,6 +120,9 @@ CONFIG_SPI_OCTEON=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_USB_SUPPORT is not set
+CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1307=y
CONFIG_STAGING=y
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index a3ca137..fafc628 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -292,11 +292,15 @@ config USB_EHCI_HCD_PLATFORM
If unsure, say N.
config USB_OCTEON_EHCI
- bool "Octeon on-chip EHCI support"
+ bool "Octeon on-chip EHCI support (DEPRECATED)"
depends on CAVIUM_OCTEON_SOC
default n
select USB_EHCI_BIG_ENDIAN_MMIO
+ select USB_EHCI_HCD_PLATFORM
help
+ This option is deprecated now and the driver was removed, use
+ USB_EHCI_HCD_PLATFORM instead.
+
Enable support for the Octeon II SOC's on-chip EHCI
controller. It is needed for high-speed (480Mbit/sec)
USB 2.0 device support. All CN6XXX based chips with USB are
@@ -575,12 +579,16 @@ config USB_OHCI_HCD_PLATFORM
If unsure, say N.
config USB_OCTEON_OHCI
- bool "Octeon on-chip OHCI support"
+ bool "Octeon on-chip OHCI support (DEPRECATED)"
depends on CAVIUM_OCTEON_SOC
default USB_OCTEON_EHCI
select USB_OHCI_BIG_ENDIAN_MMIO
select USB_OHCI_LITTLE_ENDIAN
+ select USB_OHCI_HCD_PLATFORM
help
+ This option is deprecated now and the driver was removed, use
+ USB_OHCI_HCD_PLATFORM instead.
+
Enable support for the Octeon II SOC's on-chip OHCI
controller. It is needed for low-speed USB 1.0 device
support. All CN6XXX based chips with USB are supported.
@@ -754,12 +762,6 @@ config USB_IMX21_HCD
To compile this driver as a module, choose M here: the
module will be called "imx21-hcd".
-
-
-config USB_OCTEON2_COMMON
- bool
- default y if USB_OCTEON_EHCI || USB_OCTEON_OHCI
-
config USB_HCD_BCMA
tristate "BCMA usb host driver"
depends on BCMA
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 348c243..d6216a4 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -73,7 +73,6 @@ obj-$(CONFIG_USB_ISP1760_HCD) += isp1760.o
obj-$(CONFIG_USB_HWA_HCD) += hwa-hc.o
obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd.o
obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-mph-dr-of.o
-obj-$(CONFIG_USB_OCTEON2_COMMON) += octeon2-common.o
obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o
obj-$(CONFIG_USB_HCD_SSB) += ssb-hcd.o
obj-$(CONFIG_USB_FUSBH200_HCD) += fusbh200-hcd.o
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 15feaf9..5ea27a0 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1268,11 +1268,6 @@ MODULE_LICENSE ("GPL");
#define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
#endif
-#ifdef CONFIG_USB_OCTEON_EHCI
-#include "ehci-octeon.c"
-#define PLATFORM_DRIVER ehci_octeon_driver
-#endif
-
#ifdef CONFIG_TILE_USB
#include "ehci-tilegx.c"
#define PLATFORM_DRIVER ehci_hcd_tilegx_driver
diff --git a/drivers/usb/host/ehci-octeon.c b/drivers/usb/host/ehci-octeon.c
deleted file mode 100644
index 9051439..0000000
--- a/drivers/usb/host/ehci-octeon.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * EHCI HCD glue for Cavium Octeon II SOCs.
- *
- * Loosely based on ehci-au1xxx.c
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2010 Cavium Networks
- *
- */
-
-#include <linux/platform_device.h>
-
-#include <asm/octeon/octeon.h>
-#include <asm/octeon/cvmx-uctlx-defs.h>
-
-#define OCTEON_EHCI_HCD_NAME "octeon-ehci"
-
-/* Common clock init code. */
-void octeon2_usb_clocks_start(void);
-void octeon2_usb_clocks_stop(void);
-
-static void ehci_octeon_start(void)
-{
- union cvmx_uctlx_ehci_ctl ehci_ctl;
-
- octeon2_usb_clocks_start();
-
- ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
- /* Use 64-bit addressing. */
- ehci_ctl.s.ehci_64b_addr_en = 1;
- ehci_ctl.s.l2c_addr_msb = 0;
- ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
- ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
- cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
-}
-
-static void ehci_octeon_stop(void)
-{
- octeon2_usb_clocks_stop();
-}
-
-static const struct hc_driver ehci_octeon_hc_driver = {
- .description = hcd_name,
- .product_desc = "Octeon EHCI",
- .hcd_priv_size = sizeof(struct ehci_hcd),
-
- /*
- * generic hardware linkage
- */
- .irq = ehci_irq,
- .flags = HCD_MEMORY | HCD_USB2 | HCD_BH,
-
- /*
- * basic lifecycle operations
- */
- .reset = ehci_setup,
- .start = ehci_run,
- .stop = ehci_stop,
- .shutdown = ehci_shutdown,
-
- /*
- * managing i/o requests and associated device resources
- */
- .urb_enqueue = ehci_urb_enqueue,
- .urb_dequeue = ehci_urb_dequeue,
- .endpoint_disable = ehci_endpoint_disable,
- .endpoint_reset = ehci_endpoint_reset,
-
- /*
- * scheduling support
- */
- .get_frame_number = ehci_get_frame,
-
- /*
- * root hub support
- */
- .hub_status_data = ehci_hub_status_data,
- .hub_control = ehci_hub_control,
- .bus_suspend = ehci_bus_suspend,
- .bus_resume = ehci_bus_resume,
- .relinquish_port = ehci_relinquish_port,
- .port_handed_over = ehci_port_handed_over,
-
- .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
-};
-
-static u64 ehci_octeon_dma_mask = DMA_BIT_MASK(64);
-
-static int ehci_octeon_drv_probe(struct platform_device *pdev)
-{
- struct usb_hcd *hcd;
- struct ehci_hcd *ehci;
- struct resource *res_mem;
- int irq;
- int ret;
-
- if (usb_disabled())
- return -ENODEV;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- dev_err(&pdev->dev, "No irq assigned\n");
- return -ENODEV;
- }
-
- res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res_mem == NULL) {
- dev_err(&pdev->dev, "No register space assigned\n");
- return -ENODEV;
- }
-
- /*
- * We can DMA from anywhere. But the descriptors must be in
- * the lower 4GB.
- */
- pdev->dev.dma_mask = &ehci_octeon_dma_mask;
- ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
- if (ret)
- return ret;
-
- hcd = usb_create_hcd(&ehci_octeon_hc_driver, &pdev->dev, "octeon");
- if (!hcd)
- return -ENOMEM;
-
- hcd->rsrc_start = res_mem->start;
- hcd->rsrc_len = resource_size(res_mem);
-
- hcd->regs = devm_ioremap_resource(&pdev->dev, res_mem);
- if (IS_ERR(hcd->regs)) {
- ret = PTR_ERR(hcd->regs);
- goto err1;
- }
-
- ehci_octeon_start();
-
- ehci = hcd_to_ehci(hcd);
-
- /* Octeon EHCI matches CPU endianness. */
-#ifdef __BIG_ENDIAN
- ehci->big_endian_mmio = 1;
-#endif
-
- ehci->caps = hcd->regs;
-
- ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
- if (ret) {
- dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret);
- goto err2;
- }
- device_wakeup_enable(hcd->self.controller);
-
- platform_set_drvdata(pdev, hcd);
-
- return 0;
-err2:
- ehci_octeon_stop();
-
-err1:
- usb_put_hcd(hcd);
- return ret;
-}
-
-static int ehci_octeon_drv_remove(struct platform_device *pdev)
-{
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
-
- usb_remove_hcd(hcd);
-
- ehci_octeon_stop();
- usb_put_hcd(hcd);
-
- return 0;
-}
-
-static struct platform_driver ehci_octeon_driver = {
- .probe = ehci_octeon_drv_probe,
- .remove = ehci_octeon_drv_remove,
- .shutdown = usb_hcd_platform_shutdown,
- .driver = {
- .name = OCTEON_EHCI_HCD_NAME,
- .owner = THIS_MODULE,
- }
-};
-
-MODULE_ALIAS("platform:" OCTEON_EHCI_HCD_NAME);
diff --git a/drivers/usb/host/octeon2-common.c b/drivers/usb/host/octeon2-common.c
deleted file mode 100644
index d9df423..0000000
--- a/drivers/usb/host/octeon2-common.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2010, 2011 Cavium Networks
- */
-
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/delay.h>
-
-#include <asm/octeon/octeon.h>
-#include <asm/octeon/cvmx-uctlx-defs.h>
-
-static DEFINE_MUTEX(octeon2_usb_clocks_mutex);
-
-static int octeon2_usb_clock_start_cnt;
-
-void octeon2_usb_clocks_start(void)
-{
- u64 div;
- union cvmx_uctlx_if_ena if_ena;
- union cvmx_uctlx_clk_rst_ctl clk_rst_ctl;
- union cvmx_uctlx_uphy_ctl_status uphy_ctl_status;
- union cvmx_uctlx_uphy_portx_ctl_status port_ctl_status;
- int i;
- unsigned long io_clk_64_to_ns;
-
-
- mutex_lock(&octeon2_usb_clocks_mutex);
-
- octeon2_usb_clock_start_cnt++;
- if (octeon2_usb_clock_start_cnt != 1)
- goto exit;
-
- io_clk_64_to_ns = 64000000000ull / octeon_get_io_clock_rate();
-
- /*
- * Step 1: Wait for voltages stable. That surely happened
- * before starting the kernel.
- *
- * Step 2: Enable SCLK of UCTL by writing UCTL0_IF_ENA[EN] = 1
- */
- if_ena.u64 = 0;
- if_ena.s.en = 1;
- cvmx_write_csr(CVMX_UCTLX_IF_ENA(0), if_ena.u64);
-
- /* Step 3: Configure the reference clock, PHY, and HCLK */
- clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
-
- /*
- * If the UCTL looks like it has already been started, skip
- * the initialization, otherwise bus errors are obtained.
- */
- if (clk_rst_ctl.s.hrst)
- goto end_clock;
- /* 3a */
- clk_rst_ctl.s.p_por = 1;
- clk_rst_ctl.s.hrst = 0;
- clk_rst_ctl.s.p_prst = 0;
- clk_rst_ctl.s.h_clkdiv_rst = 0;
- clk_rst_ctl.s.o_clkdiv_rst = 0;
- clk_rst_ctl.s.h_clkdiv_en = 0;
- clk_rst_ctl.s.o_clkdiv_en = 0;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 3b */
- /* 12MHz crystal. */
- clk_rst_ctl.s.p_refclk_sel = 0;
- clk_rst_ctl.s.p_refclk_div = 0;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 3c */
- div = octeon_get_io_clock_rate() / 130000000ull;
-
- switch (div) {
- case 0:
- div = 1;
- break;
- case 1:
- case 2:
- case 3:
- case 4:
- break;
- case 5:
- div = 4;
- break;
- case 6:
- case 7:
- div = 6;
- break;
- case 8:
- case 9:
- case 10:
- case 11:
- div = 8;
- break;
- default:
- div = 12;
- break;
- }
- clk_rst_ctl.s.h_div = div;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
- /* Read it back, */
- clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
- clk_rst_ctl.s.h_clkdiv_en = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
- /* 3d */
- clk_rst_ctl.s.h_clkdiv_rst = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 3e: delay 64 io clocks */
- ndelay(io_clk_64_to_ns);
-
- /*
- * Step 4: Program the power-on reset field in the UCTL
- * clock-reset-control register.
- */
- clk_rst_ctl.s.p_por = 0;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* Step 5: Wait 1 ms for the PHY clock to start. */
- mdelay(1);
-
- /*
- * Step 6: Program the reset input from automatic test
- * equipment field in the UPHY CSR
- */
- uphy_ctl_status.u64 = cvmx_read_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0));
- uphy_ctl_status.s.ate_reset = 1;
- cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64);
-
- /* Step 7: Wait for at least 10ns. */
- ndelay(10);
-
- /* Step 8: Clear the ATE_RESET field in the UPHY CSR. */
- uphy_ctl_status.s.ate_reset = 0;
- cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64);
-
- /*
- * Step 9: Wait for at least 20ns for UPHY to output PHY clock
- * signals and OHCI_CLK48
- */
- ndelay(20);
-
- /* Step 10: Configure the OHCI_CLK48 and OHCI_CLK12 clocks. */
- /* 10a */
- clk_rst_ctl.s.o_clkdiv_rst = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 10b */
- clk_rst_ctl.s.o_clkdiv_en = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 10c */
- ndelay(io_clk_64_to_ns);
-
- /*
- * Step 11: Program the PHY reset field:
- * UCTL0_CLK_RST_CTL[P_PRST] = 1
- */
- clk_rst_ctl.s.p_prst = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* Step 12: Wait 1 uS. */
- udelay(1);
-
- /* Step 13: Program the HRESET_N field: UCTL0_CLK_RST_CTL[HRST] = 1 */
- clk_rst_ctl.s.hrst = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
-end_clock:
- /* Now we can set some other registers. */
-
- for (i = 0; i <= 1; i++) {
- port_ctl_status.u64 =
- cvmx_read_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0));
- /* Set txvreftune to 15 to obtain compliant 'eye' diagram. */
- port_ctl_status.s.txvreftune = 15;
- port_ctl_status.s.txrisetune = 1;
- port_ctl_status.s.txpreemphasistune = 1;
- cvmx_write_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0),
- port_ctl_status.u64);
- }
-
- /* Set uSOF cycle period to 60,000 bits. */
- cvmx_write_csr(CVMX_UCTLX_EHCI_FLA(0), 0x20ull);
-exit:
- mutex_unlock(&octeon2_usb_clocks_mutex);
-}
-EXPORT_SYMBOL(octeon2_usb_clocks_start);
-
-void octeon2_usb_clocks_stop(void)
-{
- mutex_lock(&octeon2_usb_clocks_mutex);
- octeon2_usb_clock_start_cnt--;
- mutex_unlock(&octeon2_usb_clocks_mutex);
-}
-EXPORT_SYMBOL(octeon2_usb_clocks_stop);
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index d664eda..1dab9df 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1249,11 +1249,6 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ohci_hcd_jz4740_driver
#endif
-#ifdef CONFIG_USB_OCTEON_OHCI
-#include "ohci-octeon.c"
-#define PLATFORM_DRIVER ohci_octeon_driver
-#endif
-
#ifdef CONFIG_TILE_USB
#include "ohci-tilegx.c"
#define PLATFORM_DRIVER ohci_hcd_tilegx_driver
diff --git a/drivers/usb/host/ohci-octeon.c b/drivers/usb/host/ohci-octeon.c
deleted file mode 100644
index 15af895..0000000
--- a/drivers/usb/host/ohci-octeon.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * EHCI HCD glue for Cavium Octeon II SOCs.
- *
- * Loosely based on ehci-au1xxx.c
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2010 Cavium Networks
- *
- */
-
-#include <linux/platform_device.h>
-
-#include <asm/octeon/octeon.h>
-#include <asm/octeon/cvmx-uctlx-defs.h>
-
-#define OCTEON_OHCI_HCD_NAME "octeon-ohci"
-
-/* Common clock init code. */
-void octeon2_usb_clocks_start(void);
-void octeon2_usb_clocks_stop(void);
-
-static void ohci_octeon_hw_start(void)
-{
- union cvmx_uctlx_ohci_ctl ohci_ctl;
-
- octeon2_usb_clocks_start();
-
- ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0));
- ohci_ctl.s.l2c_addr_msb = 0;
- ohci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
- ohci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
- cvmx_write_csr(CVMX_UCTLX_OHCI_CTL(0), ohci_ctl.u64);
-
-}
-
-static void ohci_octeon_hw_stop(void)
-{
- /* Undo ohci_octeon_start() */
- octeon2_usb_clocks_stop();
-}
-
-static int ohci_octeon_start(struct usb_hcd *hcd)
-{
- struct ohci_hcd *ohci = hcd_to_ohci(hcd);
- int ret;
-
- ret = ohci_init(ohci);
-
- if (ret < 0)
- return ret;
-
- ret = ohci_run(ohci);
-
- if (ret < 0) {
- ohci_err(ohci, "can't start %s", hcd->self.bus_name);
- ohci_stop(hcd);
- return ret;
- }
-
- return 0;
-}
-
-static const struct hc_driver ohci_octeon_hc_driver = {
- .description = hcd_name,
- .product_desc = "Octeon OHCI",
- .hcd_priv_size = sizeof(struct ohci_hcd),
-
- /*
- * generic hardware linkage
- */
- .irq = ohci_irq,
- .flags = HCD_USB11 | HCD_MEMORY,
-
- /*
- * basic lifecycle operations
- */
- .start = ohci_octeon_start,
- .stop = ohci_stop,
- .shutdown = ohci_shutdown,
-
- /*
- * managing i/o requests and associated device resources
- */
- .urb_enqueue = ohci_urb_enqueue,
- .urb_dequeue = ohci_urb_dequeue,
- .endpoint_disable = ohci_endpoint_disable,
-
- /*
- * scheduling support
- */
- .get_frame_number = ohci_get_frame,
-
- /*
- * root hub support
- */
- .hub_status_data = ohci_hub_status_data,
- .hub_control = ohci_hub_control,
-
- .start_port_reset = ohci_start_port_reset,
-};
-
-static int ohci_octeon_drv_probe(struct platform_device *pdev)
-{
- struct usb_hcd *hcd;
- struct ohci_hcd *ohci;
- void *reg_base;
- struct resource *res_mem;
- int irq;
- int ret;
-
- if (usb_disabled())
- return -ENODEV;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- dev_err(&pdev->dev, "No irq assigned\n");
- return -ENODEV;
- }
-
- res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res_mem == NULL) {
- dev_err(&pdev->dev, "No register space assigned\n");
- return -ENODEV;
- }
-
- /* Ohci is a 32-bit device. */
- ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
- if (ret)
- return ret;
-
- hcd = usb_create_hcd(&ohci_octeon_hc_driver, &pdev->dev, "octeon");
- if (!hcd)
- return -ENOMEM;
-
- hcd->rsrc_start = res_mem->start;
- hcd->rsrc_len = resource_size(res_mem);
-
- reg_base = devm_ioremap_resource(&pdev->dev, res_mem);
- if (IS_ERR(reg_base)) {
- ret = PTR_ERR(reg_base);
- goto err1;
- }
-
- ohci_octeon_hw_start();
-
- hcd->regs = reg_base;
-
- ohci = hcd_to_ohci(hcd);
-
- /* Octeon OHCI matches CPU endianness. */
-#ifdef __BIG_ENDIAN
- ohci->flags |= OHCI_QUIRK_BE_MMIO;
-#endif
-
- ohci_hcd_init(ohci);
-
- ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
- if (ret) {
- dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret);
- goto err2;
- }
-
- device_wakeup_enable(hcd->self.controller);
-
- platform_set_drvdata(pdev, hcd);
-
- return 0;
-
-err2:
- ohci_octeon_hw_stop();
-
-err1:
- usb_put_hcd(hcd);
- return ret;
-}
-
-static int ohci_octeon_drv_remove(struct platform_device *pdev)
-{
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
-
- usb_remove_hcd(hcd);
-
- ohci_octeon_hw_stop();
- usb_put_hcd(hcd);
-
- return 0;
-}
-
-static struct platform_driver ohci_octeon_driver = {
- .probe = ohci_octeon_drv_probe,
- .remove = ohci_octeon_drv_remove,
- .shutdown = usb_hcd_platform_shutdown,
- .driver = {
- .name = OCTEON_OHCI_HCD_NAME,
- .owner = THIS_MODULE,
- }
-};
-
-MODULE_ALIAS("platform:" OCTEON_OHCI_HCD_NAME);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/3] USB: host: Remove hard-coded octeon platform information for ehci/ohci
2014-11-13 21:36 [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Andreas Herrmann
2014-11-13 21:36 ` [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers Andreas Herrmann
@ 2014-11-13 21:36 ` Andreas Herrmann
2014-11-14 9:33 ` Ralf Baechle
2014-11-13 21:36 ` [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform Andreas Herrmann
2014-11-13 22:13 ` [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Alan Stern
3 siblings, 1 reply; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-13 21:36 UTC (permalink / raw)
To: Alan Stern
Cc: Andreas Herrmann, David Daney, Alex Smith, Linux-MIPS, linux-usb
Instead rely on device tree information for ehci and ohci.
This was suggested with
http://www.linux-mips.org/archives/linux-mips/2014-05/msg00307.html
"The device tree will *always* have correct ehci/ohci clock
configuration, so use it. This allows us to remove a big chunk of
platform configuration code from octeon-platform.c."
More or less I rebased that patch on Alan's work to remove ehci-octeon
and ohci-octeon drivers.
Cc: David Daney <david.daney@cavium.com>
Cc: Alex Smith <alex.smith@imgtec.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
---
arch/mips/cavium-octeon/octeon-platform.c | 148 ++++++++++++-----------------
drivers/usb/host/ehci-platform.c | 1 +
drivers/usb/host/ohci-platform.c | 1 +
3 files changed, 64 insertions(+), 86 deletions(-)
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index b67ddf0..eea60b6 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -77,7 +77,7 @@ static DEFINE_MUTEX(octeon2_usb_clocks_mutex);
static int octeon2_usb_clock_start_cnt;
-static void octeon2_usb_clocks_start(void)
+static void octeon2_usb_clocks_start(struct device *dev)
{
u64 div;
union cvmx_uctlx_if_ena if_ena;
@@ -86,6 +86,8 @@ static void octeon2_usb_clocks_start(void)
union cvmx_uctlx_uphy_portx_ctl_status port_ctl_status;
int i;
unsigned long io_clk_64_to_ns;
+ u32 clock_rate = 12000000;
+ bool is_crystal_clock = false;
mutex_lock(&octeon2_usb_clocks_mutex);
@@ -96,6 +98,28 @@ static void octeon2_usb_clocks_start(void)
io_clk_64_to_ns = 64000000000ull / octeon_get_io_clock_rate();
+ if (dev->of_node) {
+ struct device_node *uctl_node;
+ const char *clock_type;
+
+ uctl_node = of_get_parent(dev->of_node);
+ if (!uctl_node) {
+ dev_err(dev, "No UCTL device node\n");
+ goto exit;
+ }
+ i = of_property_read_u32(uctl_node,
+ "refclk-frequency", &clock_rate);
+ if (i) {
+ dev_err(dev, "No UCTL \"refclk-frequency\"\n");
+ goto exit;
+ }
+ i = of_property_read_string(uctl_node,
+ "refclk-type", &clock_type);
+
+ if (!i && strcmp("crystal", clock_type) == 0)
+ is_crystal_clock = true;
+ }
+
/*
* Step 1: Wait for voltages stable. That surely happened
* before starting the kernel.
@@ -126,9 +150,22 @@ static void octeon2_usb_clocks_start(void)
cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
/* 3b */
- /* 12MHz crystal. */
- clk_rst_ctl.s.p_refclk_sel = 0;
- clk_rst_ctl.s.p_refclk_div = 0;
+ clk_rst_ctl.s.p_refclk_sel = is_crystal_clock ? 0 : 1;
+ switch (clock_rate) {
+ default:
+ pr_err("Invalid UCTL clock rate of %u, using 12000000 instead\n",
+ clock_rate);
+ /* Fall through */
+ case 12000000:
+ clk_rst_ctl.s.p_refclk_div = 0;
+ break;
+ case 24000000:
+ clk_rst_ctl.s.p_refclk_div = 1;
+ break;
+ case 48000000:
+ clk_rst_ctl.s.p_refclk_div = 2;
+ break;
+ }
cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
/* 3c */
@@ -259,7 +296,7 @@ static void octeon2_usb_clocks_stop(void)
static int octeon_ehci_power_on(struct platform_device *pdev)
{
- octeon2_usb_clocks_start();
+ octeon2_usb_clocks_start(&pdev->dev);
return 0;
}
@@ -277,11 +314,11 @@ static struct usb_ehci_pdata octeon_ehci_pdata = {
.power_off = octeon_ehci_power_off,
};
-static void __init octeon_ehci_hw_start(void)
+static void __init octeon_ehci_hw_start(struct device *dev)
{
union cvmx_uctlx_ehci_ctl ehci_ctl;
- octeon2_usb_clocks_start();
+ octeon2_usb_clocks_start(dev);
ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
/* Use 64-bit addressing. */
@@ -299,59 +336,28 @@ static u64 octeon_ehci_dma_mask = DMA_BIT_MASK(64);
static int __init octeon_ehci_device_init(void)
{
struct platform_device *pd;
+ struct device_node *ehci_node;
int ret = 0;
- struct resource usb_resources[] = {
- {
- .flags = IORESOURCE_MEM,
- }, {
- .flags = IORESOURCE_IRQ,
- }
- };
-
- /* Only Octeon2 has ehci/ohci */
- if (!OCTEON_IS_MODEL(OCTEON_CN63XX))
+ ehci_node = of_find_node_by_name(NULL, "ehci");
+ if (!ehci_node)
return 0;
- if (octeon_is_simulation() || usb_disabled())
- return 0; /* No USB in the simulator. */
-
- pd = platform_device_alloc("ehci-platform", 0);
- if (!pd) {
- ret = -ENOMEM;
- goto out;
- }
-
- usb_resources[0].start = 0x00016F0000000000ULL;
- usb_resources[0].end = usb_resources[0].start + 0x100;
-
- usb_resources[1].start = OCTEON_IRQ_USB0;
- usb_resources[1].end = OCTEON_IRQ_USB0;
-
- ret = platform_device_add_resources(pd, usb_resources,
- ARRAY_SIZE(usb_resources));
- if (ret)
- goto fail;
+ pd = of_find_device_by_node(ehci_node);
+ if (!pd)
+ return 0;
pd->dev.dma_mask = &octeon_ehci_dma_mask;
pd->dev.platform_data = &octeon_ehci_pdata;
- octeon_ehci_hw_start();
-
- ret = platform_device_add(pd);
- if (ret)
- goto fail;
+ octeon_ehci_hw_start(&pd->dev);
return ret;
-fail:
- platform_device_put(pd);
-out:
- return ret;
}
device_initcall(octeon_ehci_device_init);
static int octeon_ohci_power_on(struct platform_device *pdev)
{
- octeon2_usb_clocks_start();
+ octeon2_usb_clocks_start(&pdev->dev);
return 0;
}
@@ -369,11 +375,11 @@ static struct usb_ohci_pdata octeon_ohci_pdata = {
.power_off = octeon_ohci_power_off,
};
-static void __init octeon_ohci_hw_start(void)
+static void __init octeon_ohci_hw_start(struct device *dev)
{
union cvmx_uctlx_ohci_ctl ohci_ctl;
- octeon2_usb_clocks_start();
+ octeon2_usb_clocks_start(dev);
ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0));
ohci_ctl.s.l2c_addr_msb = 0;
@@ -387,57 +393,27 @@ static void __init octeon_ohci_hw_start(void)
static int __init octeon_ohci_device_init(void)
{
struct platform_device *pd;
+ struct device_node *ohci_node;
int ret = 0;
- struct resource usb_resources[] = {
- {
- .flags = IORESOURCE_MEM,
- }, {
- .flags = IORESOURCE_IRQ,
- }
- };
-
- /* Only Octeon2 has ehci/ohci */
- if (!OCTEON_IS_MODEL(OCTEON_CN63XX))
+ ohci_node = of_find_node_by_name(NULL, "ohci");
+ if (!ohci_node)
return 0;
- if (octeon_is_simulation() || usb_disabled())
- return 0; /* No USB in the simulator. */
-
- pd = platform_device_alloc("ohci-platform", 0);
- if (!pd) {
- ret = -ENOMEM;
- goto out;
- }
-
- usb_resources[0].start = 0x00016F0000000400ULL;
- usb_resources[0].end = usb_resources[0].start + 0x100;
-
- usb_resources[1].start = OCTEON_IRQ_USB0;
- usb_resources[1].end = OCTEON_IRQ_USB0;
-
- ret = platform_device_add_resources(pd, usb_resources,
- ARRAY_SIZE(usb_resources));
- if (ret)
- goto fail;
+ pd = of_find_device_by_node(ohci_node);
+ if (!pd)
+ return 0;
pd->dev.platform_data = &octeon_ohci_pdata;
- octeon_ohci_hw_start();
-
- ret = platform_device_add(pd);
- if (ret)
- goto fail;
+ octeon_ohci_hw_start(&pd->dev);
return ret;
-fail:
- platform_device_put(pd);
-out:
- return ret;
}
device_initcall(octeon_ohci_device_init);
#endif /* CONFIG_USB */
+
static struct of_device_id __initdata octeon_ids[] = {
{ .compatible = "simple-bus", },
{ .compatible = "cavium,octeon-6335-uctl", },
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index 2f5b9ce..2da18ea 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -358,6 +358,7 @@ static const struct of_device_id vt8500_ehci_ids[] = {
{ .compatible = "via,vt8500-ehci", },
{ .compatible = "wm,prizm-ehci", },
{ .compatible = "generic-ehci", },
+ { .compatible = "cavium,octeon-6335-ehci", },
{}
};
MODULE_DEVICE_TABLE(of, vt8500_ehci_ids);
diff --git a/drivers/usb/host/ohci-platform.c b/drivers/usb/host/ohci-platform.c
index 4369299..cb29865 100644
--- a/drivers/usb/host/ohci-platform.c
+++ b/drivers/usb/host/ohci-platform.c
@@ -343,6 +343,7 @@ static int ohci_platform_resume(struct device *dev)
static const struct of_device_id ohci_platform_ids[] = {
{ .compatible = "generic-ohci", },
+ { .compatible = "cavium,octeon-6335-ohci", },
{ }
};
MODULE_DEVICE_TABLE(of, ohci_platform_ids);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform
2014-11-13 21:36 [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Andreas Herrmann
2014-11-13 21:36 ` [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers Andreas Herrmann
2014-11-13 21:36 ` [PATCH 2/3] USB: host: Remove hard-coded octeon platform information for ehci/ohci Andreas Herrmann
@ 2014-11-13 21:36 ` Andreas Herrmann
2014-11-14 4:44 ` Florian Fainelli
2014-11-13 22:13 ` [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Alan Stern
3 siblings, 1 reply; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-13 21:36 UTC (permalink / raw)
To: Alan Stern
Cc: Andreas Herrmann, David Daney, Alex Smith, Linux-MIPS, linux-usb
ehci-octeon driver used a 64-bit dma_mask. With removal of ehci-octeon
and usage of ehci-platform ehci dma_mask is now limited to 32 bits
(coerced in ehci_platform_probe).
Provide a flag in ehci platform data to allow use of 64 bits for
dma_mask.
Cc: David Daney <david.daney@cavium.com>
Cc: Alex Smith <alex.smith@imgtec.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
---
arch/mips/cavium-octeon/octeon-platform.c | 4 +---
drivers/usb/host/ehci-platform.c | 3 ++-
include/linux/usb/ehci_pdriver.h | 1 +
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index eea60b6..12410a2 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -310,6 +310,7 @@ static struct usb_ehci_pdata octeon_ehci_pdata = {
#ifdef __BIG_ENDIAN
.big_endian_mmio = 1,
#endif
+ .dma_mask_64 = 1,
.power_on = octeon_ehci_power_on,
.power_off = octeon_ehci_power_off,
};
@@ -331,8 +332,6 @@ static void __init octeon_ehci_hw_start(struct device *dev)
octeon2_usb_clocks_stop();
}
-static u64 octeon_ehci_dma_mask = DMA_BIT_MASK(64);
-
static int __init octeon_ehci_device_init(void)
{
struct platform_device *pd;
@@ -347,7 +346,6 @@ static int __init octeon_ehci_device_init(void)
if (!pd)
return 0;
- pd->dev.dma_mask = &octeon_ehci_dma_mask;
pd->dev.platform_data = &octeon_ehci_pdata;
octeon_ehci_hw_start(&pd->dev);
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index 2da18ea..6df808b 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -155,7 +155,8 @@ static int ehci_platform_probe(struct platform_device *dev)
if (!pdata)
pdata = &ehci_platform_defaults;
- err = dma_coerce_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
+ err = dma_coerce_mask_and_coherent(&dev->dev,
+ pdata->dma_mask_64 ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32));
if (err)
return err;
diff --git a/include/linux/usb/ehci_pdriver.h b/include/linux/usb/ehci_pdriver.h
index 7eb4dcd..f69529e 100644
--- a/include/linux/usb/ehci_pdriver.h
+++ b/include/linux/usb/ehci_pdriver.h
@@ -45,6 +45,7 @@ struct usb_ehci_pdata {
unsigned big_endian_desc:1;
unsigned big_endian_mmio:1;
unsigned no_io_watchdog:1;
+ unsigned dma_mask_64:1;
/* Turn on all power and clocks */
int (*power_on)(struct platform_device *pdev);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information
2014-11-13 21:36 [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Andreas Herrmann
` (2 preceding siblings ...)
2014-11-13 21:36 ` [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform Andreas Herrmann
@ 2014-11-13 22:13 ` Alan Stern
2014-11-14 11:47 ` Andreas Herrmann
3 siblings, 1 reply; 18+ messages in thread
From: Alan Stern @ 2014-11-13 22:13 UTC (permalink / raw)
To: Andreas Herrmann; +Cc: David Daney, Alex Smith, Linux-MIPS, linux-usb
On Thu, 13 Nov 2014, Andreas Herrmann wrote:
> Hi Alan,
>
> With following patches I want to base octeon ehci/ohci device
> configuration on device tree information.
>
> I picked up patches that were submitted in May. See
> http://marc.info/?l=linux-usb&m=140135823325811&w=2
> and http://marc.info/?l=linux-mips&m=140139694721623&w=2
>
> Patch #1 is your "untested preliminary pass" to remove
> [oe]hci-octeon drivers.
> Patch #2 is the removal of hard-coded platform information (but now
> rebased on your patch)
> Patch #3 adapts dma_mask for ehci (as used in ehci-octeon)
>
> Overall diffstat is
>
> arch/mips/cavium-octeon/octeon-platform.c | 380 +++++++++++++++++++++++------
> arch/mips/configs/cavium_octeon_defconfig | 3 +
> drivers/usb/host/Kconfig | 18 +-
> drivers/usb/host/Makefile | 1 -
> drivers/usb/host/ehci-hcd.c | 5 -
> drivers/usb/host/ehci-octeon.c | 188 --------------
> drivers/usb/host/ehci-platform.c | 4 +-
> drivers/usb/host/octeon2-common.c | 200 ---------------
> drivers/usb/host/ohci-hcd.c | 5 -
> drivers/usb/host/ohci-octeon.c | 202 ---------------
> drivers/usb/host/ohci-platform.c | 1 +
> include/linux/usb/ehci_pdriver.h | 1 +
> 12 files changed, 330 insertions(+), 678 deletions(-)
>
> Patches are based on v3.18-rc4-65-g2c54396
>
> Comments welcome.
At a very quick first glance, it looks great. Have you tested it
thoroughly?
Alan Stern
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform
2014-11-13 21:36 ` [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform Andreas Herrmann
@ 2014-11-14 4:44 ` Florian Fainelli
2014-11-14 8:51 ` Andreas Herrmann
0 siblings, 1 reply; 18+ messages in thread
From: Florian Fainelli @ 2014-11-14 4:44 UTC (permalink / raw)
To: Andreas Herrmann
Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
2014-11-13 13:36 GMT-08:00 Andreas Herrmann
<andreas.herrmann@caviumnetworks.com>:
> ehci-octeon driver used a 64-bit dma_mask. With removal of ehci-octeon
> and usage of ehci-platform ehci dma_mask is now limited to 32 bits
> (coerced in ehci_platform_probe).
>
> Provide a flag in ehci platform data to allow use of 64 bits for
> dma_mask.
Why not just allow enforcing an arbitrary DMA mask?
>
> Cc: David Daney <david.daney@cavium.com>
> Cc: Alex Smith <alex.smith@imgtec.com>
> Cc: Alan Stern <stern@rowland.harvard.edu>
> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> ---
> arch/mips/cavium-octeon/octeon-platform.c | 4 +---
> drivers/usb/host/ehci-platform.c | 3 ++-
> include/linux/usb/ehci_pdriver.h | 1 +
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
> index eea60b6..12410a2 100644
> --- a/arch/mips/cavium-octeon/octeon-platform.c
> +++ b/arch/mips/cavium-octeon/octeon-platform.c
> @@ -310,6 +310,7 @@ static struct usb_ehci_pdata octeon_ehci_pdata = {
> #ifdef __BIG_ENDIAN
> .big_endian_mmio = 1,
> #endif
> + .dma_mask_64 = 1,
> .power_on = octeon_ehci_power_on,
> .power_off = octeon_ehci_power_off,
> };
> @@ -331,8 +332,6 @@ static void __init octeon_ehci_hw_start(struct device *dev)
> octeon2_usb_clocks_stop();
> }
>
> -static u64 octeon_ehci_dma_mask = DMA_BIT_MASK(64);
> -
> static int __init octeon_ehci_device_init(void)
> {
> struct platform_device *pd;
> @@ -347,7 +346,6 @@ static int __init octeon_ehci_device_init(void)
> if (!pd)
> return 0;
>
> - pd->dev.dma_mask = &octeon_ehci_dma_mask;
> pd->dev.platform_data = &octeon_ehci_pdata;
> octeon_ehci_hw_start(&pd->dev);
>
> diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
> index 2da18ea..6df808b 100644
> --- a/drivers/usb/host/ehci-platform.c
> +++ b/drivers/usb/host/ehci-platform.c
> @@ -155,7 +155,8 @@ static int ehci_platform_probe(struct platform_device *dev)
> if (!pdata)
> pdata = &ehci_platform_defaults;
>
> - err = dma_coerce_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
> + err = dma_coerce_mask_and_coherent(&dev->dev,
> + pdata->dma_mask_64 ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32));
> if (err)
> return err;
>
> diff --git a/include/linux/usb/ehci_pdriver.h b/include/linux/usb/ehci_pdriver.h
> index 7eb4dcd..f69529e 100644
> --- a/include/linux/usb/ehci_pdriver.h
> +++ b/include/linux/usb/ehci_pdriver.h
> @@ -45,6 +45,7 @@ struct usb_ehci_pdata {
> unsigned big_endian_desc:1;
> unsigned big_endian_mmio:1;
> unsigned no_io_watchdog:1;
> + unsigned dma_mask_64:1;
>
> /* Turn on all power and clocks */
> int (*power_on)(struct platform_device *pdev);
> --
> 1.7.9.5
>
>
--
Florian
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform
2014-11-14 4:44 ` Florian Fainelli
@ 2014-11-14 8:51 ` Andreas Herrmann
2014-11-14 15:23 ` Alan Stern
0 siblings, 1 reply; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-14 8:51 UTC (permalink / raw)
To: Florian Fainelli
Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Thu, Nov 13, 2014 at 08:44:17PM -0800, Florian Fainelli wrote:
> 2014-11-13 13:36 GMT-08:00 Andreas Herrmann
> <andreas.herrmann@caviumnetworks.com>:
> > ehci-octeon driver used a 64-bit dma_mask. With removal of ehci-octeon
> > and usage of ehci-platform ehci dma_mask is now limited to 32 bits
> > (coerced in ehci_platform_probe).
> >
> > Provide a flag in ehci platform data to allow use of 64 bits for
> > dma_mask.
>
> Why not just allow enforcing an arbitrary DMA mask?
I thought about that but as it's currently just 32 or 64 bits
a flag is sufficient. (At the moment I am not aware that
other ehci-platform devices would require something else.)
I'll change the flag to a mask if desired.
Alan, what's your opinion about this?
Andreas
> > Cc: David Daney <david.daney@cavium.com>
> > Cc: Alex Smith <alex.smith@imgtec.com>
> > Cc: Alan Stern <stern@rowland.harvard.edu>
> > Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> > ---
> > arch/mips/cavium-octeon/octeon-platform.c | 4 +---
> > drivers/usb/host/ehci-platform.c | 3 ++-
> > include/linux/usb/ehci_pdriver.h | 1 +
> > 3 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
> > index eea60b6..12410a2 100644
> > --- a/arch/mips/cavium-octeon/octeon-platform.c
> > +++ b/arch/mips/cavium-octeon/octeon-platform.c
> > @@ -310,6 +310,7 @@ static struct usb_ehci_pdata octeon_ehci_pdata = {
> > #ifdef __BIG_ENDIAN
> > .big_endian_mmio = 1,
> > #endif
> > + .dma_mask_64 = 1,
> > .power_on = octeon_ehci_power_on,
> > .power_off = octeon_ehci_power_off,
> > };
> > @@ -331,8 +332,6 @@ static void __init octeon_ehci_hw_start(struct device *dev)
> > octeon2_usb_clocks_stop();
> > }
> >
> > -static u64 octeon_ehci_dma_mask = DMA_BIT_MASK(64);
> > -
> > static int __init octeon_ehci_device_init(void)
> > {
> > struct platform_device *pd;
> > @@ -347,7 +346,6 @@ static int __init octeon_ehci_device_init(void)
> > if (!pd)
> > return 0;
> >
> > - pd->dev.dma_mask = &octeon_ehci_dma_mask;
> > pd->dev.platform_data = &octeon_ehci_pdata;
> > octeon_ehci_hw_start(&pd->dev);
> >
> > diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
> > index 2da18ea..6df808b 100644
> > --- a/drivers/usb/host/ehci-platform.c
> > +++ b/drivers/usb/host/ehci-platform.c
> > @@ -155,7 +155,8 @@ static int ehci_platform_probe(struct platform_device *dev)
> > if (!pdata)
> > pdata = &ehci_platform_defaults;
> >
> > - err = dma_coerce_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
> > + err = dma_coerce_mask_and_coherent(&dev->dev,
> > + pdata->dma_mask_64 ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32));
> > if (err)
> > return err;
> >
> > diff --git a/include/linux/usb/ehci_pdriver.h b/include/linux/usb/ehci_pdriver.h
> > index 7eb4dcd..f69529e 100644
> > --- a/include/linux/usb/ehci_pdriver.h
> > +++ b/include/linux/usb/ehci_pdriver.h
> > @@ -45,6 +45,7 @@ struct usb_ehci_pdata {
> > unsigned big_endian_desc:1;
> > unsigned big_endian_mmio:1;
> > unsigned no_io_watchdog:1;
> > + unsigned dma_mask_64:1;
> >
> > /* Turn on all power and clocks */
> > int (*power_on)(struct platform_device *pdev);
> > --
> > 1.7.9.5
> >
> >
>
>
>
> --
> Florian
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers
2014-11-13 21:36 ` [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers Andreas Herrmann
@ 2014-11-14 9:31 ` Ralf Baechle
2014-11-14 9:58 ` Andreas Herrmann
2014-11-25 1:21 ` Greg KH
1 sibling, 1 reply; 18+ messages in thread
From: Ralf Baechle @ 2014-11-14 9:31 UTC (permalink / raw)
To: Andreas Herrmann
Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Thu, Nov 13, 2014 at 10:36:28PM +0100, Andreas Herrmann wrote:
> From: Alan Stern <stern@rowland.harvard.edu>
>
> From: Alan Stern <stern@rowland.harvard.edu>
Is there an echo?
Is there an echo?
> Remove special-purpose octeon drivers and instead use ehci-platform
> and ohci-platform as suggested with
> http://marc.info/?l=linux-mips&m=140139694721623&w=2
>
> [andreas.herrmann:
> fixed compile error]
>
> Cc: David Daney <david.daney@cavium.com>
> Cc: Alex Smith <alex.smith@imgtec.com>
> Cc: Alan Stern <stern@rowland.harvard.edu>
> Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> ---
> arch/mips/cavium-octeon/octeon-platform.c | 274 ++++++++++++++++++++++++++++-
> arch/mips/configs/cavium_octeon_defconfig | 3 +
> drivers/usb/host/Kconfig | 18 +-
> drivers/usb/host/Makefile | 1 -
> drivers/usb/host/ehci-hcd.c | 5 -
> drivers/usb/host/ehci-octeon.c | 188 --------------------
> drivers/usb/host/octeon2-common.c | 200 ---------------------
> drivers/usb/host/ohci-hcd.c | 5 -
> drivers/usb/host/ohci-octeon.c | 202 ---------------------
> 9 files changed, 285 insertions(+), 611 deletions(-)
> delete mode 100644 drivers/usb/host/ehci-octeon.c
> delete mode 100644 drivers/usb/host/octeon2-common.c
> delete mode 100644 drivers/usb/host/ohci-octeon.c
For the MIPS bits:
For the MIPS bits:
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Ralf
Ralf
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/3] USB: host: Remove hard-coded octeon platform information for ehci/ohci
2014-11-13 21:36 ` [PATCH 2/3] USB: host: Remove hard-coded octeon platform information for ehci/ohci Andreas Herrmann
@ 2014-11-14 9:33 ` Ralf Baechle
0 siblings, 0 replies; 18+ messages in thread
From: Ralf Baechle @ 2014-11-14 9:33 UTC (permalink / raw)
To: Andreas Herrmann
Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Thu, Nov 13, 2014 at 10:36:29PM +0100, Andreas Herrmann wrote:
> Instead rely on device tree information for ehci and ohci.
>
> This was suggested with
> http://www.linux-mips.org/archives/linux-mips/2014-05/msg00307.html
>
> "The device tree will *always* have correct ehci/ohci clock
> configuration, so use it. This allows us to remove a big chunk of
> platform configuration code from octeon-platform.c."
>
> More or less I rebased that patch on Alan's work to remove ehci-octeon
> and ohci-octeon drivers.
>
> Cc: David Daney <david.daney@cavium.com>
> Cc: Alex Smith <alex.smith@imgtec.com>
> Cc: Alan Stern <stern@rowland.harvard.edu>
> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
For the MIPS bits:
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Ralf
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers
2014-11-14 9:31 ` Ralf Baechle
@ 2014-11-14 9:58 ` Andreas Herrmann
0 siblings, 0 replies; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-14 9:58 UTC (permalink / raw)
To: Ralf Baechle; +Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Fri, Nov 14, 2014 at 10:31:51AM +0100, Ralf Baechle wrote:
> On Thu, Nov 13, 2014 at 10:36:28PM +0100, Andreas Herrmann wrote:
>
> > From: Alan Stern <stern@rowland.harvard.edu>
> >
> > From: Alan Stern <stern@rowland.harvard.edu>
>
> Is there an echo?
Oops.
> Is there an echo?
LOL.
> > Remove special-purpose octeon drivers and instead use ehci-platform
> > and ohci-platform as suggested with
> > http://marc.info/?l=linux-mips&m=140139694721623&w=2
> >
> > [andreas.herrmann:
> > fixed compile error]
> >
> > Cc: David Daney <david.daney@cavium.com>
> > Cc: Alex Smith <alex.smith@imgtec.com>
> > Cc: Alan Stern <stern@rowland.harvard.edu>
> > Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
> > Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> > ---
> > arch/mips/cavium-octeon/octeon-platform.c | 274 ++++++++++++++++++++++++++++-
> > arch/mips/configs/cavium_octeon_defconfig | 3 +
> > drivers/usb/host/Kconfig | 18 +-
> > drivers/usb/host/Makefile | 1 -
> > drivers/usb/host/ehci-hcd.c | 5 -
> > drivers/usb/host/ehci-octeon.c | 188 --------------------
> > drivers/usb/host/octeon2-common.c | 200 ---------------------
> > drivers/usb/host/ohci-hcd.c | 5 -
> > drivers/usb/host/ohci-octeon.c | 202 ---------------------
> > 9 files changed, 285 insertions(+), 611 deletions(-)
> > delete mode 100644 drivers/usb/host/ehci-octeon.c
> > delete mode 100644 drivers/usb/host/octeon2-common.c
> > delete mode 100644 drivers/usb/host/ohci-octeon.c
>
> For the MIPS bits:
>
> For the MIPS bits:
>
> Acked-by: Ralf Baechle <ralf@linux-mips.org>
>
> Acked-by: Ralf Baechle <ralf@linux-mips.org>
>
> Ralf
>
> Ralf
Double thanks,
Andreas
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information
2014-11-13 22:13 ` [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Alan Stern
@ 2014-11-14 11:47 ` Andreas Herrmann
2014-11-14 20:32 ` Aaro Koskinen
0 siblings, 1 reply; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-14 11:47 UTC (permalink / raw)
To: Alan Stern
Cc: Andreas Herrmann, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Thu, Nov 13, 2014 at 05:13:36PM -0500, Alan Stern wrote:
> On Thu, 13 Nov 2014, Andreas Herrmann wrote:
>
> > Hi Alan,
> >
> > With following patches I want to base octeon ehci/ohci device
> > configuration on device tree information.
> >
> > I picked up patches that were submitted in May. See
> > http://marc.info/?l=linux-usb&m=140135823325811&w=2
> > and http://marc.info/?l=linux-mips&m=140139694721623&w=2
> >
> > Patch #1 is your "untested preliminary pass" to remove
> > [oe]hci-octeon drivers.
> > Patch #2 is the removal of hard-coded platform information (but now
> > rebased on your patch)
> > Patch #3 adapts dma_mask for ehci (as used in ehci-octeon)
> >
> > Overall diffstat is
> >
> > arch/mips/cavium-octeon/octeon-platform.c | 380 +++++++++++++++++++++++------
> > arch/mips/configs/cavium_octeon_defconfig | 3 +
> > drivers/usb/host/Kconfig | 18 +-
> > drivers/usb/host/Makefile | 1 -
> > drivers/usb/host/ehci-hcd.c | 5 -
> > drivers/usb/host/ehci-octeon.c | 188 --------------
> > drivers/usb/host/ehci-platform.c | 4 +-
> > drivers/usb/host/octeon2-common.c | 200 ---------------
> > drivers/usb/host/ohci-hcd.c | 5 -
> > drivers/usb/host/ohci-octeon.c | 202 ---------------
> > drivers/usb/host/ohci-platform.c | 1 +
> > include/linux/usb/ehci_pdriver.h | 1 +
> > 12 files changed, 330 insertions(+), 678 deletions(-)
> >
> > Patches are based on v3.18-rc4-65-g2c54396
> >
> > Comments welcome.
>
> At a very quick first glance, it looks great. Have you tested it
> thoroughly?
[sorry have to use another mail account, so far your mail didn't show
up at my caviumnetworks account]
I've tested it only on an EdgeRouterPro (Octeon II system, which I
have on-site).
octeon_ehci_device_init and octeon_ohci_device_init run way before
ehci-platform and ohci-platform probe for devices. So everything
should be initialized orderly.
With current mainline (w/o these patches) USB doesn't work on my
EdgeRouterPro due to an (inappropriate) OCTEON_IS_MODEL check.
I'd say having the patches in linux-next for awhile wouldn't hurt.
Andreas
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform
2014-11-14 8:51 ` Andreas Herrmann
@ 2014-11-14 15:23 ` Alan Stern
2014-11-14 17:34 ` Florian Fainelli
0 siblings, 1 reply; 18+ messages in thread
From: Alan Stern @ 2014-11-14 15:23 UTC (permalink / raw)
To: Andreas Herrmann
Cc: Florian Fainelli, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Fri, 14 Nov 2014, Andreas Herrmann wrote:
> On Thu, Nov 13, 2014 at 08:44:17PM -0800, Florian Fainelli wrote:
> > 2014-11-13 13:36 GMT-08:00 Andreas Herrmann
> > <andreas.herrmann@caviumnetworks.com>:
> > > ehci-octeon driver used a 64-bit dma_mask. With removal of ehci-octeon
> > > and usage of ehci-platform ehci dma_mask is now limited to 32 bits
> > > (coerced in ehci_platform_probe).
> > >
> > > Provide a flag in ehci platform data to allow use of 64 bits for
> > > dma_mask.
> >
> > Why not just allow enforcing an arbitrary DMA mask?
>
> I thought about that but as it's currently just 32 or 64 bits
> a flag is sufficient. (At the moment I am not aware that
> other ehci-platform devices would require something else.)
>
> I'll change the flag to a mask if desired.
> Alan, what's your opinion about this?
I'm not aware of any devices that need a different DMA mask either.
Florian, do you have any reason for thinking such a thing might come
along? Like Andreas, I don't mind making it more general if there's a
good reason to do so.
Alan Stern
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform
2014-11-14 15:23 ` Alan Stern
@ 2014-11-14 17:34 ` Florian Fainelli
0 siblings, 0 replies; 18+ messages in thread
From: Florian Fainelli @ 2014-11-14 17:34 UTC (permalink / raw)
To: Alan Stern, Andreas Herrmann
Cc: David Daney, Alex Smith, Linux-MIPS, linux-usb
On 11/14/2014 07:23 AM, Alan Stern wrote:
> On Fri, 14 Nov 2014, Andreas Herrmann wrote:
>
>> On Thu, Nov 13, 2014 at 08:44:17PM -0800, Florian Fainelli wrote:
>>> 2014-11-13 13:36 GMT-08:00 Andreas Herrmann
>>> <andreas.herrmann@caviumnetworks.com>:
>>>> ehci-octeon driver used a 64-bit dma_mask. With removal of ehci-octeon
>>>> and usage of ehci-platform ehci dma_mask is now limited to 32 bits
>>>> (coerced in ehci_platform_probe).
>>>>
>>>> Provide a flag in ehci platform data to allow use of 64 bits for
>>>> dma_mask.
>>>
>>> Why not just allow enforcing an arbitrary DMA mask?
>>
>> I thought about that but as it's currently just 32 or 64 bits
>> a flag is sufficient. (At the moment I am not aware that
>> other ehci-platform devices would require something else.)
>>
>> I'll change the flag to a mask if desired.
>> Alan, what's your opinion about this?
>
> I'm not aware of any devices that need a different DMA mask either.
>
> Florian, do you have any reason for thinking such a thing might come
> along? Like Andreas, I don't mind making it more general if there's a
> good reason to do so.
I don't have a specific platform I am thinking about, just that while we
are there allowing a dma_mask to be specified, I would rather pass an
u64 that covers all possible cases.
Thanks!
--
Florian
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information
2014-11-14 11:47 ` Andreas Herrmann
@ 2014-11-14 20:32 ` Aaro Koskinen
0 siblings, 0 replies; 18+ messages in thread
From: Aaro Koskinen @ 2014-11-14 20:32 UTC (permalink / raw)
To: Andreas Herrmann
Cc: Alan Stern, Andreas Herrmann, David Daney, Alex Smith, Linux-MIPS,
linux-usb
On Fri, Nov 14, 2014 at 12:47:14PM +0100, Andreas Herrmann wrote:
> On Thu, Nov 13, 2014 at 05:13:36PM -0500, Alan Stern wrote:
> > At a very quick first glance, it looks great. Have you tested it
> > thoroughly?
>
> [sorry have to use another mail account, so far your mail didn't show
> up at my caviumnetworks account]
>
> I've tested it only on an EdgeRouterPro (Octeon II system, which I
> have on-site).
I have also tested them on EdgeRouter Pro. Thanks, this
is great improvement.
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
A.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers
2014-11-13 21:36 ` [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers Andreas Herrmann
2014-11-14 9:31 ` Ralf Baechle
@ 2014-11-25 1:21 ` Greg KH
2014-11-25 10:23 ` Andreas Herrmann
1 sibling, 1 reply; 18+ messages in thread
From: Greg KH @ 2014-11-25 1:21 UTC (permalink / raw)
To: Andreas Herrmann
Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Thu, Nov 13, 2014 at 10:36:28PM +0100, Andreas Herrmann wrote:
> From: Alan Stern <stern@rowland.harvard.edu>
>
> Remove special-purpose octeon drivers and instead use ehci-platform
> and ohci-platform as suggested with
> http://marc.info/?l=linux-mips&m=140139694721623&w=2
>
> [andreas.herrmann:
> fixed compile error]
>
> Cc: David Daney <david.daney@cavium.com>
> Cc: Alex Smith <alex.smith@imgtec.com>
> Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> Acked-by: Ralf Baechle <ralf@linux-mips.org>
> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
> ---
> arch/mips/cavium-octeon/octeon-platform.c | 274 ++++++++++++++++++++++++++++-
> arch/mips/configs/cavium_octeon_defconfig | 3 +
> drivers/usb/host/Kconfig | 18 +-
> drivers/usb/host/Makefile | 1 -
> drivers/usb/host/ehci-hcd.c | 5 -
> drivers/usb/host/ehci-octeon.c | 188 --------------------
> drivers/usb/host/octeon2-common.c | 200 ---------------------
> drivers/usb/host/ohci-hcd.c | 5 -
> drivers/usb/host/ohci-octeon.c | 202 ---------------------
> 9 files changed, 285 insertions(+), 611 deletions(-)
> delete mode 100644 drivers/usb/host/ehci-octeon.c
> delete mode 100644 drivers/usb/host/octeon2-common.c
> delete mode 100644 drivers/usb/host/ohci-octeon.c
This doesn't apply to my usb-next or usb-testing branch of usb.git on
git.kernel.org, so I can't apply it :(
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers
2014-11-25 1:21 ` Greg KH
@ 2014-11-25 10:23 ` Andreas Herrmann
2014-11-25 11:28 ` [PATCH 1/3 v2] " Andreas Herrmann
0 siblings, 1 reply; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-25 10:23 UTC (permalink / raw)
To: Greg KH; +Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Mon, Nov 24, 2014 at 05:21:34PM -0800, Greg KH wrote:
> On Thu, Nov 13, 2014 at 10:36:28PM +0100, Andreas Herrmann wrote:
> > From: Alan Stern <stern@rowland.harvard.edu>
> >
> > Remove special-purpose octeon drivers and instead use ehci-platform
> > and ohci-platform as suggested with
> > http://marc.info/?l=linux-mips&m=140139694721623&w=2
> >
> > [andreas.herrmann:
> > fixed compile error]
> >
> > Cc: David Daney <david.daney@cavium.com>
> > Cc: Alex Smith <alex.smith@imgtec.com>
> > Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
> > Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> > Acked-by: Ralf Baechle <ralf@linux-mips.org>
> > Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
> > ---
> > arch/mips/cavium-octeon/octeon-platform.c | 274 ++++++++++++++++++++++++++++-
> > arch/mips/configs/cavium_octeon_defconfig | 3 +
> > drivers/usb/host/Kconfig | 18 +-
> > drivers/usb/host/Makefile | 1 -
> > drivers/usb/host/ehci-hcd.c | 5 -
> > drivers/usb/host/ehci-octeon.c | 188 --------------------
> > drivers/usb/host/octeon2-common.c | 200 ---------------------
> > drivers/usb/host/ohci-hcd.c | 5 -
> > drivers/usb/host/ohci-octeon.c | 202 ---------------------
> > 9 files changed, 285 insertions(+), 611 deletions(-)
> > delete mode 100644 drivers/usb/host/ehci-octeon.c
> > delete mode 100644 drivers/usb/host/octeon2-common.c
> > delete mode 100644 drivers/usb/host/ohci-octeon.c
>
> This doesn't apply to my usb-next or usb-testing branch of usb.git on
> git.kernel.org, so I can't apply it :(
Sorry, I need to rebase it (on usb-next).
Andreas
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/3 v2] USB: host: Remove ehci-octeon and ohci-octeon drivers
2014-11-25 10:23 ` Andreas Herrmann
@ 2014-11-25 11:28 ` Andreas Herrmann
2014-11-25 17:19 ` Greg KH
0 siblings, 1 reply; 18+ messages in thread
From: Andreas Herrmann @ 2014-11-25 11:28 UTC (permalink / raw)
To: Greg KH; +Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
From: Alan Stern <stern@rowland.harvard.edu>
Remove special-purpose octeon drivers and instead use ehci-platform
and ohci-platform as suggested with
http://marc.info/?l=linux-mips&m=140139694721623&w=2
[andreas.herrmann:
fixed compile error]
Cc: David Daney <david.daney@cavium.com>
Cc: Alex Smith <alex.smith@imgtec.com>
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
---
arch/mips/cavium-octeon/octeon-platform.c | 274 ++++++++++++++++++++++++++++-
arch/mips/configs/cavium_octeon_defconfig | 3 +
drivers/usb/host/Kconfig | 18 +-
drivers/usb/host/Makefile | 1 -
drivers/usb/host/ehci-hcd.c | 5 -
drivers/usb/host/ehci-octeon.c | 182 -------------------
drivers/usb/host/octeon2-common.c | 200 ---------------------
drivers/usb/host/ohci-hcd.c | 5 -
drivers/usb/host/ohci-octeon.c | 196 ---------------------
9 files changed, 285 insertions(+), 599 deletions(-)
delete mode 100644 drivers/usb/host/ehci-octeon.c
delete mode 100644 drivers/usb/host/octeon2-common.c
delete mode 100644 drivers/usb/host/ohci-octeon.c
There was a conflict with commits
073153bf22764 (host: ehci-octeon: remove duplicate check on resource)
c6d413cebd82c (host: ohci-octeon: remove duplicate check on resource)
I rebased the patch to your usb-next branch as of
v3.18-rc4-66-g69b7290.
Patch 2 and 3 of the series should apply w/o issues.
Thanks,
Andreas
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index 6df0f4d..b67ddf0 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -7,22 +7,27 @@
* Copyright (C) 2008 Wind River Systems
*/
+#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/usb.h>
#include <linux/dma-mapping.h>
#include <linux/module.h>
+#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/of_platform.h>
#include <linux/of_fdt.h>
#include <linux/libfdt.h>
+#include <linux/usb/ehci_pdriver.h>
+#include <linux/usb/ohci_pdriver.h>
#include <asm/octeon/octeon.h>
#include <asm/octeon/cvmx-rnm-defs.h>
#include <asm/octeon/cvmx-helper.h>
#include <asm/octeon/cvmx-helper-board.h>
+#include <asm/octeon/cvmx-uctlx-defs.h>
/* Octeon Random Number Generator. */
static int __init octeon_rng_device_init(void)
@@ -68,6 +73,229 @@ device_initcall(octeon_rng_device_init);
#ifdef CONFIG_USB
+static DEFINE_MUTEX(octeon2_usb_clocks_mutex);
+
+static int octeon2_usb_clock_start_cnt;
+
+static void octeon2_usb_clocks_start(void)
+{
+ u64 div;
+ union cvmx_uctlx_if_ena if_ena;
+ union cvmx_uctlx_clk_rst_ctl clk_rst_ctl;
+ union cvmx_uctlx_uphy_ctl_status uphy_ctl_status;
+ union cvmx_uctlx_uphy_portx_ctl_status port_ctl_status;
+ int i;
+ unsigned long io_clk_64_to_ns;
+
+
+ mutex_lock(&octeon2_usb_clocks_mutex);
+
+ octeon2_usb_clock_start_cnt++;
+ if (octeon2_usb_clock_start_cnt != 1)
+ goto exit;
+
+ io_clk_64_to_ns = 64000000000ull / octeon_get_io_clock_rate();
+
+ /*
+ * Step 1: Wait for voltages stable. That surely happened
+ * before starting the kernel.
+ *
+ * Step 2: Enable SCLK of UCTL by writing UCTL0_IF_ENA[EN] = 1
+ */
+ if_ena.u64 = 0;
+ if_ena.s.en = 1;
+ cvmx_write_csr(CVMX_UCTLX_IF_ENA(0), if_ena.u64);
+
+ /* Step 3: Configure the reference clock, PHY, and HCLK */
+ clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
+
+ /*
+ * If the UCTL looks like it has already been started, skip
+ * the initialization, otherwise bus errors are obtained.
+ */
+ if (clk_rst_ctl.s.hrst)
+ goto end_clock;
+ /* 3a */
+ clk_rst_ctl.s.p_por = 1;
+ clk_rst_ctl.s.hrst = 0;
+ clk_rst_ctl.s.p_prst = 0;
+ clk_rst_ctl.s.h_clkdiv_rst = 0;
+ clk_rst_ctl.s.o_clkdiv_rst = 0;
+ clk_rst_ctl.s.h_clkdiv_en = 0;
+ clk_rst_ctl.s.o_clkdiv_en = 0;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 3b */
+ /* 12MHz crystal. */
+ clk_rst_ctl.s.p_refclk_sel = 0;
+ clk_rst_ctl.s.p_refclk_div = 0;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 3c */
+ div = octeon_get_io_clock_rate() / 130000000ull;
+
+ switch (div) {
+ case 0:
+ div = 1;
+ break;
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ break;
+ case 5:
+ div = 4;
+ break;
+ case 6:
+ case 7:
+ div = 6;
+ break;
+ case 8:
+ case 9:
+ case 10:
+ case 11:
+ div = 8;
+ break;
+ default:
+ div = 12;
+ break;
+ }
+ clk_rst_ctl.s.h_div = div;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+ /* Read it back, */
+ clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
+ clk_rst_ctl.s.h_clkdiv_en = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+ /* 3d */
+ clk_rst_ctl.s.h_clkdiv_rst = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 3e: delay 64 io clocks */
+ ndelay(io_clk_64_to_ns);
+
+ /*
+ * Step 4: Program the power-on reset field in the UCTL
+ * clock-reset-control register.
+ */
+ clk_rst_ctl.s.p_por = 0;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* Step 5: Wait 1 ms for the PHY clock to start. */
+ mdelay(1);
+
+ /*
+ * Step 6: Program the reset input from automatic test
+ * equipment field in the UPHY CSR
+ */
+ uphy_ctl_status.u64 = cvmx_read_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0));
+ uphy_ctl_status.s.ate_reset = 1;
+ cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64);
+
+ /* Step 7: Wait for at least 10ns. */
+ ndelay(10);
+
+ /* Step 8: Clear the ATE_RESET field in the UPHY CSR. */
+ uphy_ctl_status.s.ate_reset = 0;
+ cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64);
+
+ /*
+ * Step 9: Wait for at least 20ns for UPHY to output PHY clock
+ * signals and OHCI_CLK48
+ */
+ ndelay(20);
+
+ /* Step 10: Configure the OHCI_CLK48 and OHCI_CLK12 clocks. */
+ /* 10a */
+ clk_rst_ctl.s.o_clkdiv_rst = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 10b */
+ clk_rst_ctl.s.o_clkdiv_en = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* 10c */
+ ndelay(io_clk_64_to_ns);
+
+ /*
+ * Step 11: Program the PHY reset field:
+ * UCTL0_CLK_RST_CTL[P_PRST] = 1
+ */
+ clk_rst_ctl.s.p_prst = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+ /* Step 12: Wait 1 uS. */
+ udelay(1);
+
+ /* Step 13: Program the HRESET_N field: UCTL0_CLK_RST_CTL[HRST] = 1 */
+ clk_rst_ctl.s.hrst = 1;
+ cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
+
+end_clock:
+ /* Now we can set some other registers. */
+
+ for (i = 0; i <= 1; i++) {
+ port_ctl_status.u64 =
+ cvmx_read_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0));
+ /* Set txvreftune to 15 to obtain compliant 'eye' diagram. */
+ port_ctl_status.s.txvreftune = 15;
+ port_ctl_status.s.txrisetune = 1;
+ port_ctl_status.s.txpreemphasistune = 1;
+ cvmx_write_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0),
+ port_ctl_status.u64);
+ }
+
+ /* Set uSOF cycle period to 60,000 bits. */
+ cvmx_write_csr(CVMX_UCTLX_EHCI_FLA(0), 0x20ull);
+exit:
+ mutex_unlock(&octeon2_usb_clocks_mutex);
+}
+
+static void octeon2_usb_clocks_stop(void)
+{
+ mutex_lock(&octeon2_usb_clocks_mutex);
+ octeon2_usb_clock_start_cnt--;
+ mutex_unlock(&octeon2_usb_clocks_mutex);
+}
+
+static int octeon_ehci_power_on(struct platform_device *pdev)
+{
+ octeon2_usb_clocks_start();
+ return 0;
+}
+
+static void octeon_ehci_power_off(struct platform_device *pdev)
+{
+ octeon2_usb_clocks_stop();
+}
+
+static struct usb_ehci_pdata octeon_ehci_pdata = {
+ /* Octeon EHCI matches CPU endianness. */
+#ifdef __BIG_ENDIAN
+ .big_endian_mmio = 1,
+#endif
+ .power_on = octeon_ehci_power_on,
+ .power_off = octeon_ehci_power_off,
+};
+
+static void __init octeon_ehci_hw_start(void)
+{
+ union cvmx_uctlx_ehci_ctl ehci_ctl;
+
+ octeon2_usb_clocks_start();
+
+ ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
+ /* Use 64-bit addressing. */
+ ehci_ctl.s.ehci_64b_addr_en = 1;
+ ehci_ctl.s.l2c_addr_msb = 0;
+ ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
+ ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
+ cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
+
+ octeon2_usb_clocks_stop();
+}
+
+static u64 octeon_ehci_dma_mask = DMA_BIT_MASK(64);
+
static int __init octeon_ehci_device_init(void)
{
struct platform_device *pd;
@@ -88,7 +316,7 @@ static int __init octeon_ehci_device_init(void)
if (octeon_is_simulation() || usb_disabled())
return 0; /* No USB in the simulator. */
- pd = platform_device_alloc("octeon-ehci", 0);
+ pd = platform_device_alloc("ehci-platform", 0);
if (!pd) {
ret = -ENOMEM;
goto out;
@@ -105,6 +333,10 @@ static int __init octeon_ehci_device_init(void)
if (ret)
goto fail;
+ pd->dev.dma_mask = &octeon_ehci_dma_mask;
+ pd->dev.platform_data = &octeon_ehci_pdata;
+ octeon_ehci_hw_start();
+
ret = platform_device_add(pd);
if (ret)
goto fail;
@@ -117,6 +349,41 @@ out:
}
device_initcall(octeon_ehci_device_init);
+static int octeon_ohci_power_on(struct platform_device *pdev)
+{
+ octeon2_usb_clocks_start();
+ return 0;
+}
+
+static void octeon_ohci_power_off(struct platform_device *pdev)
+{
+ octeon2_usb_clocks_stop();
+}
+
+static struct usb_ohci_pdata octeon_ohci_pdata = {
+ /* Octeon OHCI matches CPU endianness. */
+#ifdef __BIG_ENDIAN
+ .big_endian_mmio = 1,
+#endif
+ .power_on = octeon_ohci_power_on,
+ .power_off = octeon_ohci_power_off,
+};
+
+static void __init octeon_ohci_hw_start(void)
+{
+ union cvmx_uctlx_ohci_ctl ohci_ctl;
+
+ octeon2_usb_clocks_start();
+
+ ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0));
+ ohci_ctl.s.l2c_addr_msb = 0;
+ ohci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
+ ohci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
+ cvmx_write_csr(CVMX_UCTLX_OHCI_CTL(0), ohci_ctl.u64);
+
+ octeon2_usb_clocks_stop();
+}
+
static int __init octeon_ohci_device_init(void)
{
struct platform_device *pd;
@@ -137,7 +404,7 @@ static int __init octeon_ohci_device_init(void)
if (octeon_is_simulation() || usb_disabled())
return 0; /* No USB in the simulator. */
- pd = platform_device_alloc("octeon-ohci", 0);
+ pd = platform_device_alloc("ohci-platform", 0);
if (!pd) {
ret = -ENOMEM;
goto out;
@@ -154,6 +421,9 @@ static int __init octeon_ohci_device_init(void)
if (ret)
goto fail;
+ pd->dev.platform_data = &octeon_ohci_pdata;
+ octeon_ohci_hw_start();
+
ret = platform_device_add(pd);
if (ret)
goto fail;
diff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig
index b2476a1..e57058d 100644
--- a/arch/mips/configs/cavium_octeon_defconfig
+++ b/arch/mips/configs/cavium_octeon_defconfig
@@ -120,6 +120,9 @@ CONFIG_SPI_OCTEON=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_USB_SUPPORT is not set
+CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1307=y
CONFIG_STAGING=y
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index a3ca137..fafc628 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -292,11 +292,15 @@ config USB_EHCI_HCD_PLATFORM
If unsure, say N.
config USB_OCTEON_EHCI
- bool "Octeon on-chip EHCI support"
+ bool "Octeon on-chip EHCI support (DEPRECATED)"
depends on CAVIUM_OCTEON_SOC
default n
select USB_EHCI_BIG_ENDIAN_MMIO
+ select USB_EHCI_HCD_PLATFORM
help
+ This option is deprecated now and the driver was removed, use
+ USB_EHCI_HCD_PLATFORM instead.
+
Enable support for the Octeon II SOC's on-chip EHCI
controller. It is needed for high-speed (480Mbit/sec)
USB 2.0 device support. All CN6XXX based chips with USB are
@@ -575,12 +579,16 @@ config USB_OHCI_HCD_PLATFORM
If unsure, say N.
config USB_OCTEON_OHCI
- bool "Octeon on-chip OHCI support"
+ bool "Octeon on-chip OHCI support (DEPRECATED)"
depends on CAVIUM_OCTEON_SOC
default USB_OCTEON_EHCI
select USB_OHCI_BIG_ENDIAN_MMIO
select USB_OHCI_LITTLE_ENDIAN
+ select USB_OHCI_HCD_PLATFORM
help
+ This option is deprecated now and the driver was removed, use
+ USB_OHCI_HCD_PLATFORM instead.
+
Enable support for the Octeon II SOC's on-chip OHCI
controller. It is needed for low-speed USB 1.0 device
support. All CN6XXX based chips with USB are supported.
@@ -754,12 +762,6 @@ config USB_IMX21_HCD
To compile this driver as a module, choose M here: the
module will be called "imx21-hcd".
-
-
-config USB_OCTEON2_COMMON
- bool
- default y if USB_OCTEON_EHCI || USB_OCTEON_OHCI
-
config USB_HCD_BCMA
tristate "BCMA usb host driver"
depends on BCMA
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 348c243..d6216a4 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -73,7 +73,6 @@ obj-$(CONFIG_USB_ISP1760_HCD) += isp1760.o
obj-$(CONFIG_USB_HWA_HCD) += hwa-hc.o
obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd.o
obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-mph-dr-of.o
-obj-$(CONFIG_USB_OCTEON2_COMMON) += octeon2-common.o
obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o
obj-$(CONFIG_USB_HCD_SSB) += ssb-hcd.o
obj-$(CONFIG_USB_FUSBH200_HCD) += fusbh200-hcd.o
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index df75b8e..38bfeed 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1275,11 +1275,6 @@ MODULE_LICENSE ("GPL");
#define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
#endif
-#ifdef CONFIG_USB_OCTEON_EHCI
-#include "ehci-octeon.c"
-#define PLATFORM_DRIVER ehci_octeon_driver
-#endif
-
#ifdef CONFIG_TILE_USB
#include "ehci-tilegx.c"
#define PLATFORM_DRIVER ehci_hcd_tilegx_driver
diff --git a/drivers/usb/host/ehci-octeon.c b/drivers/usb/host/ehci-octeon.c
deleted file mode 100644
index 2d0c4bc..0000000
--- a/drivers/usb/host/ehci-octeon.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
- * EHCI HCD glue for Cavium Octeon II SOCs.
- *
- * Loosely based on ehci-au1xxx.c
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2010 Cavium Networks
- *
- */
-
-#include <linux/platform_device.h>
-
-#include <asm/octeon/octeon.h>
-#include <asm/octeon/cvmx-uctlx-defs.h>
-
-#define OCTEON_EHCI_HCD_NAME "octeon-ehci"
-
-/* Common clock init code. */
-void octeon2_usb_clocks_start(void);
-void octeon2_usb_clocks_stop(void);
-
-static void ehci_octeon_start(void)
-{
- union cvmx_uctlx_ehci_ctl ehci_ctl;
-
- octeon2_usb_clocks_start();
-
- ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
- /* Use 64-bit addressing. */
- ehci_ctl.s.ehci_64b_addr_en = 1;
- ehci_ctl.s.l2c_addr_msb = 0;
- ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
- ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
- cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
-}
-
-static void ehci_octeon_stop(void)
-{
- octeon2_usb_clocks_stop();
-}
-
-static const struct hc_driver ehci_octeon_hc_driver = {
- .description = hcd_name,
- .product_desc = "Octeon EHCI",
- .hcd_priv_size = sizeof(struct ehci_hcd),
-
- /*
- * generic hardware linkage
- */
- .irq = ehci_irq,
- .flags = HCD_MEMORY | HCD_USB2 | HCD_BH,
-
- /*
- * basic lifecycle operations
- */
- .reset = ehci_setup,
- .start = ehci_run,
- .stop = ehci_stop,
- .shutdown = ehci_shutdown,
-
- /*
- * managing i/o requests and associated device resources
- */
- .urb_enqueue = ehci_urb_enqueue,
- .urb_dequeue = ehci_urb_dequeue,
- .endpoint_disable = ehci_endpoint_disable,
- .endpoint_reset = ehci_endpoint_reset,
-
- /*
- * scheduling support
- */
- .get_frame_number = ehci_get_frame,
-
- /*
- * root hub support
- */
- .hub_status_data = ehci_hub_status_data,
- .hub_control = ehci_hub_control,
- .bus_suspend = ehci_bus_suspend,
- .bus_resume = ehci_bus_resume,
- .relinquish_port = ehci_relinquish_port,
- .port_handed_over = ehci_port_handed_over,
-
- .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
-};
-
-static u64 ehci_octeon_dma_mask = DMA_BIT_MASK(64);
-
-static int ehci_octeon_drv_probe(struct platform_device *pdev)
-{
- struct usb_hcd *hcd;
- struct ehci_hcd *ehci;
- struct resource *res_mem;
- int irq;
- int ret;
-
- if (usb_disabled())
- return -ENODEV;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- dev_err(&pdev->dev, "No irq assigned\n");
- return -ENODEV;
- }
-
- /*
- * We can DMA from anywhere. But the descriptors must be in
- * the lower 4GB.
- */
- pdev->dev.dma_mask = &ehci_octeon_dma_mask;
- ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
- if (ret)
- return ret;
-
- hcd = usb_create_hcd(&ehci_octeon_hc_driver, &pdev->dev, "octeon");
- if (!hcd)
- return -ENOMEM;
-
- res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- hcd->regs = devm_ioremap_resource(&pdev->dev, res_mem);
- if (IS_ERR(hcd->regs)) {
- ret = PTR_ERR(hcd->regs);
- goto err1;
- }
- hcd->rsrc_start = res_mem->start;
- hcd->rsrc_len = resource_size(res_mem);
-
- ehci_octeon_start();
-
- ehci = hcd_to_ehci(hcd);
-
- /* Octeon EHCI matches CPU endianness. */
-#ifdef __BIG_ENDIAN
- ehci->big_endian_mmio = 1;
-#endif
-
- ehci->caps = hcd->regs;
-
- ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
- if (ret) {
- dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret);
- goto err2;
- }
- device_wakeup_enable(hcd->self.controller);
-
- platform_set_drvdata(pdev, hcd);
-
- return 0;
-err2:
- ehci_octeon_stop();
-
-err1:
- usb_put_hcd(hcd);
- return ret;
-}
-
-static int ehci_octeon_drv_remove(struct platform_device *pdev)
-{
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
-
- usb_remove_hcd(hcd);
-
- ehci_octeon_stop();
- usb_put_hcd(hcd);
-
- return 0;
-}
-
-static struct platform_driver ehci_octeon_driver = {
- .probe = ehci_octeon_drv_probe,
- .remove = ehci_octeon_drv_remove,
- .shutdown = usb_hcd_platform_shutdown,
- .driver = {
- .name = OCTEON_EHCI_HCD_NAME,
- .owner = THIS_MODULE,
- }
-};
-
-MODULE_ALIAS("platform:" OCTEON_EHCI_HCD_NAME);
diff --git a/drivers/usb/host/octeon2-common.c b/drivers/usb/host/octeon2-common.c
deleted file mode 100644
index d9df423..0000000
--- a/drivers/usb/host/octeon2-common.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2010, 2011 Cavium Networks
- */
-
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/delay.h>
-
-#include <asm/octeon/octeon.h>
-#include <asm/octeon/cvmx-uctlx-defs.h>
-
-static DEFINE_MUTEX(octeon2_usb_clocks_mutex);
-
-static int octeon2_usb_clock_start_cnt;
-
-void octeon2_usb_clocks_start(void)
-{
- u64 div;
- union cvmx_uctlx_if_ena if_ena;
- union cvmx_uctlx_clk_rst_ctl clk_rst_ctl;
- union cvmx_uctlx_uphy_ctl_status uphy_ctl_status;
- union cvmx_uctlx_uphy_portx_ctl_status port_ctl_status;
- int i;
- unsigned long io_clk_64_to_ns;
-
-
- mutex_lock(&octeon2_usb_clocks_mutex);
-
- octeon2_usb_clock_start_cnt++;
- if (octeon2_usb_clock_start_cnt != 1)
- goto exit;
-
- io_clk_64_to_ns = 64000000000ull / octeon_get_io_clock_rate();
-
- /*
- * Step 1: Wait for voltages stable. That surely happened
- * before starting the kernel.
- *
- * Step 2: Enable SCLK of UCTL by writing UCTL0_IF_ENA[EN] = 1
- */
- if_ena.u64 = 0;
- if_ena.s.en = 1;
- cvmx_write_csr(CVMX_UCTLX_IF_ENA(0), if_ena.u64);
-
- /* Step 3: Configure the reference clock, PHY, and HCLK */
- clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
-
- /*
- * If the UCTL looks like it has already been started, skip
- * the initialization, otherwise bus errors are obtained.
- */
- if (clk_rst_ctl.s.hrst)
- goto end_clock;
- /* 3a */
- clk_rst_ctl.s.p_por = 1;
- clk_rst_ctl.s.hrst = 0;
- clk_rst_ctl.s.p_prst = 0;
- clk_rst_ctl.s.h_clkdiv_rst = 0;
- clk_rst_ctl.s.o_clkdiv_rst = 0;
- clk_rst_ctl.s.h_clkdiv_en = 0;
- clk_rst_ctl.s.o_clkdiv_en = 0;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 3b */
- /* 12MHz crystal. */
- clk_rst_ctl.s.p_refclk_sel = 0;
- clk_rst_ctl.s.p_refclk_div = 0;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 3c */
- div = octeon_get_io_clock_rate() / 130000000ull;
-
- switch (div) {
- case 0:
- div = 1;
- break;
- case 1:
- case 2:
- case 3:
- case 4:
- break;
- case 5:
- div = 4;
- break;
- case 6:
- case 7:
- div = 6;
- break;
- case 8:
- case 9:
- case 10:
- case 11:
- div = 8;
- break;
- default:
- div = 12;
- break;
- }
- clk_rst_ctl.s.h_div = div;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
- /* Read it back, */
- clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
- clk_rst_ctl.s.h_clkdiv_en = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
- /* 3d */
- clk_rst_ctl.s.h_clkdiv_rst = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 3e: delay 64 io clocks */
- ndelay(io_clk_64_to_ns);
-
- /*
- * Step 4: Program the power-on reset field in the UCTL
- * clock-reset-control register.
- */
- clk_rst_ctl.s.p_por = 0;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* Step 5: Wait 1 ms for the PHY clock to start. */
- mdelay(1);
-
- /*
- * Step 6: Program the reset input from automatic test
- * equipment field in the UPHY CSR
- */
- uphy_ctl_status.u64 = cvmx_read_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0));
- uphy_ctl_status.s.ate_reset = 1;
- cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64);
-
- /* Step 7: Wait for at least 10ns. */
- ndelay(10);
-
- /* Step 8: Clear the ATE_RESET field in the UPHY CSR. */
- uphy_ctl_status.s.ate_reset = 0;
- cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64);
-
- /*
- * Step 9: Wait for at least 20ns for UPHY to output PHY clock
- * signals and OHCI_CLK48
- */
- ndelay(20);
-
- /* Step 10: Configure the OHCI_CLK48 and OHCI_CLK12 clocks. */
- /* 10a */
- clk_rst_ctl.s.o_clkdiv_rst = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 10b */
- clk_rst_ctl.s.o_clkdiv_en = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* 10c */
- ndelay(io_clk_64_to_ns);
-
- /*
- * Step 11: Program the PHY reset field:
- * UCTL0_CLK_RST_CTL[P_PRST] = 1
- */
- clk_rst_ctl.s.p_prst = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
- /* Step 12: Wait 1 uS. */
- udelay(1);
-
- /* Step 13: Program the HRESET_N field: UCTL0_CLK_RST_CTL[HRST] = 1 */
- clk_rst_ctl.s.hrst = 1;
- cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
-
-end_clock:
- /* Now we can set some other registers. */
-
- for (i = 0; i <= 1; i++) {
- port_ctl_status.u64 =
- cvmx_read_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0));
- /* Set txvreftune to 15 to obtain compliant 'eye' diagram. */
- port_ctl_status.s.txvreftune = 15;
- port_ctl_status.s.txrisetune = 1;
- port_ctl_status.s.txpreemphasistune = 1;
- cvmx_write_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0),
- port_ctl_status.u64);
- }
-
- /* Set uSOF cycle period to 60,000 bits. */
- cvmx_write_csr(CVMX_UCTLX_EHCI_FLA(0), 0x20ull);
-exit:
- mutex_unlock(&octeon2_usb_clocks_mutex);
-}
-EXPORT_SYMBOL(octeon2_usb_clocks_start);
-
-void octeon2_usb_clocks_stop(void)
-{
- mutex_lock(&octeon2_usb_clocks_mutex);
- octeon2_usb_clock_start_cnt--;
- mutex_unlock(&octeon2_usb_clocks_mutex);
-}
-EXPORT_SYMBOL(octeon2_usb_clocks_stop);
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index d664eda..1dab9df 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1249,11 +1249,6 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ohci_hcd_jz4740_driver
#endif
-#ifdef CONFIG_USB_OCTEON_OHCI
-#include "ohci-octeon.c"
-#define PLATFORM_DRIVER ohci_octeon_driver
-#endif
-
#ifdef CONFIG_TILE_USB
#include "ohci-tilegx.c"
#define PLATFORM_DRIVER ohci_hcd_tilegx_driver
diff --git a/drivers/usb/host/ohci-octeon.c b/drivers/usb/host/ohci-octeon.c
deleted file mode 100644
index 20d861b..0000000
--- a/drivers/usb/host/ohci-octeon.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * EHCI HCD glue for Cavium Octeon II SOCs.
- *
- * Loosely based on ehci-au1xxx.c
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2010 Cavium Networks
- *
- */
-
-#include <linux/platform_device.h>
-
-#include <asm/octeon/octeon.h>
-#include <asm/octeon/cvmx-uctlx-defs.h>
-
-#define OCTEON_OHCI_HCD_NAME "octeon-ohci"
-
-/* Common clock init code. */
-void octeon2_usb_clocks_start(void);
-void octeon2_usb_clocks_stop(void);
-
-static void ohci_octeon_hw_start(void)
-{
- union cvmx_uctlx_ohci_ctl ohci_ctl;
-
- octeon2_usb_clocks_start();
-
- ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0));
- ohci_ctl.s.l2c_addr_msb = 0;
- ohci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
- ohci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
- cvmx_write_csr(CVMX_UCTLX_OHCI_CTL(0), ohci_ctl.u64);
-
-}
-
-static void ohci_octeon_hw_stop(void)
-{
- /* Undo ohci_octeon_start() */
- octeon2_usb_clocks_stop();
-}
-
-static int ohci_octeon_start(struct usb_hcd *hcd)
-{
- struct ohci_hcd *ohci = hcd_to_ohci(hcd);
- int ret;
-
- ret = ohci_init(ohci);
-
- if (ret < 0)
- return ret;
-
- ret = ohci_run(ohci);
-
- if (ret < 0) {
- ohci_err(ohci, "can't start %s", hcd->self.bus_name);
- ohci_stop(hcd);
- return ret;
- }
-
- return 0;
-}
-
-static const struct hc_driver ohci_octeon_hc_driver = {
- .description = hcd_name,
- .product_desc = "Octeon OHCI",
- .hcd_priv_size = sizeof(struct ohci_hcd),
-
- /*
- * generic hardware linkage
- */
- .irq = ohci_irq,
- .flags = HCD_USB11 | HCD_MEMORY,
-
- /*
- * basic lifecycle operations
- */
- .start = ohci_octeon_start,
- .stop = ohci_stop,
- .shutdown = ohci_shutdown,
-
- /*
- * managing i/o requests and associated device resources
- */
- .urb_enqueue = ohci_urb_enqueue,
- .urb_dequeue = ohci_urb_dequeue,
- .endpoint_disable = ohci_endpoint_disable,
-
- /*
- * scheduling support
- */
- .get_frame_number = ohci_get_frame,
-
- /*
- * root hub support
- */
- .hub_status_data = ohci_hub_status_data,
- .hub_control = ohci_hub_control,
-
- .start_port_reset = ohci_start_port_reset,
-};
-
-static int ohci_octeon_drv_probe(struct platform_device *pdev)
-{
- struct usb_hcd *hcd;
- struct ohci_hcd *ohci;
- void *reg_base;
- struct resource *res_mem;
- int irq;
- int ret;
-
- if (usb_disabled())
- return -ENODEV;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- dev_err(&pdev->dev, "No irq assigned\n");
- return -ENODEV;
- }
-
- /* Ohci is a 32-bit device. */
- ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
- if (ret)
- return ret;
-
- hcd = usb_create_hcd(&ohci_octeon_hc_driver, &pdev->dev, "octeon");
- if (!hcd)
- return -ENOMEM;
-
- res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- reg_base = devm_ioremap_resource(&pdev->dev, res_mem);
- if (IS_ERR(reg_base)) {
- ret = PTR_ERR(reg_base);
- goto err1;
- }
- hcd->rsrc_start = res_mem->start;
- hcd->rsrc_len = resource_size(res_mem);
-
- ohci_octeon_hw_start();
-
- hcd->regs = reg_base;
-
- ohci = hcd_to_ohci(hcd);
-
- /* Octeon OHCI matches CPU endianness. */
-#ifdef __BIG_ENDIAN
- ohci->flags |= OHCI_QUIRK_BE_MMIO;
-#endif
-
- ohci_hcd_init(ohci);
-
- ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
- if (ret) {
- dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret);
- goto err2;
- }
-
- device_wakeup_enable(hcd->self.controller);
-
- platform_set_drvdata(pdev, hcd);
-
- return 0;
-
-err2:
- ohci_octeon_hw_stop();
-
-err1:
- usb_put_hcd(hcd);
- return ret;
-}
-
-static int ohci_octeon_drv_remove(struct platform_device *pdev)
-{
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
-
- usb_remove_hcd(hcd);
-
- ohci_octeon_hw_stop();
- usb_put_hcd(hcd);
-
- return 0;
-}
-
-static struct platform_driver ohci_octeon_driver = {
- .probe = ohci_octeon_drv_probe,
- .remove = ohci_octeon_drv_remove,
- .shutdown = usb_hcd_platform_shutdown,
- .driver = {
- .name = OCTEON_OHCI_HCD_NAME,
- .owner = THIS_MODULE,
- }
-};
-
-MODULE_ALIAS("platform:" OCTEON_OHCI_HCD_NAME);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 1/3 v2] USB: host: Remove ehci-octeon and ohci-octeon drivers
2014-11-25 11:28 ` [PATCH 1/3 v2] " Andreas Herrmann
@ 2014-11-25 17:19 ` Greg KH
0 siblings, 0 replies; 18+ messages in thread
From: Greg KH @ 2014-11-25 17:19 UTC (permalink / raw)
To: Andreas Herrmann
Cc: Alan Stern, David Daney, Alex Smith, Linux-MIPS, linux-usb
On Tue, Nov 25, 2014 at 12:28:46PM +0100, Andreas Herrmann wrote:
> From: Alan Stern <stern@rowland.harvard.edu>
>
> Remove special-purpose octeon drivers and instead use ehci-platform
> and ohci-platform as suggested with
> http://marc.info/?l=linux-mips&m=140139694721623&w=2
>
> [andreas.herrmann:
> fixed compile error]
>
> Cc: David Daney <david.daney@cavium.com>
> Cc: Alex Smith <alex.smith@imgtec.com>
> Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> Acked-by: Ralf Baechle <ralf@linux-mips.org>
> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
> ---
> arch/mips/cavium-octeon/octeon-platform.c | 274 ++++++++++++++++++++++++++++-
> arch/mips/configs/cavium_octeon_defconfig | 3 +
> drivers/usb/host/Kconfig | 18 +-
> drivers/usb/host/Makefile | 1 -
> drivers/usb/host/ehci-hcd.c | 5 -
> drivers/usb/host/ehci-octeon.c | 182 -------------------
> drivers/usb/host/octeon2-common.c | 200 ---------------------
> drivers/usb/host/ohci-hcd.c | 5 -
> drivers/usb/host/ohci-octeon.c | 196 ---------------------
> 9 files changed, 285 insertions(+), 599 deletions(-)
> delete mode 100644 drivers/usb/host/ehci-octeon.c
> delete mode 100644 drivers/usb/host/octeon2-common.c
> delete mode 100644 drivers/usb/host/ohci-octeon.c
>
>
> There was a conflict with commits
> 073153bf22764 (host: ehci-octeon: remove duplicate check on resource)
> c6d413cebd82c (host: ohci-octeon: remove duplicate check on resource)
>
> I rebased the patch to your usb-next branch as of
> v3.18-rc4-66-g69b7290.
>
> Patch 2 and 3 of the series should apply w/o issues.
They are long-gone from my queue, please resend.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2014-11-25 17:20 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-11-13 21:36 [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Andreas Herrmann
2014-11-13 21:36 ` [PATCH 1/3] USB: host: Remove ehci-octeon and ohci-octeon drivers Andreas Herrmann
2014-11-14 9:31 ` Ralf Baechle
2014-11-14 9:58 ` Andreas Herrmann
2014-11-25 1:21 ` Greg KH
2014-11-25 10:23 ` Andreas Herrmann
2014-11-25 11:28 ` [PATCH 1/3 v2] " Andreas Herrmann
2014-11-25 17:19 ` Greg KH
2014-11-13 21:36 ` [PATCH 2/3] USB: host: Remove hard-coded octeon platform information for ehci/ohci Andreas Herrmann
2014-11-14 9:33 ` Ralf Baechle
2014-11-13 21:36 ` [PATCH 3/3] USB: host: Introduce flag to enable use of 64-bit dma_mask for ehci-platform Andreas Herrmann
2014-11-14 4:44 ` Florian Fainelli
2014-11-14 8:51 ` Andreas Herrmann
2014-11-14 15:23 ` Alan Stern
2014-11-14 17:34 ` Florian Fainelli
2014-11-13 22:13 ` [PATCH 0/3] USB: host: Misc patches to remove hard-coded octeon platform information Alan Stern
2014-11-14 11:47 ` Andreas Herrmann
2014-11-14 20:32 ` Aaro Koskinen
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