From: Greg KH <gregkh@linuxfoundation.org>
To: Stefan Agner <stefan@agner.ch>
Cc: jslaby@suse.cz, jingchang.lu@freescale.com, shawn.guo@linaro.org,
linux-serial@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] serial: fsl_lpuart: avoid new transfer while DMA is running
Date: Fri, 9 Jan 2015 16:49:10 -0800 [thread overview]
Message-ID: <20150110004910.GC4171@kroah.com> (raw)
In-Reply-To: <1420848539-4519-3-git-send-email-stefan@agner.ch>
On Sat, Jan 10, 2015 at 01:08:59AM +0100, Stefan Agner wrote:
> When the UART is in DMA receive mode (RDMAS set) and one character
> just arrived while another interrupt is handled (e.g. TX), the RDRF
> (receiver data register full flag) is set due to the water level of
> 1. But since the DMA will take care of this character, there is no
> need to handle it by calling lpuart_prepare_rx. Handling it leads to
> adding the RX timeout timer twice:
>
> [ 74.336698] Kernel BUG at 80053070 [verbose debug info unavailable]
> [ 74.342999] Internal error: Oops - BUG: 0 [#1] ARM0:00.00 khungtaskd
> [ 74.347817] Modules linked in: 0 S 0.0 0.0 0:00.00 writeback
> [ 74.350926] CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00001-g39d78e2 #1788
> [ 74.358617] Hardware name: Freescale Vybrid VF610 (Device Tree)t
> [ 74.364563] task: 807a7678 ti: 8079c000 task.ti: 8079c000 kblockd
> [ 74.370002] PC is at add_timer+0x24/0x28.0 0.0 0:00.09 kworker/u2:1
> [ 74.373960] LR is at lpuart_int+0x15c/0x3d8
> [ 74.378171] pc : [<80053070>] lr : [<802e0d88>] psr: a0010193
> [ 74.378171] sp : 8079de10 ip : 8079de20 fp : 8079de1c
> [ 74.389694] r10: 807d44c0 r9 : 8688c300 r8 : 00000013
> [ 74.394943] r7 : 20010193 r6 : 00000000 r5 : 000000a0 r4 : 86997210
> [ 74.401498] r3 : ffffa7da r2 : 80817868 r1 : 86997210 r0 : 86997344
> [ 74.408052] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
> [ 74.415489] Control: 10c5387d Table: 8611c059 DAC: 00000015
> [ 74.421265] Process swapper (pid: 0, stack limit = 0x8079c230)
> ...
>
> Solve this by only execute the receiver path (lpuart_prepare_rx) if
> the DMA receive mode (RDMAS) is not set. Also, make sure the flag is
> cleared on initialization, in case it has been left set.
>
> This can be best reproduced using UART as a serial console, then
> running top while dd'ing data into the terminal.
>
> Signed-off-by: Stefan Agner <stefan@agner.ch>
> ---
> drivers/tty/serial/fsl_lpuart.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
Same stable question as before.
WARNING: multiple messages have this Message-ID (diff)
From: gregkh@linuxfoundation.org (Greg KH)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/2] serial: fsl_lpuart: avoid new transfer while DMA is running
Date: Fri, 9 Jan 2015 16:49:10 -0800 [thread overview]
Message-ID: <20150110004910.GC4171@kroah.com> (raw)
In-Reply-To: <1420848539-4519-3-git-send-email-stefan@agner.ch>
On Sat, Jan 10, 2015 at 01:08:59AM +0100, Stefan Agner wrote:
> When the UART is in DMA receive mode (RDMAS set) and one character
> just arrived while another interrupt is handled (e.g. TX), the RDRF
> (receiver data register full flag) is set due to the water level of
> 1. But since the DMA will take care of this character, there is no
> need to handle it by calling lpuart_prepare_rx. Handling it leads to
> adding the RX timeout timer twice:
>
> [ 74.336698] Kernel BUG at 80053070 [verbose debug info unavailable]
> [ 74.342999] Internal error: Oops - BUG: 0 [#1] ARM0:00.00 khungtaskd
> [ 74.347817] Modules linked in: 0 S 0.0 0.0 0:00.00 writeback
> [ 74.350926] CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00001-g39d78e2 #1788
> [ 74.358617] Hardware name: Freescale Vybrid VF610 (Device Tree)t
> [ 74.364563] task: 807a7678 ti: 8079c000 task.ti: 8079c000 kblockd
> [ 74.370002] PC is at add_timer+0x24/0x28.0 0.0 0:00.09 kworker/u2:1
> [ 74.373960] LR is at lpuart_int+0x15c/0x3d8
> [ 74.378171] pc : [<80053070>] lr : [<802e0d88>] psr: a0010193
> [ 74.378171] sp : 8079de10 ip : 8079de20 fp : 8079de1c
> [ 74.389694] r10: 807d44c0 r9 : 8688c300 r8 : 00000013
> [ 74.394943] r7 : 20010193 r6 : 00000000 r5 : 000000a0 r4 : 86997210
> [ 74.401498] r3 : ffffa7da r2 : 80817868 r1 : 86997210 r0 : 86997344
> [ 74.408052] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
> [ 74.415489] Control: 10c5387d Table: 8611c059 DAC: 00000015
> [ 74.421265] Process swapper (pid: 0, stack limit = 0x8079c230)
> ...
>
> Solve this by only execute the receiver path (lpuart_prepare_rx) if
> the DMA receive mode (RDMAS) is not set. Also, make sure the flag is
> cleared on initialization, in case it has been left set.
>
> This can be best reproduced using UART as a serial console, then
> running top while dd'ing data into the terminal.
>
> Signed-off-by: Stefan Agner <stefan@agner.ch>
> ---
> drivers/tty/serial/fsl_lpuart.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
Same stable question as before.
next prev parent reply other threads:[~2015-01-10 0:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-10 0:08 [PATCH v2 0/2] serial: fsl_lpuart: fix DMA issues for 3.19 Stefan Agner
2015-01-10 0:08 ` Stefan Agner
2015-01-10 0:08 ` [PATCH v2 1/2] serial: fsl_lpuart: delete timer on shutdown Stefan Agner
2015-01-10 0:08 ` Stefan Agner
2015-01-10 0:48 ` Greg KH
2015-01-10 0:48 ` Greg KH
2015-01-10 8:09 ` Stefan Agner
2015-01-10 8:09 ` Stefan Agner
2015-01-10 0:08 ` [PATCH v2 2/2] serial: fsl_lpuart: avoid new transfer while DMA is running Stefan Agner
2015-01-10 0:08 ` Stefan Agner
2015-01-10 0:49 ` Greg KH [this message]
2015-01-10 0:49 ` Greg KH
2015-01-10 8:12 ` Stefan Agner
2015-01-10 8:12 ` Stefan Agner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150110004910.GC4171@kroah.com \
--to=gregkh@linuxfoundation.org \
--cc=jingchang.lu@freescale.com \
--cc=jslaby@suse.cz \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=shawn.guo@linaro.org \
--cc=stefan@agner.ch \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.