From: boris.brezillon@free-electrons.com (Boris Brezillon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 4/5] ARM: at91/dt: add AIC irq1 muxed peripheral id definitions
Date: Wed, 14 Jan 2015 14:34:48 +0100 [thread overview]
Message-ID: <20150114143448.09d362b8@bbrezillon> (raw)
In-Reply-To: <54B66D6B.9050205@atmel.com>
On Wed, 14 Jan 2015 14:21:47 +0100
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
> Le 13/01/2015 19:46, Boris Brezillon a ?crit :
> > These ids will be used to define irqs multiplexed on the first irq line.
> >
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > ---
> > .../dt-bindings/interrupt-controller/atmel-aic.h | 22 ++++++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> > create mode 100644 include/dt-bindings/interrupt-controller/atmel-aic.h
> >
> > diff --git a/include/dt-bindings/interrupt-controller/atmel-aic.h b/include/dt-bindings/interrupt-controller/atmel-aic.h
> > new file mode 100644
> > index 0000000..e14a94f
> > --- /dev/null
> > +++ b/include/dt-bindings/interrupt-controller/atmel-aic.h
> > @@ -0,0 +1,22 @@
> > +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
> > +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
>
> Nit.: why ARM_GIC?
Because I copied it from the arm-gic.h header and forgot to rename
those macros :-).
I'll fix that.
>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +#define AIC_IRQ1_PMC 0
> > +#define AIC_IRQ1_ST 1
> > +#define AIC_IRQ1_PIT 1
> > +#define AIC_IRQ1_DBGU 2
> > +#define AIC_IRQ1_RTC 3
> > +#define AIC_IRQ1_RTT 4
> > +#define AIC_IRQ1_WATCHDOG 5
> > +#define AIC_IRQ1_MC 6
> > +#define AIC_IRQ1_SDRAMC 6
> > +#define AIC_IRQ1_DDRSDRC 6
> > +#define AIC_IRQ1_RSTC 7
> > +#define AIC_IRQ1_PMERRLOC 8
> > +#define AIC_IRQ1_PMECC 9
Following up the discussion we had privately regarding these
macros (whether we really need them or not), maybe adding a comment
above the irqs property would be enough:
dumb_irq1_demux: dumb-irq-demux at 1 {
compatible = "irqchip-dumb-demux";
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
/*
* Interrupt lines:
* 0: PMC
* 1: PIT
* 2: DBGU
* 3: RTT
* 4: WATCHDOG
* 5: RSTC
*/
irqs = <0x3f>;
};
Thanks,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
Cc: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
Jean-Christophe Plagniol-Villard
<plagnioj-sclMFOaUSTBWk0Htik3J/w@public.gmane.org>,
Alexandre Belloni
<alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
"Rafael J. Wysocki"
<rafael.j.wysocki-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v2 4/5] ARM: at91/dt: add AIC irq1 muxed peripheral id definitions
Date: Wed, 14 Jan 2015 14:34:48 +0100 [thread overview]
Message-ID: <20150114143448.09d362b8@bbrezillon> (raw)
In-Reply-To: <54B66D6B.9050205-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
On Wed, 14 Jan 2015 14:21:47 +0100
Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org> wrote:
> Le 13/01/2015 19:46, Boris Brezillon a écrit :
> > These ids will be used to define irqs multiplexed on the first irq line.
> >
> > Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> > ---
> > .../dt-bindings/interrupt-controller/atmel-aic.h | 22 ++++++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> > create mode 100644 include/dt-bindings/interrupt-controller/atmel-aic.h
> >
> > diff --git a/include/dt-bindings/interrupt-controller/atmel-aic.h b/include/dt-bindings/interrupt-controller/atmel-aic.h
> > new file mode 100644
> > index 0000000..e14a94f
> > --- /dev/null
> > +++ b/include/dt-bindings/interrupt-controller/atmel-aic.h
> > @@ -0,0 +1,22 @@
> > +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
> > +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
>
> Nit.: why ARM_GIC?
Because I copied it from the arm-gic.h header and forgot to rename
those macros :-).
I'll fix that.
>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +#define AIC_IRQ1_PMC 0
> > +#define AIC_IRQ1_ST 1
> > +#define AIC_IRQ1_PIT 1
> > +#define AIC_IRQ1_DBGU 2
> > +#define AIC_IRQ1_RTC 3
> > +#define AIC_IRQ1_RTT 4
> > +#define AIC_IRQ1_WATCHDOG 5
> > +#define AIC_IRQ1_MC 6
> > +#define AIC_IRQ1_SDRAMC 6
> > +#define AIC_IRQ1_DDRSDRC 6
> > +#define AIC_IRQ1_RSTC 7
> > +#define AIC_IRQ1_PMERRLOC 8
> > +#define AIC_IRQ1_PMECC 9
Following up the discussion we had privately regarding these
macros (whether we really need them or not), maybe adding a comment
above the irqs property would be enough:
dumb_irq1_demux: dumb-irq-demux@1 {
compatible = "irqchip-dumb-demux";
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
/*
* Interrupt lines:
* 0: PMC
* 1: PIT
* 2: DBGU
* 3: RTT
* 4: WATCHDOG
* 5: RSTC
*/
irqs = <0x3f>;
};
Thanks,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
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WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
"Jean-Christophe Plagniol-Villard" <plagnioj@jcrosoft.com>,
Alexandre Belloni <alexandre.belloni@free-electrons.com>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
"Kumar Gala" <galak@codeaurora.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 4/5] ARM: at91/dt: add AIC irq1 muxed peripheral id definitions
Date: Wed, 14 Jan 2015 14:34:48 +0100 [thread overview]
Message-ID: <20150114143448.09d362b8@bbrezillon> (raw)
In-Reply-To: <54B66D6B.9050205@atmel.com>
On Wed, 14 Jan 2015 14:21:47 +0100
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
> Le 13/01/2015 19:46, Boris Brezillon a écrit :
> > These ids will be used to define irqs multiplexed on the first irq line.
> >
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > ---
> > .../dt-bindings/interrupt-controller/atmel-aic.h | 22 ++++++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> > create mode 100644 include/dt-bindings/interrupt-controller/atmel-aic.h
> >
> > diff --git a/include/dt-bindings/interrupt-controller/atmel-aic.h b/include/dt-bindings/interrupt-controller/atmel-aic.h
> > new file mode 100644
> > index 0000000..e14a94f
> > --- /dev/null
> > +++ b/include/dt-bindings/interrupt-controller/atmel-aic.h
> > @@ -0,0 +1,22 @@
> > +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
> > +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
>
> Nit.: why ARM_GIC?
Because I copied it from the arm-gic.h header and forgot to rename
those macros :-).
I'll fix that.
>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +#define AIC_IRQ1_PMC 0
> > +#define AIC_IRQ1_ST 1
> > +#define AIC_IRQ1_PIT 1
> > +#define AIC_IRQ1_DBGU 2
> > +#define AIC_IRQ1_RTC 3
> > +#define AIC_IRQ1_RTT 4
> > +#define AIC_IRQ1_WATCHDOG 5
> > +#define AIC_IRQ1_MC 6
> > +#define AIC_IRQ1_SDRAMC 6
> > +#define AIC_IRQ1_DDRSDRC 6
> > +#define AIC_IRQ1_RSTC 7
> > +#define AIC_IRQ1_PMERRLOC 8
> > +#define AIC_IRQ1_PMECC 9
Following up the discussion we had privately regarding these
macros (whether we really need them or not), maybe adding a comment
above the irqs property would be enough:
dumb_irq1_demux: dumb-irq-demux@1 {
compatible = "irqchip-dumb-demux";
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
/*
* Interrupt lines:
* 0: PMC
* 1: PIT
* 2: DBGU
* 3: RTT
* 4: WATCHDOG
* 5: RSTC
*/
irqs = <0x3f>;
};
Thanks,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2015-01-14 13:34 UTC|newest]
Thread overview: 91+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-13 18:46 [PATCH v2 0/5] ARM: at91: fix irq_pm_install_action WARNING Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-13 18:46 ` [PATCH v2 1/5] irqchip: add dumb demultiplexer implementation Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-13 21:00 ` Thomas Gleixner
2015-01-13 21:00 ` Thomas Gleixner
2015-01-14 8:31 ` Boris Brezillon
2015-01-14 8:31 ` Boris Brezillon
2015-01-14 3:26 ` Rob Herring
2015-01-14 3:26 ` Rob Herring
2015-01-14 3:26 ` Rob Herring
2015-01-14 8:22 ` Boris Brezillon
2015-01-14 8:22 ` Boris Brezillon
2015-01-14 8:22 ` Boris Brezillon
2015-01-14 10:36 ` Thomas Gleixner
2015-01-14 10:36 ` Thomas Gleixner
2015-01-14 10:36 ` Thomas Gleixner
2015-01-14 22:24 ` Rob Herring
2015-01-14 22:24 ` Rob Herring
2015-01-14 22:24 ` Rob Herring
2015-01-14 22:55 ` Boris Brezillon
2015-01-14 22:55 ` Boris Brezillon
2015-01-14 22:55 ` Boris Brezillon
2015-01-15 9:44 ` Nicolas Ferre
2015-01-15 9:44 ` Nicolas Ferre
2015-01-15 9:44 ` Nicolas Ferre
2015-01-15 9:11 ` Thomas Gleixner
2015-01-15 9:11 ` Thomas Gleixner
2015-01-15 9:11 ` Thomas Gleixner
2015-01-15 9:26 ` Nicolas Ferre
2015-01-15 9:26 ` Nicolas Ferre
2015-01-15 9:26 ` Nicolas Ferre
2015-01-15 15:40 ` Rob Herring
2015-01-15 15:40 ` Rob Herring
2015-01-15 15:40 ` Rob Herring
2015-01-20 13:08 ` Thomas Gleixner
2015-01-20 13:08 ` Thomas Gleixner
2015-01-20 20:07 ` Rob Herring
2015-01-14 13:36 ` Nicolas Ferre
2015-01-14 13:36 ` Nicolas Ferre
2015-01-14 13:36 ` Nicolas Ferre
2015-01-14 14:03 ` Boris Brezillon
2015-01-14 14:03 ` Boris Brezillon
2015-01-14 14:03 ` Boris Brezillon
2015-01-14 14:43 ` Nicolas Ferre
2015-01-14 14:43 ` Nicolas Ferre
2015-01-14 14:43 ` Nicolas Ferre
2015-01-13 18:46 ` [PATCH v2 2/5] irqchip: Add DT binding doc for dumb demuxer chips Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-13 19:00 ` Jason Cooper
2015-01-13 19:00 ` Jason Cooper
2015-01-13 19:00 ` Jason Cooper
2015-01-13 20:52 ` Boris Brezillon
2015-01-13 20:52 ` Boris Brezillon
2015-01-13 20:52 ` Boris Brezillon
2015-01-14 18:56 ` Jason Cooper
2015-01-14 18:56 ` Jason Cooper
2015-01-14 18:56 ` Jason Cooper
2015-01-14 19:08 ` Boris Brezillon
2015-01-14 19:08 ` Boris Brezillon
2015-01-14 19:08 ` Boris Brezillon
2015-01-14 19:33 ` Jason Cooper
2015-01-14 19:33 ` Jason Cooper
2015-01-14 19:33 ` Jason Cooper
2015-01-14 13:42 ` Nicolas Ferre
2015-01-14 13:42 ` Nicolas Ferre
2015-01-14 13:42 ` Nicolas Ferre
2015-01-13 18:46 ` [PATCH v2 3/5] ARM: at91/dt: select DUMB_IRQ_DEMUX for all at91 SoCs Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-14 13:45 ` Nicolas Ferre
2015-01-14 13:45 ` Nicolas Ferre
2015-01-14 13:45 ` Nicolas Ferre
2015-01-13 18:46 ` [PATCH v2 4/5] ARM: at91/dt: add AIC irq1 muxed peripheral id definitions Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-14 13:21 ` Nicolas Ferre
2015-01-14 13:21 ` Nicolas Ferre
2015-01-14 13:21 ` Nicolas Ferre
2015-01-14 13:34 ` Boris Brezillon [this message]
2015-01-14 13:34 ` Boris Brezillon
2015-01-14 13:34 ` Boris Brezillon
2015-01-14 13:40 ` Nicolas Ferre
2015-01-14 13:40 ` Nicolas Ferre
2015-01-14 13:40 ` Nicolas Ferre
2015-01-13 18:46 ` [PATCH v2 5/5] ARM: at91/dt: define a dumb irq demultiplexer chip connected on irq1 Boris Brezillon
2015-01-13 18:46 ` Boris Brezillon
2015-01-14 13:48 ` Nicolas Ferre
2015-01-14 13:48 ` Nicolas Ferre
2015-01-14 13:48 ` Nicolas Ferre
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