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From: lee.jones@linaro.org (Lee Jones)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 RESEND 2/8] irqchip: Supply new driver for STi based devices
Date: Fri, 23 Jan 2015 16:32:31 +0000	[thread overview]
Message-ID: <20150123163231.GB11745@x1> (raw)
In-Reply-To: <alpine.DEB.2.11.1501231702280.5526@nanos>

On Fri, 23 Jan 2015, Thomas Gleixner wrote:
> On Thu, 22 Jan 2015, Lee Jones wrote:
> 
> > This driver is used to enable System Configuration Register controlled
> > External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
> > Cache IRQs prior to use.
> 
> I'm wondering how this is related to irq_chip, 

It doesn't really.  At least, it doesn't make use of the framework.  
It was the most relevant subsystem.

> but well, I don't mind it being parked here.

Thanks Thomas.  I was hoping for that response.

> Though I really cannot say anything about this DT translation
> machinery for a single sysconfig register, other than it looks
> completely overengineered to me.

I understnad where you're coming from, but don't all drivers just
'twiddle some register bits'?

> The only technical comment I have is: shouldn't all the stuff except
> the resume function be marked __init or is any of this required post
> init?

It's not common to mark functions invoked at and affter *_probe() as
__init.  At least, not as far as I'm aware.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

WARNING: multiple messages have this Message-ID (diff)
From: Lee Jones <lee.jones@linaro.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@stlinux.com,
	jason@lakedaemon.net, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 RESEND 2/8] irqchip: Supply new driver for STi based devices
Date: Fri, 23 Jan 2015 16:32:31 +0000	[thread overview]
Message-ID: <20150123163231.GB11745@x1> (raw)
In-Reply-To: <alpine.DEB.2.11.1501231702280.5526@nanos>

On Fri, 23 Jan 2015, Thomas Gleixner wrote:
> On Thu, 22 Jan 2015, Lee Jones wrote:
> 
> > This driver is used to enable System Configuration Register controlled
> > External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
> > Cache IRQs prior to use.
> 
> I'm wondering how this is related to irq_chip, 

It doesn't really.  At least, it doesn't make use of the framework.  
It was the most relevant subsystem.

> but well, I don't mind it being parked here.

Thanks Thomas.  I was hoping for that response.

> Though I really cannot say anything about this DT translation
> machinery for a single sysconfig register, other than it looks
> completely overengineered to me.

I understnad where you're coming from, but don't all drivers just
'twiddle some register bits'?

> The only technical comment I have is: shouldn't all the stuff except
> the resume function be marked __init or is any of this required post
> init?

It's not common to mark functions invoked at and affter *_probe() as
__init.  At least, not as far as I'm aware.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

  reply	other threads:[~2015-01-23 16:32 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-22  9:48 [PATCH v2 RESEND 0/8] irqchip: New driver for ST's SysCfg controlled IRQs Lee Jones
2015-01-22  9:48 ` Lee Jones
2015-01-22  9:48 ` Lee Jones
2015-01-22  9:48 ` [PATCH v2 RESEND 1/8] dt: bindings: Supply shared ST IRQ defines Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-23 15:58   ` Thomas Gleixner
2015-01-23 15:58     ` Thomas Gleixner
2015-01-23 16:39     ` Lee Jones
2015-01-23 16:39       ` Lee Jones
2015-01-24 11:46       ` Thomas Gleixner
2015-01-24 11:46         ` Thomas Gleixner
2015-01-24 11:46         ` Thomas Gleixner
2015-01-22  9:48 ` [PATCH v2 RESEND 2/8] irqchip: Supply new driver for STi based devices Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-23 16:10   ` Thomas Gleixner
2015-01-23 16:10     ` Thomas Gleixner
2015-01-23 16:10     ` Thomas Gleixner
2015-01-23 16:32     ` Lee Jones [this message]
2015-01-23 16:32       ` Lee Jones
2015-01-24 11:48       ` Thomas Gleixner
2015-01-24 11:48         ` Thomas Gleixner
2015-01-22  9:48 ` [PATCH v2 RESEND 3/8] irqchip: irq-st: Add documentation for STi based syscfg IRQs Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48 ` [PATCH v2 RESEND 4/8] ARM: STi: STiH416: Enable Cortex-A9 PMU support Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48 ` [PATCH v2 RESEND 5/8] ARM: STi: STiH416: Enable PMU IRQs Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48 ` [PATCH v2 RESEND 6/8] ARM: STi: STiH407: Enable Cortex-A9 PMU support Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48 ` [PATCH v2 RESEND 7/8] ARM: STi: STiH407: Enable PMU IRQs Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48 ` [PATCH v2 RESEND 8/8] ARM: STI: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot Lee Jones
2015-01-22  9:48   ` Lee Jones
2015-01-22  9:48   ` Lee Jones

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