Re: [PATCH v4 0/3] Set SMMU s2 input-size based on p2m tables

["Edgar E. Iglesias" <edgar.iglesias@gmail.com>]

On Tue, May 05, 2015 at 02:17:47PM +0100, Ian Campbell wrote:
> On Fri, 2015-05-01 at 11:40 +1000, Edgar E. Iglesias wrote:
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> > 
> > Hi,
> > 
> > This is a fix for the issue I'm seeing on ZynqMP with missmatched
> > setup of the SMMU and the shared p2m page-tables with the CPU.
> 
> Looking back at previous conversations it seems like your SMMU handles
> fewer input bits than the second stage of the regular MMU, is that
> right?

It's the other way around. The SMMU handles up-to 48 bits S2 input addrs
but the Cortex-A53 only does 40bit IPAs.

> Is there an architectural constraint that bits(SMMU) <= bits(MMU-s2)?

I'm not aware of any such constraints. In XEN, because we share page-tables
between CPU and SMMUs, we need to make sure the SMMUs support the
page-tables format and get configured accordingly.

Cheers,
Edgar


> 
> > 
> > This implementes a global p2m_ipa_bits cap for S2 input-size as
> > discussed in the previous RFC.
> > 
> > Best regards,
> > Edgar
> > 
> > Changelog:
> > v3 -> v4:
> > * Replace ASSERT on supported IPA sizes with returnig error.
> > * Remove redundant 'addresses' after IPA.
> > 
> > v2 -> v3:
> > * pfn -> ipa.
> > * Fix typos in commit msg for 3/3.
> > 
> > v1 -> v2:
> > * Use a global pfn bitsize instead of a per-domain one.
> > 
> > Edgar E. Iglesias (3):
> >   xen/arm: Re-order iommu_setup to after setup_virt_paging
> >   xen/arm: Add p2m_ipa_bits
> >   xen/iommu: arm: Use p2m_ipa_bits as stage2 input size
> > 
> >  xen/arch/arm/p2m.c                 |  5 +++++
> >  xen/arch/arm/setup.c               |  4 ++--
> >  xen/drivers/passthrough/arm/smmu.c | 10 ++++++++--
> >  xen/include/asm-arm/p2m.h          |  3 +++
> >  4 files changed, 18 insertions(+), 4 deletions(-)
> > 
> 
>