From: Julien Grall <julien.grall@citrix.com>
To: Ian Campbell <ian.campbell@citrix.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: edgar.iglesias@xilinx.com, tim@xen.org, xen-devel@lists.xen.org,
julien.grall@citrix.com, stefano.stabellini@citrix.com,
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Subject: Re: [PATCH v4 0/3] Set SMMU s2 input-size based on p2m tables
Date: Tue, 5 May 2015 14:45:41 +0100 [thread overview]
Message-ID: <5548C985.1020204@citrix.com> (raw)
In-Reply-To: <1430831867.2660.89.camel@citrix.com>
Hi Ian,
On 05/05/15 14:17, Ian Campbell wrote:
> On Fri, 2015-05-01 at 11:40 +1000, Edgar E. Iglesias wrote:
>> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>>
>> Hi,
>>
>> This is a fix for the issue I'm seeing on ZynqMP with missmatched
>> setup of the SMMU and the shared p2m page-tables with the CPU.
>
> Looking back at previous conversations it seems like your SMMU handles
> fewer input bits than the second stage of the regular MMU, is that
> right?
>
> Is there an architectural constraint that bits(SMMU) <= bits(MMU-s2)?
His problem is bits(MMU-s2) <= bits(SMMU).
Although, we were talking about hardware where the bits(SMMU) <=
bits(MMU-s2).
I have Seattle in mind but I haven't yet feedback from Suravee (in CC).
Suravee, do you have any input? Having the bits(SMMU) <= bits(MMU-s2)
would restrict the P2M to use 40 bits. Anything above won't be
accessible to DOM0 because of the 1:1 mapping.
Regards,
--
Julien Grall
next prev parent reply other threads:[~2015-05-05 13:45 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-01 1:40 [PATCH v4 0/3] Set SMMU s2 input-size based on p2m tables Edgar E. Iglesias
2015-05-01 1:40 ` [PATCH v4 1/3] xen/arm: Re-order iommu_setup to after setup_virt_paging Edgar E. Iglesias
2015-05-05 13:18 ` Ian Campbell
2015-05-01 1:40 ` [PATCH v4 2/3] xen/arm: Add p2m_ipa_bits Edgar E. Iglesias
2015-05-05 13:23 ` Ian Campbell
2015-05-06 4:28 ` Edgar E. Iglesias
2015-05-01 1:40 ` [PATCH v4 3/3] xen/iommu: arm: Use p2m_ipa_bits as stage2 input size Edgar E. Iglesias
2015-05-01 10:22 ` Julien Grall
2015-05-05 13:24 ` Ian Campbell
2015-05-05 13:48 ` Julien Grall
2015-05-05 13:59 ` Ian Campbell
2015-05-05 14:30 ` Julien Grall
2015-05-06 5:32 ` Edgar E. Iglesias
2015-05-05 13:17 ` [PATCH v4 0/3] Set SMMU s2 input-size based on p2m tables Ian Campbell
2015-05-05 13:45 ` Julien Grall [this message]
2015-05-06 3:26 ` Edgar E. Iglesias
2015-05-06 8:54 ` Ian Campbell
2015-05-06 9:17 ` Edgar E. Iglesias
2015-05-06 9:39 ` Ian Campbell
2015-05-06 11:06 ` Julien Grall
2015-05-06 11:50 ` Ian Campbell
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