From: Michael Turquette <mturquette@linaro.org>
To: Paul Burton <paul.burton@imgtec.com>, linux-mips@linux-mips.org
Cc: "Paul Burton" <paul.burton@imgtec.com>,
"Lars-Peter Clausen" <lars@metafoo.de>,
"Ralf Baechle" <ralf@linux-mips.org>,
"Stephen Boyd" <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 27/37] MIPS, clk: move jz4740_clock_set_wait_mode to jz4740-cgu
Date: Tue, 12 May 2015 19:56:00 -0700 [thread overview]
Message-ID: <20150513025600.20636.34201@quantum> (raw)
In-Reply-To: <1429881457-16016-28-git-send-email-paul.burton@imgtec.com>
Hi Paul,
Quoting Paul Burton (2015-04-24 06:17:27)
> +void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode)
> +{
> + uint32_t lcr =3D readl(cgu->base + CGU_REG_LCR);
> +
> + switch (mode) {
> + case JZ4740_WAIT_MODE_IDLE:
> + lcr &=3D ~LCR_SLEEP;
> + break;
> +
> + case JZ4740_WAIT_MODE_SLEEP:
> + lcr |=3D LCR_SLEEP;
> + break;
> + }
> +
> + writel(lcr, cgu->base + CGU_REG_LCR);
> +}
What do these modes do? How are they used?
Do you think the above function is a good candidate for .prepare and
.unprepare callback?
Regards,
Mike
WARNING: multiple messages have this Message-ID (diff)
From: Michael Turquette <mturquette@linaro.org>
To: Paul Burton <paul.burton@imgtec.com>, linux-mips@linux-mips.org
Cc: "Paul Burton" <paul.burton@imgtec.com>,
"Lars-Peter Clausen" <lars@metafoo.de>,
"Ralf Baechle" <ralf@linux-mips.org>,
"Stephen Boyd" <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 27/37] MIPS, clk: move jz4740_clock_set_wait_mode to jz4740-cgu
Date: Tue, 12 May 2015 19:56:00 -0700 [thread overview]
Message-ID: <20150513025600.20636.34201@quantum> (raw)
In-Reply-To: <1429881457-16016-28-git-send-email-paul.burton@imgtec.com>
Hi Paul,
Quoting Paul Burton (2015-04-24 06:17:27)
> +void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode)
> +{
> + uint32_t lcr = readl(cgu->base + CGU_REG_LCR);
> +
> + switch (mode) {
> + case JZ4740_WAIT_MODE_IDLE:
> + lcr &= ~LCR_SLEEP;
> + break;
> +
> + case JZ4740_WAIT_MODE_SLEEP:
> + lcr |= LCR_SLEEP;
> + break;
> + }
> +
> + writel(lcr, cgu->base + CGU_REG_LCR);
> +}
What do these modes do? How are they used?
Do you think the above function is a good candidate for .prepare and
.unprepare callback?
Regards,
Mike
WARNING: multiple messages have this Message-ID (diff)
From: Michael Turquette <mturquette@linaro.org>
To: Paul Burton <paul.burton@imgtec.com>, linux-mips@linux-mips.org
Cc: Lars-Peter Clausen <lars@metafoo.de>,
Ralf Baechle <ralf@linux-mips.org>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 27/37] MIPS, clk: move jz4740_clock_set_wait_mode to jz4740-cgu
Date: Tue, 12 May 2015 19:56:00 -0700 [thread overview]
Message-ID: <20150513025600.20636.34201@quantum> (raw)
Message-ID: <20150513025600.DfLtvq0rtNLsmdg1P8ZnNPEgJKI-_9AEeBT7jqdwLS0@z> (raw)
In-Reply-To: <1429881457-16016-28-git-send-email-paul.burton@imgtec.com>
Hi Paul,
Quoting Paul Burton (2015-04-24 06:17:27)
> +void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode)
> +{
> + uint32_t lcr = readl(cgu->base + CGU_REG_LCR);
> +
> + switch (mode) {
> + case JZ4740_WAIT_MODE_IDLE:
> + lcr &= ~LCR_SLEEP;
> + break;
> +
> + case JZ4740_WAIT_MODE_SLEEP:
> + lcr |= LCR_SLEEP;
> + break;
> + }
> +
> + writel(lcr, cgu->base + CGU_REG_LCR);
> +}
What do these modes do? How are they used?
Do you think the above function is a good candidate for .prepare and
.unprepare callback?
Regards,
Mike
next prev parent reply other threads:[~2015-05-13 2:56 UTC|newest]
Thread overview: 119+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-24 13:17 [PATCH v4 00/37] JZ4780 & CI20 support Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 01/37] devicetree/bindings: add Ingenic Semiconductor vendor prefix Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 02/37] devicetree/bindings: add Qi Hardware " Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 03/37] MIPS: JZ4740: introduce CONFIG_MACH_INGENIC Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 04/37] MIPS: ingenic: add newer vendor IDs Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 05/37] MIPS: JZ4740: require & include DT Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 06/37] MIPS: irq_cpu: declare irqchip table entry Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 07/37] MIPS: JZ4740: probe CPU interrupt controller via DT Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 08/37] MIPS: JZ4740: use generic plat_irq_dispatch Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 09/37] MIPS: JZ4740: move arch_init_irq out of arch/mips/jz4740/irq.c Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 10/37] devicetree: document Ingenic SoC interrupt controller binding Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 11/37] MIPS: JZ4740: probe interrupt controller via DT Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 12/37] MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DT Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 13/37] MIPS: JZ4740: register an irq_domain for the interrupt controller Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-28 10:46 ` James Hogan
2015-04-28 10:46 ` James Hogan
2015-04-24 13:17 ` [PATCH v4 14/37] MIPS: JZ4740: drop intc debugfs code Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-28 7:20 ` Lars-Peter Clausen
2015-04-24 13:17 ` [PATCH v4 15/37] MIPS: JZ4740: remove jz_intc_base global Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-27 22:35 ` James Hogan
2015-04-27 22:35 ` James Hogan
2015-04-24 13:17 ` [PATCH v4 16/37] MIPS: JZ4740: support >32 interrupts Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 17/37] MIPS: JZ4740: define IRQ numbers based on number of intc IRQs Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 18/37] MIPS: JZ4740: read intc base address from DT Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 19/37] MIPS: JZ4740: avoid JZ4740-specific naming Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 20/37] MIPS: JZ4740: support newer SoC interrupt controllers Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-28 11:03 ` James Hogan
2015-04-28 11:03 ` James Hogan
2015-04-24 13:17 ` [PATCH v4 21/37] irqchip: move Ingenic SoC intc driver to drivers/irqchip Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 22/37] MIPS: JZ4740: call jz4740_clock_init earlier Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 23/37] MIPS: JZ4740: replace use of jz4740_clock_bdata Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 24/37] devicetree: add Ingenic CGU binding documentation Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 25/37] clk: ingenic: add driver for Ingenic SoC CGU clocks Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-27 23:00 ` James Hogan
2015-04-27 23:00 ` James Hogan
2015-04-28 10:17 ` James Hogan
2015-04-28 10:17 ` James Hogan
2015-05-20 23:16 ` Stephen Boyd
2015-04-24 13:17 ` [PATCH v4 26/37] MIPS,clk: migrate JZ4740 to common clock framework Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-05-13 2:52 ` Michael Turquette
2015-05-13 2:52 ` Michael Turquette
2015-05-13 2:52 ` Michael Turquette
2015-05-13 2:52 ` Michael Turquette
2015-05-24 15:01 ` Paul Burton
2015-05-24 15:01 ` Paul Burton
2015-05-24 15:01 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 27/37] MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cgu Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-05-13 2:56 ` Michael Turquette [this message]
2015-05-13 2:56 ` [PATCH v4 27/37] MIPS, clk: " Michael Turquette
2015-05-13 2:56 ` Michael Turquette
2015-04-24 13:17 ` [PATCH v4 28/37] MIPS,clk: move jz4740 UDC auto suspend functions " Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-05-13 3:06 ` [PATCH v4 28/37] MIPS, clk: " Michael Turquette
2015-05-13 3:06 ` Michael Turquette
2015-05-24 15:02 ` Paul Burton
2015-05-24 15:02 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 29/37] MIPS,clk: move jz4740 clock suspend,resume " Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 30/37] clk: ingenic: add JZ4780 CGU support Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-05-20 23:07 ` Stephen Boyd
2015-04-24 13:17 ` [PATCH v4 31/37] MIPS: JZ4740: remove clock.h Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 32/37] MIPS: JZ4740: only detect RAM size if not specified in DT Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 33/37] devicetree: document Ingenic SoC UART binding Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 34/37] serial: 8250_ingenic: support for Ingenic SoC UARTs Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 35/37] MIPS: JZ4740: use Ingenic SoC UART driver Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` [PATCH v4 36/37] MIPS: ingenic: initial JZ4780 support Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-28 10:36 ` James Hogan
2015-04-28 10:36 ` James Hogan
2015-04-28 10:36 ` James Hogan
2015-04-24 13:17 ` [PATCH v4 37/37] MIPS: ingenic: initial MIPS Creator CI20 support Paul Burton
2015-04-24 13:17 ` Paul Burton
2015-04-24 13:17 ` Paul Burton
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