Re: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC PHY startup

[Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>]

On Thu, May 21, 2015 at 09:54:20AM +0000, Peter Chen wrote:
>  
> > 
> > On Wed, May 20, 2015 at 10:13 PM, Peter Chen <peter.chen@freescale.com>
> > wrote:
> > > On Tue, May 19, 2015 at 09:10:05PM -0500, Rob Herring wrote:
> > >> The Marvell 28nm HSIC PHY requires the port to be forced to HS mode
> > >> after the port power is applied. This is done using the test mode in
> > >> the PORTSC register.
> > >>
> > >> As HSIC is always HS, this work-around should be safe to do with all
> > >> HSIC PHYs. If not, a flag can also be added.
> > >
> > > I think a flag is needed, not sure all vendors can work well with that.
> > 
> > Only i.MX6Sx uses HSIC in mainline. Is that something you can test? It would be
> > better to not add flags unless they are really needed.
> > Otherwise you end up with dozens of flags like SDHCI drivers have.
> > 
> 
> I will have a test for this, and show you the result later.
> 

Since imx6sx HSIC support is not supported at mainline, I tested
this sequence at internal branch, it does not affect imx6's
hsic function, I am ok with this patch.

Tested-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

> Peter
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-- 

Best Regards,
Peter Chen
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