From: Aurelien Jarno <aurelien@aurel32.net>
To: Serge Vakulenko <serge.vakulenko@gmail.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH pic32 v2 1/5] Speed of MIPS CPU timer made configurable per platform.
Date: Mon, 6 Jul 2015 10:31:24 +0200 [thread overview]
Message-ID: <20150706083124.GS931@aurel32.net> (raw)
In-Reply-To: <CAJ9hpfENjpWZ+FXhDTcw+GfeodXqAGprgjZVxmn5Axkgx8A1TA@mail.gmail.com>
On 2015-07-05 16:25, Serge Vakulenko wrote:
> On Wed, Jul 1, 2015 at 3:02 AM, Aurelien Jarno <aurelien@aurel32.net> wrote:
> > On 2015-06-30 21:12, Serge Vakulenko wrote:
> >> @@ -153,5 +153,6 @@ void cpu_mips_clock_init (CPUMIPSState *env)
> >> */
> >> if (!kvm_enabled()) {
> >> env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &mips_timer_cb, env);
> >> + env->count_freq = count_freq;
> >> }
> >> }
> >
> > So it means the value passed as an argument to this function is ignored
> > in the KVM case. I guess we want to be able to tell the kernel about the
> > request frequency.
>
> Sound like a new feature request for MIPS KVM developers. I cannot
> find any such possibility in the current KVM API.
Ok.
> My patch changes nothing for existing platforms like Malta, Fulong or
> MIPSsim. Everything continues to work as it is. Only for pic32mx7 cpu
> the clock rate is decreased to 40MHz. I'm not sure anybody could ever
> run KVM on this processor. :)
Yes, but you give the possibility to tweak the speed, so later someone
might wrongly pass a value different than 100MHz for a CPU usable with
KVM.
The way to go is to do add a comment with an assert:
if (kvm_enabled()) {
/* FIXME: KVM only supports a 100MHz clock. */
assert(count_freq == 100*1000*1000);
} else {
env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &mips_timer_cb, env);
env->count_freq = count_freq;
}
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2015-07-06 8:31 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-01 4:12 [Qemu-devel] [PATCH pic32 v2 0/5] Support for Microchip pic32mx7 and pic32mz microcontrollers Serge Vakulenko
[not found] ` <cover.1435723168.git.serge.vakulenko@gmail.com>
2015-07-01 4:12 ` [Qemu-devel] [PATCH pic32 v2 1/5] Speed of MIPS CPU timer made configurable per platform Serge Vakulenko
2015-07-01 10:02 ` Aurelien Jarno
2015-07-05 23:25 ` Serge Vakulenko
2015-07-06 8:31 ` Aurelien Jarno [this message]
2015-07-01 4:12 ` [Qemu-devel] [PATCH pic32 v2 2/5] Fixed random index generation for TLBWR instruction. It was not quite random and did not skip Wired entries Serge Vakulenko
2015-07-01 10:11 ` Aurelien Jarno
2015-07-03 21:39 ` Maciej W. Rozycki
2015-07-06 0:16 ` Serge Vakulenko
2015-07-06 0:03 ` Serge Vakulenko
2015-07-06 8:32 ` Aurelien Jarno
2015-07-02 7:52 ` Antony Pavlov
2015-07-06 0:06 ` Serge Vakulenko
2015-07-01 4:12 ` [Qemu-devel] [PATCH pic32 v2 3/5] Added support for external interrupt controller (EIC) mode Serge Vakulenko
2015-07-01 11:07 ` Aurelien Jarno
2015-07-06 3:05 ` Serge Vakulenko
2015-07-06 3:31 ` Serge Vakulenko
2015-07-06 9:31 ` Aurelien Jarno
2015-07-06 9:28 ` Aurelien Jarno
2015-07-01 4:12 ` [Qemu-devel] [PATCH pic32 v2 4/5] Two new processor variants: M4K and microAptivP Serge Vakulenko
2015-07-01 13:37 ` Aurelien Jarno
2015-07-03 22:04 ` Maciej W. Rozycki
2015-07-06 4:15 ` Serge Vakulenko
2015-07-06 3:48 ` Serge Vakulenko
2015-07-06 8:40 ` Aurelien Jarno
2015-07-01 4:12 ` [Qemu-devel] [PATCH pic32 v2 5/5] Two new machine platforms: pic32mz7 and pic32mz Serge Vakulenko
2015-07-01 13:41 ` Aurelien Jarno
2015-07-06 4:18 ` Serge Vakulenko
2015-07-06 7:33 ` Antony Pavlov
2015-07-06 18:58 ` Serge Vakulenko
2015-07-06 21:43 ` Peter Crosthwaite
2015-07-07 7:30 ` Antony Pavlov
2015-07-07 14:08 ` Aurelien Jarno
2015-07-02 5:56 ` Antony Pavlov
2015-07-06 4:27 ` Serge Vakulenko
2015-07-06 7:55 ` Antony Pavlov
2015-07-02 5:31 ` [Qemu-devel] [PATCH pic32 v2 0/5] Support for Microchip pic32mx7 and pic32mz microcontrollers Antony Pavlov
2015-07-06 0:39 ` Serge Vakulenko
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