From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64, mm: Use IPIs for TLB invalidation.
Date: Mon, 13 Jul 2015 19:17:55 +0100 [thread overview]
Message-ID: <20150713181755.GP2632@arm.com> (raw)
In-Reply-To: <1436646323-10527-4-git-send-email-ddaney.cavm@gmail.com>
On Sat, Jul 11, 2015 at 09:25:23PM +0100, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> Most broadcast TLB invalidations are unnecessary. So when
> invalidating for a given mm/vma target the only the needed CPUs via
> and IPI.
>
> For global TLB invalidations, also use IPI.
>
> Tested on Cavium ThunderX.
>
> This change reduces 'time make -j48' on kernel from 139s to 116s (83%
> as long).
Any idea *why* you're seeing such an improvement? Some older kernels had
a bug where we'd try to flush a negative (i.e. huge) range by page, so it
would be nice to rule that out. I assume these measurements are using
mainline?
Having TLBI responsible for that amount of a kernel build doesn't feel
right to me and doesn't line-up with the profiles I'm used to seeing.
You have 16-bit ASIDs, right?
Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: David Daney <ddaney.cavm@gmail.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Catalin Marinas <Catalin.Marinas@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Robert Richter <rrichter@cavium.com>,
Andrew Morton <akpm@linux-foundation.org>,
David Daney <david.daney@cavium.com>
Subject: Re: [PATCH 3/3] arm64, mm: Use IPIs for TLB invalidation.
Date: Mon, 13 Jul 2015 19:17:55 +0100 [thread overview]
Message-ID: <20150713181755.GP2632@arm.com> (raw)
In-Reply-To: <1436646323-10527-4-git-send-email-ddaney.cavm@gmail.com>
On Sat, Jul 11, 2015 at 09:25:23PM +0100, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> Most broadcast TLB invalidations are unnecessary. So when
> invalidating for a given mm/vma target the only the needed CPUs via
> and IPI.
>
> For global TLB invalidations, also use IPI.
>
> Tested on Cavium ThunderX.
>
> This change reduces 'time make -j48' on kernel from 139s to 116s (83%
> as long).
Any idea *why* you're seeing such an improvement? Some older kernels had
a bug where we'd try to flush a negative (i.e. huge) range by page, so it
would be nice to rule that out. I assume these measurements are using
mainline?
Having TLBI responsible for that amount of a kernel build doesn't feel
right to me and doesn't line-up with the profiles I'm used to seeing.
You have 16-bit ASIDs, right?
Will
next prev parent reply other threads:[~2015-07-13 18:17 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-11 20:25 [PATCH 0/3] arm64, mm: Use IPIs for TLB invalidation David Daney
2015-07-11 20:25 ` David Daney
2015-07-11 20:25 ` [PATCH 1/3] arm64, mm: Add flush_tlb_all_local() function David Daney
2015-07-11 20:25 ` David Daney
2015-07-11 20:25 ` [PATCH 2/3] arm64, mm: Use flush_tlb_all_local() in flush_context() David Daney
2015-07-11 20:25 ` David Daney
2015-07-11 20:25 ` [PATCH 3/3] arm64, mm: Use IPIs for TLB invalidation David Daney
2015-07-11 20:25 ` David Daney
2015-07-11 22:06 ` Sergei Shtylyov
2015-07-11 22:06 ` Sergei Shtylyov
2015-07-12 21:58 ` Catalin Marinas
2015-07-12 21:58 ` Catalin Marinas
2015-07-13 18:17 ` Will Deacon [this message]
2015-07-13 18:17 ` Will Deacon
2015-07-13 18:58 ` David Daney
2015-07-13 18:58 ` David Daney
2015-07-14 11:13 ` Catalin Marinas
2015-07-14 11:13 ` Catalin Marinas
2015-07-14 11:40 ` Will Deacon
2015-07-14 11:40 ` Will Deacon
2015-07-14 13:09 ` Catalin Marinas
2015-07-14 13:09 ` Catalin Marinas
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