From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64, mm: Use IPIs for TLB invalidation.
Date: Sun, 12 Jul 2015 01:06:27 +0300 [thread overview]
Message-ID: <55A19363.1050506@cogentembedded.com> (raw)
In-Reply-To: <1436646323-10527-4-git-send-email-ddaney.cavm@gmail.com>
Hello.
On 07/11/2015 11:25 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
> Most broadcast TLB invalidations are unnecessary. So when
> invalidating for a given mm/vma target the only the needed CPUs via
The only the needed?
> and IPI.
> For global TLB invalidations, also use IPI.
> Tested on Cavium ThunderX.
> This change reduces 'time make -j48' on kernel from 139s to 116s (83%
> as long).
> The patch is needed because of a ThunderX Pass1 erratum: Exclusive
> store operations unreliable in the presence of broadcast TLB
> invalidations. The performance improvements shown make it compelling
> even without the erratum workaround need.
> Signed-off-by: David Daney <david.daney@cavium.com>
WBR, Sergei
WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: David Daney <ddaney.cavm@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Robert Richter <rrichter@cavium.com>,
Andrew Morton <akpm@linux-foundation.org>,
linux-kernel@vger.kernel.org,
David Daney <david.daney@cavium.com>
Subject: Re: [PATCH 3/3] arm64, mm: Use IPIs for TLB invalidation.
Date: Sun, 12 Jul 2015 01:06:27 +0300 [thread overview]
Message-ID: <55A19363.1050506@cogentembedded.com> (raw)
In-Reply-To: <1436646323-10527-4-git-send-email-ddaney.cavm@gmail.com>
Hello.
On 07/11/2015 11:25 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
> Most broadcast TLB invalidations are unnecessary. So when
> invalidating for a given mm/vma target the only the needed CPUs via
The only the needed?
> and IPI.
> For global TLB invalidations, also use IPI.
> Tested on Cavium ThunderX.
> This change reduces 'time make -j48' on kernel from 139s to 116s (83%
> as long).
> The patch is needed because of a ThunderX Pass1 erratum: Exclusive
> store operations unreliable in the presence of broadcast TLB
> invalidations. The performance improvements shown make it compelling
> even without the erratum workaround need.
> Signed-off-by: David Daney <david.daney@cavium.com>
WBR, Sergei
next prev parent reply other threads:[~2015-07-11 22:06 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-11 20:25 [PATCH 0/3] arm64, mm: Use IPIs for TLB invalidation David Daney
2015-07-11 20:25 ` David Daney
2015-07-11 20:25 ` [PATCH 1/3] arm64, mm: Add flush_tlb_all_local() function David Daney
2015-07-11 20:25 ` David Daney
2015-07-11 20:25 ` [PATCH 2/3] arm64, mm: Use flush_tlb_all_local() in flush_context() David Daney
2015-07-11 20:25 ` David Daney
2015-07-11 20:25 ` [PATCH 3/3] arm64, mm: Use IPIs for TLB invalidation David Daney
2015-07-11 20:25 ` David Daney
2015-07-11 22:06 ` Sergei Shtylyov [this message]
2015-07-11 22:06 ` Sergei Shtylyov
2015-07-12 21:58 ` Catalin Marinas
2015-07-12 21:58 ` Catalin Marinas
2015-07-13 18:17 ` Will Deacon
2015-07-13 18:17 ` Will Deacon
2015-07-13 18:58 ` David Daney
2015-07-13 18:58 ` David Daney
2015-07-14 11:13 ` Catalin Marinas
2015-07-14 11:13 ` Catalin Marinas
2015-07-14 11:40 ` Will Deacon
2015-07-14 11:40 ` Will Deacon
2015-07-14 13:09 ` Catalin Marinas
2015-07-14 13:09 ` Catalin Marinas
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