From: Aurelien Jarno <aurelien@aurel32.net>
To: James Hogan <james.hogan@imgtec.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>,
qemu-devel@nongnu.org, Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v3 3/6] tcg/mips: Add use_mips32r6_instructions definition
Date: Thu, 8 Oct 2015 18:12:42 +0200 [thread overview]
Message-ID: <20151008161242.GA7277@aurel32.net> (raw)
In-Reply-To: <1443788657-14537-4-git-send-email-james.hogan@imgtec.com>
On 2015-10-02 13:24, James Hogan wrote:
> Add definition use_mips32r6_instructions to the MIPS TCG backend which
> is constant 1 when built for MIPS release 6. This will be used to decide
> between pre-R6 and R6 instruction encodings.
>
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Reviewed-by: Richard Henderson <rth@twiddle.net>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> ---
> tcg/mips/tcg-target.h | 7 +++++++
> 1 file changed, 7 insertions(+)
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index f5ba52cacfe5..e579c10b9aaa 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -96,6 +96,13 @@ extern bool use_mips32_instructions;
> extern bool use_mips32r2_instructions;
> #endif
>
> +/* MIPS32R6 instruction set detection */
> +#if defined(__mips_isa_rev) && (__mips_isa_rev >= 6)
> +#define use_mips32r6_instructions 1
> +#else
> +#define use_mips32r6_instructions 0
> +#endif
> +
> /* optional instructions */
> #define TCG_TARGET_HAS_div_i32 1
> #define TCG_TARGET_HAS_rem_i32 1
> --
> 2.4.9
>
>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2015-10-08 17:01 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-02 12:24 [Qemu-devel] [PATCH v3 0/6] tcg/mips: Minimal R6 support James Hogan
2015-10-02 12:24 ` [Qemu-devel] [PATCH v3 1/6] tcg-opc.h: Simplify debug_insn_start def James Hogan
2015-10-08 16:12 ` Aurelien Jarno
2015-10-02 12:24 ` [Qemu-devel] [PATCH v3 2/6] disas/mips: Add R6 jr/jr.hb to disassembler James Hogan
2015-10-08 16:12 ` Aurelien Jarno
2015-10-02 12:24 ` [Qemu-devel] [PATCH v3 3/6] tcg/mips: Add use_mips32r6_instructions definition James Hogan
2015-10-08 16:12 ` Aurelien Jarno [this message]
2015-10-02 12:24 ` [Qemu-devel] [PATCH v3 4/6] tcg/mips: Support r6 JR encoding James Hogan
2015-10-08 16:15 ` Aurelien Jarno
2015-10-02 12:24 ` [Qemu-devel] [PATCH v3 5/6] tcg/mips: Support r6 multiply/divide encodings James Hogan
2015-10-08 16:19 ` Aurelien Jarno
2015-10-02 12:24 ` [Qemu-devel] [PATCH v3 6/6] tcg/mips: Support r6 SEL{NE, EQ}Z instead of MOVN/MOVZ James Hogan
2015-10-07 9:46 ` Richard Henderson
2015-10-07 10:34 ` James Hogan
2015-10-07 19:54 ` Richard Henderson
2015-10-07 11:47 ` Leon Alrae
2015-10-08 16:32 ` Aurelien Jarno
2015-10-08 16:31 ` Aurelien Jarno
2015-10-09 21:26 ` James Hogan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20151008161242.GA7277@aurel32.net \
--to=aurelien@aurel32.net \
--cc=james.hogan@imgtec.com \
--cc=leon.alrae@imgtec.com \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.